blob: e689cede9b0e526ed4bc98e02d5e7b6294ce6d1d [file] [log] [blame]
Felipe Balbi72246da2011-08-19 18:10:58 +03001/**
2 * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling
3 *
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
Felipe Balbi72246da2011-08-19 18:10:58 +03005 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8 *
Felipe Balbi5945f782013-06-30 14:15:11 +03009 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 of
11 * the License as published by the Free Software Foundation.
Felipe Balbi72246da2011-08-19 18:10:58 +030012 *
Felipe Balbi5945f782013-06-30 14:15:11 +030013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Felipe Balbi72246da2011-08-19 18:10:58 +030017 */
18
19#include <linux/kernel.h>
20#include <linux/slab.h>
21#include <linux/spinlock.h>
22#include <linux/platform_device.h>
23#include <linux/pm_runtime.h>
24#include <linux/interrupt.h>
25#include <linux/io.h>
26#include <linux/list.h>
27#include <linux/dma-mapping.h>
28
29#include <linux/usb/ch9.h>
30#include <linux/usb/gadget.h>
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +010031#include <linux/usb/composite.h>
Felipe Balbi72246da2011-08-19 18:10:58 +030032
33#include "core.h"
Felipe Balbi80977dc2014-08-19 16:37:22 -050034#include "debug.h"
Felipe Balbi72246da2011-08-19 18:10:58 +030035#include "gadget.h"
36#include "io.h"
37
Felipe Balbi788a23f2012-05-21 14:22:41 +030038static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep);
Felipe Balbia0807882012-05-04 13:03:54 +030039static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
40 struct dwc3_ep *dep, struct dwc3_request *req);
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +010041
Felipe Balbi7931ec82016-12-20 13:57:32 +020042static void dwc3_ep0_prepare_one_trb(struct dwc3 *dwc, u8 epnum,
43 dma_addr_t buf_dma, u32 len, u32 type, bool chain)
Felipe Balbi72246da2011-08-19 18:10:58 +030044{
Felipe Balbif6bafc62012-02-06 11:04:53 +020045 struct dwc3_trb *trb;
Felipe Balbi72246da2011-08-19 18:10:58 +030046 struct dwc3_ep *dep;
47
Felipe Balbi72246da2011-08-19 18:10:58 +030048 dep = dwc->eps[epnum];
49
Felipe Balbi53fd8812016-04-04 15:33:41 +030050 trb = &dwc->ep0_trb[dep->trb_enqueue];
Kishon Vijay Abraham I2abd9d52015-07-27 12:25:31 +053051
52 if (chain)
Felipe Balbi53fd8812016-04-04 15:33:41 +030053 dep->trb_enqueue++;
Felipe Balbi72246da2011-08-19 18:10:58 +030054
Felipe Balbif6bafc62012-02-06 11:04:53 +020055 trb->bpl = lower_32_bits(buf_dma);
56 trb->bph = upper_32_bits(buf_dma);
57 trb->size = len;
58 trb->ctrl = type;
Felipe Balbi72246da2011-08-19 18:10:58 +030059
Felipe Balbif6bafc62012-02-06 11:04:53 +020060 trb->ctrl |= (DWC3_TRB_CTRL_HWO
Felipe Balbif6bafc62012-02-06 11:04:53 +020061 | DWC3_TRB_CTRL_ISP_IMI);
Felipe Balbi72246da2011-08-19 18:10:58 +030062
Kishon Vijay Abraham I2abd9d52015-07-27 12:25:31 +053063 if (chain)
64 trb->ctrl |= DWC3_TRB_CTRL_CHN;
65 else
66 trb->ctrl |= (DWC3_TRB_CTRL_IOC
67 | DWC3_TRB_CTRL_LST);
68
Felipe Balbi7931ec82016-12-20 13:57:32 +020069 trace_dwc3_prepare_trb(dep, trb);
70}
71
Felipe Balbi19ec3122016-12-20 14:08:48 +020072static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum)
Felipe Balbi7931ec82016-12-20 13:57:32 +020073{
74 struct dwc3_gadget_ep_cmd_params params;
75 struct dwc3_ep *dep;
76 int ret;
77
78 dep = dwc->eps[epnum];
79 if (dep->flags & DWC3_EP_BUSY)
Kishon Vijay Abraham I2abd9d52015-07-27 12:25:31 +053080 return 0;
81
Felipe Balbi72246da2011-08-19 18:10:58 +030082 memset(&params, 0, sizeof(params));
Felipe Balbidc1c70a2011-09-30 10:58:51 +030083 params.param0 = upper_32_bits(dwc->ep0_trb_addr);
84 params.param1 = lower_32_bits(dwc->ep0_trb_addr);
Felipe Balbi72246da2011-08-19 18:10:58 +030085
Felipe Balbi2cd47182016-04-12 16:42:43 +030086 ret = dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_STARTTRANSFER, &params);
Felipe Balbi8566cd12016-09-26 11:16:39 +030087 if (ret < 0)
Felipe Balbi72246da2011-08-19 18:10:58 +030088 return ret;
Felipe Balbi72246da2011-08-19 18:10:58 +030089
Felipe Balbic7fcdeb2011-08-27 22:28:36 +030090 dep->flags |= DWC3_EP_BUSY;
Felipe Balbi2eb88012016-04-12 16:53:39 +030091 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
Felipe Balbi1ddcb212011-08-30 15:52:17 +030092 dwc->ep0_next_event = DWC3_EP0_COMPLETE;
93
Felipe Balbi72246da2011-08-19 18:10:58 +030094 return 0;
95}
96
97static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
98 struct dwc3_request *req)
99{
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100100 struct dwc3 *dwc = dep->dwc;
Felipe Balbi72246da2011-08-19 18:10:58 +0300101
102 req->request.actual = 0;
103 req->request.status = -EINPROGRESS;
Felipe Balbi72246da2011-08-19 18:10:58 +0300104 req->epnum = dep->number;
105
Felipe Balbiaa3342c2016-03-14 11:01:31 +0200106 list_add_tail(&req->list, &dep->pending_list);
Felipe Balbi72246da2011-08-19 18:10:58 +0300107
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300108 /*
109 * Gadget driver might not be quick enough to queue a request
110 * before we get a Transfer Not Ready event on this endpoint.
111 *
112 * In that case, we will set DWC3_EP_PENDING_REQUEST. When that
113 * flag is set, it's telling us that as soon as Gadget queues the
114 * required request, we should kick the transfer here because the
115 * IRQ we were waiting for is long gone.
116 */
117 if (dep->flags & DWC3_EP_PENDING_REQUEST) {
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300118 unsigned direction;
Felipe Balbia6829702011-08-27 22:18:09 +0300119
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300120 direction = !!(dep->flags & DWC3_EP0_DIR_IN);
Felipe Balbia6829702011-08-27 22:18:09 +0300121
Felipe Balbi68d8a782011-12-29 06:32:29 +0200122 if (dwc->ep0state != EP0_DATA_PHASE) {
123 dev_WARN(dwc->dev, "Unexpected pending request\n");
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300124 return 0;
125 }
Felipe Balbia6829702011-08-27 22:18:09 +0300126
Felipe Balbia0807882012-05-04 13:03:54 +0300127 __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req);
128
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300129 dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
130 DWC3_EP0_DIR_IN);
Felipe Balbid9b33c62012-07-19 08:51:13 +0300131
132 return 0;
133 }
134
135 /*
136 * In case gadget driver asked us to delay the STATUS phase,
137 * handle it here.
138 */
139 if (dwc->delayed_status) {
Felipe Balbi7125d582012-07-19 21:05:08 +0300140 unsigned direction;
141
142 direction = !dwc->ep0_expect_in;
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100143 dwc->delayed_status = false;
Felipe Balbi7c812902013-07-22 12:41:47 +0300144 usb_gadget_set_state(&dwc->gadget, USB_STATE_CONFIGURED);
Felipe Balbi68d3e662011-12-08 13:56:27 +0200145
146 if (dwc->ep0state == EP0_STATUS_PHASE)
Felipe Balbi7125d582012-07-19 21:05:08 +0300147 __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]);
Felipe Balbid9b33c62012-07-19 08:51:13 +0300148
149 return 0;
Felipe Balbi72246da2011-08-19 18:10:58 +0300150 }
151
Felipe Balbifca88922012-07-19 09:05:35 +0300152 /*
153 * Unfortunately we have uncovered a limitation wrt the Data Phase.
154 *
155 * Section 9.4 says we can wait for the XferNotReady(DATA) event to
156 * come before issueing Start Transfer command, but if we do, we will
157 * miss situations where the host starts another SETUP phase instead of
158 * the DATA phase. Such cases happen at least on TD.7.6 of the Link
159 * Layer Compliance Suite.
160 *
161 * The problem surfaces due to the fact that in case of back-to-back
162 * SETUP packets there will be no XferNotReady(DATA) generated and we
163 * will be stuck waiting for XferNotReady(DATA) forever.
164 *
165 * By looking at tables 9-13 and 9-14 of the Databook, we can see that
166 * it tells us to start Data Phase right away. It also mentions that if
167 * we receive a SETUP phase instead of the DATA phase, core will issue
168 * XferComplete for the DATA phase, before actually initiating it in
169 * the wire, with the TRB's status set to "SETUP_PENDING". Such status
170 * can only be used to print some debugging logs, as the core expects
171 * us to go through to the STATUS phase and start a CONTROL_STATUS TRB,
172 * just so it completes right away, without transferring anything and,
173 * only then, we can go back to the SETUP phase.
174 *
175 * Because of this scenario, SNPS decided to change the programming
176 * model of control transfers and support on-demand transfers only for
177 * the STATUS phase. To fix the issue we have now, we will always wait
178 * for gadget driver to queue the DATA phase's struct usb_request, then
179 * start it right away.
180 *
181 * If we're actually in a 2-stage transfer, we will wait for
182 * XferNotReady(STATUS).
183 */
184 if (dwc->three_stage_setup) {
185 unsigned direction;
186
187 direction = dwc->ep0_expect_in;
188 dwc->ep0state = EP0_DATA_PHASE;
189
190 __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req);
191
192 dep->flags &= ~DWC3_EP0_DIR_IN;
193 }
194
Felipe Balbi35f75692012-07-19 08:49:01 +0300195 return 0;
Felipe Balbi72246da2011-08-19 18:10:58 +0300196}
197
198int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
199 gfp_t gfp_flags)
200{
201 struct dwc3_request *req = to_dwc3_request(request);
202 struct dwc3_ep *dep = to_dwc3_ep(ep);
203 struct dwc3 *dwc = dep->dwc;
204
205 unsigned long flags;
206
207 int ret;
208
Felipe Balbi72246da2011-08-19 18:10:58 +0300209 spin_lock_irqsave(&dwc->lock, flags);
Ido Shayevitz16e78db2012-03-12 20:25:24 +0200210 if (!dep->endpoint.desc) {
Felipe Balbi5eb30ce2016-11-03 14:07:51 +0200211 dev_err(dwc->dev, "%s: can't queue to disabled endpoint\n",
212 dep->name);
Felipe Balbi72246da2011-08-19 18:10:58 +0300213 ret = -ESHUTDOWN;
214 goto out;
215 }
216
217 /* we share one TRB for ep0/1 */
Felipe Balbiaa3342c2016-03-14 11:01:31 +0200218 if (!list_empty(&dep->pending_list)) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300219 ret = -EBUSY;
220 goto out;
221 }
222
Felipe Balbi72246da2011-08-19 18:10:58 +0300223 ret = __dwc3_gadget_ep0_queue(dep, req);
224
225out:
226 spin_unlock_irqrestore(&dwc->lock, flags);
227
228 return ret;
229}
230
231static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)
232{
Felipe Balbi2dfe37d2012-07-23 09:07:41 +0300233 struct dwc3_ep *dep;
234
235 /* reinitialize physical ep1 */
236 dep = dwc->eps[1];
237 dep->flags = DWC3_EP_ENABLED;
Felipe Balbid7422202011-09-08 18:17:12 +0300238
Felipe Balbi72246da2011-08-19 18:10:58 +0300239 /* stall is always issued on EP0 */
Felipe Balbi2dfe37d2012-07-23 09:07:41 +0300240 dep = dwc->eps[0];
Felipe Balbi7a608552014-09-24 14:19:52 -0500241 __dwc3_gadget_ep_set_halt(dep, 1, false);
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200242 dep->flags = DWC3_EP_ENABLED;
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100243 dwc->delayed_status = false;
Felipe Balbid7422202011-09-08 18:17:12 +0300244
Felipe Balbiaa3342c2016-03-14 11:01:31 +0200245 if (!list_empty(&dep->pending_list)) {
Felipe Balbid7422202011-09-08 18:17:12 +0300246 struct dwc3_request *req;
247
Felipe Balbiaa3342c2016-03-14 11:01:31 +0200248 req = next_request(&dep->pending_list);
Felipe Balbid7422202011-09-08 18:17:12 +0300249 dwc3_gadget_giveback(dep, req, -ECONNRESET);
250 }
251
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300252 dwc->ep0state = EP0_SETUP_PHASE;
Felipe Balbi72246da2011-08-19 18:10:58 +0300253 dwc3_ep0_out_start(dwc);
254}
255
Felipe Balbi33fb6912014-09-24 10:46:46 -0500256int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
Pratyush Anand08f0d962012-06-25 22:40:43 +0530257{
258 struct dwc3_ep *dep = to_dwc3_ep(ep);
259 struct dwc3 *dwc = dep->dwc;
260
261 dwc3_ep0_stall_and_restart(dwc);
262
263 return 0;
264}
265
Felipe Balbi33fb6912014-09-24 10:46:46 -0500266int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
267{
268 struct dwc3_ep *dep = to_dwc3_ep(ep);
269 struct dwc3 *dwc = dep->dwc;
270 unsigned long flags;
271 int ret;
272
273 spin_lock_irqsave(&dwc->lock, flags);
274 ret = __dwc3_gadget_ep0_set_halt(ep, value);
275 spin_unlock_irqrestore(&dwc->lock, flags);
276
277 return ret;
278}
279
Felipe Balbi72246da2011-08-19 18:10:58 +0300280void dwc3_ep0_out_start(struct dwc3 *dwc)
281{
Felipe Balbi72246da2011-08-19 18:10:58 +0300282 int ret;
283
Baolin Wangbb014732016-10-14 17:11:33 +0800284 complete(&dwc->ep0_in_setup);
285
Felipe Balbi19ec3122016-12-20 14:08:48 +0200286 dwc3_ep0_prepare_one_trb(dwc, 0, dwc->ctrl_req_addr, 8,
Kishon Vijay Abraham I368ca112015-07-27 12:25:30 +0530287 DWC3_TRBCTL_CONTROL_SETUP, false);
Felipe Balbi19ec3122016-12-20 14:08:48 +0200288 ret = dwc3_ep0_start_trans(dwc, 0);
Felipe Balbi72246da2011-08-19 18:10:58 +0300289 WARN_ON(ret < 0);
290}
291
Felipe Balbi72246da2011-08-19 18:10:58 +0300292static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)
293{
294 struct dwc3_ep *dep;
295 u32 windex = le16_to_cpu(wIndex_le);
296 u32 epnum;
297
298 epnum = (windex & USB_ENDPOINT_NUMBER_MASK) << 1;
299 if ((windex & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN)
300 epnum |= 1;
301
302 dep = dwc->eps[epnum];
303 if (dep->flags & DWC3_EP_ENABLED)
304 return dep;
305
306 return NULL;
307}
308
Sebastian Andrzej Siewior8ee62702011-10-18 19:13:29 +0200309static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req)
Felipe Balbi72246da2011-08-19 18:10:58 +0300310{
Felipe Balbi72246da2011-08-19 18:10:58 +0300311}
Felipe Balbi72246da2011-08-19 18:10:58 +0300312/*
313 * ch 9.4.5
314 */
Felipe Balbi25b8ff62011-11-04 12:32:47 +0200315static int dwc3_ep0_handle_status(struct dwc3 *dwc,
316 struct usb_ctrlrequest *ctrl)
Felipe Balbi72246da2011-08-19 18:10:58 +0300317{
318 struct dwc3_ep *dep;
319 u32 recip;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200320 u32 reg;
Felipe Balbi72246da2011-08-19 18:10:58 +0300321 u16 usb_status = 0;
322 __le16 *response_pkt;
323
324 recip = ctrl->bRequestType & USB_RECIP_MASK;
325 switch (recip) {
326 case USB_RECIP_DEVICE:
327 /*
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200328 * LTM will be set once we know how to set this in HW.
Felipe Balbi72246da2011-08-19 18:10:58 +0300329 */
Peter Chenbcdea502015-01-28 16:32:40 +0800330 usb_status |= dwc->gadget.is_selfpowered;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200331
John Younee5cd412016-02-05 17:08:45 -0800332 if ((dwc->speed == DWC3_DSTS_SUPERSPEED) ||
333 (dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200334 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
335 if (reg & DWC3_DCTL_INITU1ENA)
336 usb_status |= 1 << USB_DEV_STAT_U1_ENABLED;
337 if (reg & DWC3_DCTL_INITU2ENA)
338 usb_status |= 1 << USB_DEV_STAT_U2_ENABLED;
339 }
340
Felipe Balbi72246da2011-08-19 18:10:58 +0300341 break;
342
343 case USB_RECIP_INTERFACE:
344 /*
345 * Function Remote Wake Capable D0
346 * Function Remote Wakeup D1
347 */
348 break;
349
350 case USB_RECIP_ENDPOINT:
351 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
352 if (!dep)
Felipe Balbi25b8ff62011-11-04 12:32:47 +0200353 return -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300354
355 if (dep->flags & DWC3_EP_STALL)
356 usb_status = 1 << USB_ENDPOINT_HALT;
357 break;
358 default:
359 return -EINVAL;
Joe Perches2b84f922013-10-08 16:01:37 -0700360 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300361
362 response_pkt = (__le16 *) dwc->setup_buf;
363 *response_pkt = cpu_to_le16(usb_status);
Felipe Balbie2617792011-11-29 10:35:47 +0200364
365 dep = dwc->eps[0];
366 dwc->ep0_usb_req.dep = dep;
Sebastian Andrzej Siewiore0ce0b02011-11-25 12:03:46 +0100367 dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
Felipe Balbi0fc9a1b2011-12-19 11:32:34 +0200368 dwc->ep0_usb_req.request.buf = dwc->setup_buf;
Sebastian Andrzej Siewiore0ce0b02011-11-25 12:03:46 +0100369 dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
Felipe Balbie2617792011-11-29 10:35:47 +0200370
371 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
Felipe Balbi72246da2011-08-19 18:10:58 +0300372}
373
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300374static int dwc3_ep0_handle_u1(struct dwc3 *dwc, enum usb_device_state state,
375 int set)
Felipe Balbi72246da2011-08-19 18:10:58 +0300376{
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300377 u32 reg;
Felipe Balbi72246da2011-08-19 18:10:58 +0300378
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300379 if (state != USB_STATE_CONFIGURED)
380 return -EINVAL;
381 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
382 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
383 return -EINVAL;
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200384
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300385 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
386 if (set)
387 reg |= DWC3_DCTL_INITU1ENA;
388 else
389 reg &= ~DWC3_DCTL_INITU1ENA;
390 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
Felipe Balbi72246da2011-08-19 18:10:58 +0300391
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300392 return 0;
393}
Felipe Balbi72246da2011-08-19 18:10:58 +0300394
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300395static int dwc3_ep0_handle_u2(struct dwc3 *dwc, enum usb_device_state state,
396 int set)
397{
398 u32 reg;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200399
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200400
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300401 if (state != USB_STATE_CONFIGURED)
402 return -EINVAL;
403 if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
404 (dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
405 return -EINVAL;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200406
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300407 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
408 if (set)
409 reg |= DWC3_DCTL_INITU2ENA;
410 else
411 reg &= ~DWC3_DCTL_INITU2ENA;
412 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
Felipe Balbi72246da2011-08-19 18:10:58 +0300413
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300414 return 0;
415}
Felipe Balbi72246da2011-08-19 18:10:58 +0300416
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300417static int dwc3_ep0_handle_test(struct dwc3 *dwc, enum usb_device_state state,
418 u32 wIndex, int set)
419{
420 if ((wIndex & 0xff) != 0)
421 return -EINVAL;
422 if (!set)
423 return -EINVAL;
424
425 switch (wIndex >> 8) {
426 case TEST_J:
427 case TEST_K:
428 case TEST_SE0_NAK:
429 case TEST_PACKET:
430 case TEST_FORCE_EN:
431 dwc->test_mode_nr = wIndex >> 8;
432 dwc->test_mode = true;
Felipe Balbi72246da2011-08-19 18:10:58 +0300433 break;
Felipe Balbi72246da2011-08-19 18:10:58 +0300434 default:
435 return -EINVAL;
Joe Perches2b84f922013-10-08 16:01:37 -0700436 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300437
Felipe Balbi72246da2011-08-19 18:10:58 +0300438 return 0;
439}
440
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300441static int dwc3_ep0_handle_device(struct dwc3 *dwc,
442 struct usb_ctrlrequest *ctrl, int set)
443{
444 enum usb_device_state state;
445 u32 wValue;
446 u32 wIndex;
447 int ret = 0;
448
449 wValue = le16_to_cpu(ctrl->wValue);
450 wIndex = le16_to_cpu(ctrl->wIndex);
451 state = dwc->gadget.state;
452
453 switch (wValue) {
454 case USB_DEVICE_REMOTE_WAKEUP:
455 break;
456 /*
457 * 9.4.1 says only only for SS, in AddressState only for
458 * default control pipe
459 */
460 case USB_DEVICE_U1_ENABLE:
461 ret = dwc3_ep0_handle_u1(dwc, state, set);
462 break;
463 case USB_DEVICE_U2_ENABLE:
464 ret = dwc3_ep0_handle_u2(dwc, state, set);
465 break;
466 case USB_DEVICE_LTM_ENABLE:
467 ret = -EINVAL;
468 break;
469 case USB_DEVICE_TEST_MODE:
470 ret = dwc3_ep0_handle_test(dwc, state, wIndex, set);
471 break;
472 default:
473 ret = -EINVAL;
474 }
475
476 return ret;
477}
478
479static int dwc3_ep0_handle_intf(struct dwc3 *dwc,
480 struct usb_ctrlrequest *ctrl, int set)
481{
482 enum usb_device_state state;
483 u32 wValue;
484 u32 wIndex;
485 int ret = 0;
486
487 wValue = le16_to_cpu(ctrl->wValue);
488 wIndex = le16_to_cpu(ctrl->wIndex);
489 state = dwc->gadget.state;
490
491 switch (wValue) {
492 case USB_INTRF_FUNC_SUSPEND:
Arnd Bergmann1c404b52016-11-16 16:37:30 +0100493 /*
494 * REVISIT: Ideally we would enable some low power mode here,
495 * however it's unclear what we should be doing here.
496 *
497 * For now, we're not doing anything, just making sure we return
498 * 0 so USB Command Verifier tests pass without any errors.
499 */
Felipe Balbi39e07ff2016-10-03 12:55:29 +0300500 break;
501 default:
502 ret = -EINVAL;
503 }
504
505 return ret;
506}
507
508static int dwc3_ep0_handle_endpoint(struct dwc3 *dwc,
509 struct usb_ctrlrequest *ctrl, int set)
510{
511 struct dwc3_ep *dep;
512 enum usb_device_state state;
513 u32 wValue;
514 u32 wIndex;
515 int ret;
516
517 wValue = le16_to_cpu(ctrl->wValue);
518 wIndex = le16_to_cpu(ctrl->wIndex);
519 state = dwc->gadget.state;
520
521 switch (wValue) {
522 case USB_ENDPOINT_HALT:
523 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
524 if (!dep)
525 return -EINVAL;
526
527 if (set == 0 && (dep->flags & DWC3_EP_WEDGE))
528 break;
529
530 ret = __dwc3_gadget_ep_set_halt(dep, set, true);
531 if (ret)
532 return -EINVAL;
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 return 0;
539}
540
541static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
542 struct usb_ctrlrequest *ctrl, int set)
543{
544 u32 recip;
545 int ret;
546 enum usb_device_state state;
547
548 recip = ctrl->bRequestType & USB_RECIP_MASK;
549 state = dwc->gadget.state;
550
551 switch (recip) {
552 case USB_RECIP_DEVICE:
553 ret = dwc3_ep0_handle_device(dwc, ctrl, set);
554 break;
555 case USB_RECIP_INTERFACE:
556 ret = dwc3_ep0_handle_intf(dwc, ctrl, set);
557 break;
558 case USB_RECIP_ENDPOINT:
559 ret = dwc3_ep0_handle_endpoint(dwc, ctrl, set);
560 break;
561 default:
562 ret = -EINVAL;
563 }
564
565 return ret;
566}
567
Felipe Balbi72246da2011-08-19 18:10:58 +0300568static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
569{
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200570 enum usb_device_state state = dwc->gadget.state;
Felipe Balbi72246da2011-08-19 18:10:58 +0300571 u32 addr;
572 u32 reg;
573
574 addr = le16_to_cpu(ctrl->wValue);
Felipe Balbif96a6ec2011-10-15 21:37:35 +0300575 if (addr > 127) {
Felipe Balbi5eb30ce2016-11-03 14:07:51 +0200576 dev_err(dwc->dev, "invalid device address %d\n", addr);
Felipe Balbi72246da2011-08-19 18:10:58 +0300577 return -EINVAL;
Felipe Balbif96a6ec2011-10-15 21:37:35 +0300578 }
579
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200580 if (state == USB_STATE_CONFIGURED) {
Felipe Balbi5eb30ce2016-11-03 14:07:51 +0200581 dev_err(dwc->dev, "can't SetAddress() from Configured State\n");
Felipe Balbif96a6ec2011-10-15 21:37:35 +0300582 return -EINVAL;
583 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300584
Felipe Balbi26460212011-09-30 10:58:36 +0300585 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
586 reg &= ~(DWC3_DCFG_DEVADDR_MASK);
587 reg |= DWC3_DCFG_DEVADDR(addr);
588 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
Felipe Balbi72246da2011-08-19 18:10:58 +0300589
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200590 if (addr)
Felipe Balbi14cd5922011-12-19 13:01:52 +0200591 usb_gadget_set_state(&dwc->gadget, USB_STATE_ADDRESS);
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200592 else
Felipe Balbi14cd5922011-12-19 13:01:52 +0200593 usb_gadget_set_state(&dwc->gadget, USB_STATE_DEFAULT);
Felipe Balbi72246da2011-08-19 18:10:58 +0300594
Felipe Balbi26460212011-09-30 10:58:36 +0300595 return 0;
Felipe Balbi72246da2011-08-19 18:10:58 +0300596}
597
598static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
599{
600 int ret;
601
602 spin_unlock(&dwc->lock);
603 ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl);
604 spin_lock(&dwc->lock);
605 return ret;
606}
607
608static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
609{
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200610 enum usb_device_state state = dwc->gadget.state;
Felipe Balbi72246da2011-08-19 18:10:58 +0300611 u32 cfg;
612 int ret;
Pratyush Anande274a312012-07-02 10:21:54 +0530613 u32 reg;
Felipe Balbi72246da2011-08-19 18:10:58 +0300614
615 cfg = le16_to_cpu(ctrl->wValue);
616
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200617 switch (state) {
618 case USB_STATE_DEFAULT:
Felipe Balbi72246da2011-08-19 18:10:58 +0300619 return -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300620
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200621 case USB_STATE_ADDRESS:
Felipe Balbi72246da2011-08-19 18:10:58 +0300622 ret = dwc3_ep0_delegate_req(dwc, ctrl);
623 /* if the cfg matches and the cfg is non zero */
Felipe Balbi457e84b2012-01-18 18:04:09 +0200624 if (cfg && (!ret || (ret == USB_GADGET_DELAYED_STATUS))) {
Felipe Balbi7c812902013-07-22 12:41:47 +0300625
626 /*
627 * only change state if set_config has already
628 * been processed. If gadget driver returns
629 * USB_GADGET_DELAYED_STATUS, we will wait
630 * to change the state on the next usb_ep_queue()
631 */
632 if (ret == 0)
633 usb_gadget_set_state(&dwc->gadget,
634 USB_STATE_CONFIGURED);
Felipe Balbi14cd5922011-12-19 13:01:52 +0200635
Pratyush Anande274a312012-07-02 10:21:54 +0530636 /*
637 * Enable transition to U1/U2 state when
638 * nothing is pending from application.
639 */
640 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
641 reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
642 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
Felipe Balbi457e84b2012-01-18 18:04:09 +0200643 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300644 break;
645
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200646 case USB_STATE_CONFIGURED:
Felipe Balbi72246da2011-08-19 18:10:58 +0300647 ret = dwc3_ep0_delegate_req(dwc, ctrl);
Felipe Balbi7a42d832013-07-22 12:31:31 +0300648 if (!cfg && !ret)
Felipe Balbi14cd5922011-12-19 13:01:52 +0200649 usb_gadget_set_state(&dwc->gadget,
650 USB_STATE_ADDRESS);
Felipe Balbi72246da2011-08-19 18:10:58 +0300651 break;
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100652 default:
653 ret = -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300654 }
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100655 return ret;
Felipe Balbi72246da2011-08-19 18:10:58 +0300656}
657
Felipe Balbi865e09e2012-04-24 16:19:49 +0300658static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req)
659{
660 struct dwc3_ep *dep = to_dwc3_ep(ep);
661 struct dwc3 *dwc = dep->dwc;
662
663 u32 param = 0;
664 u32 reg;
665
666 struct timing {
667 u8 u1sel;
668 u8 u1pel;
John Youn501058e2016-05-23 11:32:40 -0700669 __le16 u2sel;
670 __le16 u2pel;
Felipe Balbi865e09e2012-04-24 16:19:49 +0300671 } __packed timing;
672
673 int ret;
674
675 memcpy(&timing, req->buf, sizeof(timing));
676
677 dwc->u1sel = timing.u1sel;
678 dwc->u1pel = timing.u1pel;
Felipe Balbic8cf7af2012-05-31 11:00:28 +0300679 dwc->u2sel = le16_to_cpu(timing.u2sel);
680 dwc->u2pel = le16_to_cpu(timing.u2pel);
Felipe Balbi865e09e2012-04-24 16:19:49 +0300681
682 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
683 if (reg & DWC3_DCTL_INITU2ENA)
684 param = dwc->u2pel;
685 if (reg & DWC3_DCTL_INITU1ENA)
686 param = dwc->u1pel;
687
688 /*
689 * According to Synopsys Databook, if parameter is
690 * greater than 125, a value of zero should be
691 * programmed in the register.
692 */
693 if (param > 125)
694 param = 0;
695
696 /* now that we have the time, issue DGCMD Set Sel */
697 ret = dwc3_send_gadget_generic_command(dwc,
698 DWC3_DGCMD_SET_PERIODIC_PAR, param);
699 WARN_ON(ret < 0);
700}
701
702static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
703{
704 struct dwc3_ep *dep;
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200705 enum usb_device_state state = dwc->gadget.state;
Felipe Balbi865e09e2012-04-24 16:19:49 +0300706 u16 wLength;
707 u16 wValue;
708
Felipe Balbifdba5aa2013-01-25 11:28:19 +0200709 if (state == USB_STATE_DEFAULT)
Felipe Balbi865e09e2012-04-24 16:19:49 +0300710 return -EINVAL;
711
712 wValue = le16_to_cpu(ctrl->wValue);
713 wLength = le16_to_cpu(ctrl->wLength);
714
715 if (wLength != 6) {
716 dev_err(dwc->dev, "Set SEL should be 6 bytes, got %d\n",
717 wLength);
718 return -EINVAL;
719 }
720
721 /*
722 * To handle Set SEL we need to receive 6 bytes from Host. So let's
723 * queue a usb_request for 6 bytes.
724 *
725 * Remember, though, this controller can't handle non-wMaxPacketSize
726 * aligned transfers on the OUT direction, so we queue a request for
727 * wMaxPacketSize instead.
728 */
729 dep = dwc->eps[0];
730 dwc->ep0_usb_req.dep = dep;
731 dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket;
732 dwc->ep0_usb_req.request.buf = dwc->setup_buf;
733 dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl;
734
735 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
736}
737
Felipe Balbic12a0d82012-04-25 10:45:05 +0300738static int dwc3_ep0_set_isoch_delay(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
739{
740 u16 wLength;
741 u16 wValue;
742 u16 wIndex;
743
744 wValue = le16_to_cpu(ctrl->wValue);
745 wLength = le16_to_cpu(ctrl->wLength);
746 wIndex = le16_to_cpu(ctrl->wIndex);
747
748 if (wIndex || wLength)
749 return -EINVAL;
750
751 /*
752 * REVISIT It's unclear from Databook what to do with this
753 * value. For now, just cache it.
754 */
755 dwc->isoch_delay = wValue;
756
757 return 0;
758}
759
Felipe Balbi72246da2011-08-19 18:10:58 +0300760static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
761{
762 int ret;
763
764 switch (ctrl->bRequest) {
765 case USB_REQ_GET_STATUS:
Felipe Balbi72246da2011-08-19 18:10:58 +0300766 ret = dwc3_ep0_handle_status(dwc, ctrl);
767 break;
768 case USB_REQ_CLEAR_FEATURE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300769 ret = dwc3_ep0_handle_feature(dwc, ctrl, 0);
770 break;
771 case USB_REQ_SET_FEATURE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300772 ret = dwc3_ep0_handle_feature(dwc, ctrl, 1);
773 break;
774 case USB_REQ_SET_ADDRESS:
Felipe Balbi72246da2011-08-19 18:10:58 +0300775 ret = dwc3_ep0_set_address(dwc, ctrl);
776 break;
777 case USB_REQ_SET_CONFIGURATION:
Felipe Balbi72246da2011-08-19 18:10:58 +0300778 ret = dwc3_ep0_set_config(dwc, ctrl);
779 break;
Felipe Balbi865e09e2012-04-24 16:19:49 +0300780 case USB_REQ_SET_SEL:
Felipe Balbi865e09e2012-04-24 16:19:49 +0300781 ret = dwc3_ep0_set_sel(dwc, ctrl);
782 break;
Felipe Balbic12a0d82012-04-25 10:45:05 +0300783 case USB_REQ_SET_ISOCH_DELAY:
Felipe Balbic12a0d82012-04-25 10:45:05 +0300784 ret = dwc3_ep0_set_isoch_delay(dwc, ctrl);
785 break;
Felipe Balbi72246da2011-08-19 18:10:58 +0300786 default:
Felipe Balbi72246da2011-08-19 18:10:58 +0300787 ret = dwc3_ep0_delegate_req(dwc, ctrl);
788 break;
Joe Perches2b84f922013-10-08 16:01:37 -0700789 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300790
791 return ret;
792}
793
794static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
795 const struct dwc3_event_depevt *event)
796{
797 struct usb_ctrlrequest *ctrl = dwc->ctrl_req;
Felipe Balbief21ede2012-05-31 10:29:49 +0300798 int ret = -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300799 u32 len;
800
801 if (!dwc->gadget_driver)
Felipe Balbief21ede2012-05-31 10:29:49 +0300802 goto out;
Felipe Balbi72246da2011-08-19 18:10:58 +0300803
Felipe Balbi2c4cbe6e52014-04-30 17:45:10 -0500804 trace_dwc3_ctrl_req(ctrl);
805
Felipe Balbi72246da2011-08-19 18:10:58 +0300806 len = le16_to_cpu(ctrl->wLength);
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300807 if (!len) {
Felipe Balbid95b09b2011-09-30 10:58:37 +0300808 dwc->three_stage_setup = false;
809 dwc->ep0_expect_in = false;
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300810 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
811 } else {
Felipe Balbid95b09b2011-09-30 10:58:37 +0300812 dwc->three_stage_setup = true;
813 dwc->ep0_expect_in = !!(ctrl->bRequestType & USB_DIR_IN);
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300814 dwc->ep0_next_event = DWC3_EP0_NRDY_DATA;
815 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300816
817 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
818 ret = dwc3_ep0_std_request(dwc, ctrl);
819 else
820 ret = dwc3_ep0_delegate_req(dwc, ctrl);
821
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100822 if (ret == USB_GADGET_DELAYED_STATUS)
823 dwc->delayed_status = true;
824
Felipe Balbief21ede2012-05-31 10:29:49 +0300825out:
826 if (ret < 0)
827 dwc3_ep0_stall_and_restart(dwc);
Felipe Balbi72246da2011-08-19 18:10:58 +0300828}
829
830static void dwc3_ep0_complete_data(struct dwc3 *dwc,
831 const struct dwc3_event_depevt *event)
832{
833 struct dwc3_request *r = NULL;
834 struct usb_request *ur;
Felipe Balbif6bafc62012-02-06 11:04:53 +0200835 struct dwc3_trb *trb;
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200836 struct dwc3_ep *ep0;
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +0530837 unsigned transfer_size = 0;
838 unsigned maxp;
839 unsigned remaining_ur_length;
840 void *buf;
841 u32 transferred = 0;
Felipe Balbifca88922012-07-19 09:05:35 +0300842 u32 status;
Felipe Balbif6bafc62012-02-06 11:04:53 +0200843 u32 length;
Felipe Balbi72246da2011-08-19 18:10:58 +0300844 u8 epnum;
845
846 epnum = event->endpoint_number;
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200847 ep0 = dwc->eps[0];
Felipe Balbi72246da2011-08-19 18:10:58 +0300848
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300849 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
850
Felipe Balbif6bafc62012-02-06 11:04:53 +0200851 trb = dwc->ep0_trb;
Felipe Balbifca88922012-07-19 09:05:35 +0300852
Felipe Balbiccb072d2014-10-01 12:20:29 -0500853 trace_dwc3_complete_trb(ep0, trb);
854
Felipe Balbiaa3342c2016-03-14 11:01:31 +0200855 r = next_request(&ep0->pending_list);
Felipe Balbi520fe762014-11-10 14:39:44 -0600856 if (!r)
857 return;
858
Felipe Balbifca88922012-07-19 09:05:35 +0300859 status = DWC3_TRB_SIZE_TRBSTS(trb->size);
860 if (status == DWC3_TRBSTS_SETUP_PENDING) {
Felipe Balbib5d335e2015-11-16 16:20:34 -0600861 dwc->setup_packet_pending = true;
Felipe Balbifca88922012-07-19 09:05:35 +0300862 if (r)
863 dwc3_gadget_giveback(ep0, r, -ECONNRESET);
864
865 return;
866 }
867
Felipe Balbi6856d302014-09-30 11:43:20 -0500868 ur = &r->request;
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +0530869 buf = ur->buf;
870 remaining_ur_length = ur->length;
Felipe Balbi6856d302014-09-30 11:43:20 -0500871
Felipe Balbif6bafc62012-02-06 11:04:53 +0200872 length = trb->size & DWC3_TRB_SIZE_MASK;
Felipe Balbi72246da2011-08-19 18:10:58 +0300873
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +0530874 maxp = ep0->endpoint.maxpacket;
875
Felipe Balbia6829702011-08-27 22:18:09 +0300876 if (dwc->ep0_bounced) {
Kishon Vijay Abraham Ic0bd5452015-07-27 12:25:32 +0530877 /*
878 * Handle the first TRB before handling the bounce buffer if
879 * the request length is greater than the bounce buffer size
880 */
881 if (ur->length > DWC3_EP0_BOUNCE_SIZE) {
882 transfer_size = ALIGN(ur->length - maxp, maxp);
883 transferred = transfer_size - length;
884 buf = (u8 *)buf + transferred;
885 ur->actual += transferred;
886 remaining_ur_length -= transferred;
887
888 trb++;
889 length = trb->size & DWC3_TRB_SIZE_MASK;
890
Felipe Balbi53fd8812016-04-04 15:33:41 +0300891 ep0->trb_enqueue = 0;
Kishon Vijay Abraham Ic0bd5452015-07-27 12:25:32 +0530892 }
893
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +0530894 transfer_size = roundup((ur->length - transfer_size),
895 maxp);
Kishon Vijay Abraham Ib2fb5b12015-07-27 12:25:27 +0530896
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +0530897 transferred = min_t(u32, remaining_ur_length,
898 transfer_size - length);
899 memcpy(buf, dwc->ep0_bounce, transferred);
Felipe Balbia6829702011-08-27 22:18:09 +0300900 } else {
Felipe Balbif6bafc62012-02-06 11:04:53 +0200901 transferred = ur->length - length;
Felipe Balbia6829702011-08-27 22:18:09 +0300902 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300903
Felipe Balbicd423dd2012-03-21 11:44:00 +0200904 ur->actual += transferred;
905
Felipe Balbi72246da2011-08-19 18:10:58 +0300906 if ((epnum & 1) && ur->actual < ur->length) {
907 /* for some reason we did not get everything out */
908
909 dwc3_ep0_stall_and_restart(dwc);
Felipe Balbi72246da2011-08-19 18:10:58 +0300910 } else {
Felipe Balbi36f84ff2014-09-30 10:39:14 -0500911 dwc3_gadget_giveback(ep0, r, 0);
912
913 if (IS_ALIGNED(ur->length, ep0->endpoint.maxpacket) &&
914 ur->length && ur->zero) {
915 int ret;
916
917 dwc->ep0_next_event = DWC3_EP0_COMPLETE;
918
Felipe Balbi19ec3122016-12-20 14:08:48 +0200919 dwc3_ep0_prepare_one_trb(dwc, epnum, dwc->ctrl_req_addr,
920 0, DWC3_TRBCTL_CONTROL_DATA, false);
921 ret = dwc3_ep0_start_trans(dwc, epnum);
Felipe Balbi36f84ff2014-09-30 10:39:14 -0500922 WARN_ON(ret < 0);
923 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300924 }
925}
926
Felipe Balbi85a78102012-05-31 12:32:37 +0300927static void dwc3_ep0_complete_status(struct dwc3 *dwc,
Felipe Balbi72246da2011-08-19 18:10:58 +0300928 const struct dwc3_event_depevt *event)
929{
930 struct dwc3_request *r;
931 struct dwc3_ep *dep;
Felipe Balbifca88922012-07-19 09:05:35 +0300932 struct dwc3_trb *trb;
933 u32 status;
Felipe Balbi72246da2011-08-19 18:10:58 +0300934
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300935 dep = dwc->eps[0];
Felipe Balbifca88922012-07-19 09:05:35 +0300936 trb = dwc->ep0_trb;
Felipe Balbi72246da2011-08-19 18:10:58 +0300937
Felipe Balbiccb072d2014-10-01 12:20:29 -0500938 trace_dwc3_complete_trb(dep, trb);
939
Felipe Balbiaa3342c2016-03-14 11:01:31 +0200940 if (!list_empty(&dep->pending_list)) {
941 r = next_request(&dep->pending_list);
Felipe Balbi72246da2011-08-19 18:10:58 +0300942
943 dwc3_gadget_giveback(dep, r, 0);
944 }
945
Gerard Cauvy3b637362012-02-10 12:21:18 +0200946 if (dwc->test_mode) {
947 int ret;
948
949 ret = dwc3_gadget_set_test_mode(dwc, dwc->test_mode_nr);
950 if (ret < 0) {
Felipe Balbi5eb30ce2016-11-03 14:07:51 +0200951 dev_err(dwc->dev, "invalid test #%d\n",
Gerard Cauvy3b637362012-02-10 12:21:18 +0200952 dwc->test_mode_nr);
953 dwc3_ep0_stall_and_restart(dwc);
Felipe Balbi5c81aba2012-06-25 19:30:49 +0300954 return;
Gerard Cauvy3b637362012-02-10 12:21:18 +0200955 }
956 }
957
Felipe Balbifca88922012-07-19 09:05:35 +0300958 status = DWC3_TRB_SIZE_TRBSTS(trb->size);
Felipe Balbi5eb30ce2016-11-03 14:07:51 +0200959 if (status == DWC3_TRBSTS_SETUP_PENDING)
Felipe Balbib5d335e2015-11-16 16:20:34 -0600960 dwc->setup_packet_pending = true;
Felipe Balbifca88922012-07-19 09:05:35 +0300961
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300962 dwc->ep0state = EP0_SETUP_PHASE;
Felipe Balbi72246da2011-08-19 18:10:58 +0300963 dwc3_ep0_out_start(dwc);
964}
965
966static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
967 const struct dwc3_event_depevt *event)
968{
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300969 struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
970
971 dep->flags &= ~DWC3_EP_BUSY;
Felipe Balbib4996a82012-06-06 12:04:13 +0300972 dep->resource_index = 0;
Felipe Balbidf62df52011-10-14 15:11:49 +0300973 dwc->setup_packet_pending = false;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300974
Felipe Balbi72246da2011-08-19 18:10:58 +0300975 switch (dwc->ep0state) {
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300976 case EP0_SETUP_PHASE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300977 dwc3_ep0_inspect_setup(dwc, event);
978 break;
979
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300980 case EP0_DATA_PHASE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300981 dwc3_ep0_complete_data(dwc, event);
982 break;
983
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300984 case EP0_STATUS_PHASE:
Felipe Balbi85a78102012-05-31 12:32:37 +0300985 dwc3_ep0_complete_status(dwc, event);
Felipe Balbi72246da2011-08-19 18:10:58 +0300986 break;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300987 default:
988 WARN(true, "UNKNOWN ep0state %d\n", dwc->ep0state);
Felipe Balbi72246da2011-08-19 18:10:58 +0300989 }
990}
991
Felipe Balbia0807882012-05-04 13:03:54 +0300992static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
993 struct dwc3_ep *dep, struct dwc3_request *req)
994{
995 int ret;
996
997 req->direction = !!dep->number;
998
999 if (req->request.length == 0) {
Felipe Balbi19ec3122016-12-20 14:08:48 +02001000 dwc3_ep0_prepare_one_trb(dwc, dep->number,
Felipe Balbia0807882012-05-04 13:03:54 +03001001 dwc->ctrl_req_addr, 0,
Kishon Vijay Abraham I368ca112015-07-27 12:25:30 +05301002 DWC3_TRBCTL_CONTROL_DATA, false);
Felipe Balbi19ec3122016-12-20 14:08:48 +02001003 ret = dwc3_ep0_start_trans(dwc, dep->number);
Felipe Balbic74c6d42012-05-04 13:08:22 +03001004 } else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket)
Felipe Balbia0807882012-05-04 13:03:54 +03001005 && (dep->number == 0)) {
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +05301006 u32 transfer_size = 0;
Andrew Mortonc390b032013-03-08 09:42:50 +02001007 u32 maxpacket;
Felipe Balbia0807882012-05-04 13:03:54 +03001008
Arnd Bergmannd64ff402016-11-17 17:13:47 +05301009 ret = usb_gadget_map_request_by_dev(dwc->sysdev,
1010 &req->request, dep->number);
Felipe Balbi5eb30ce2016-11-03 14:07:51 +02001011 if (ret)
Felipe Balbia0807882012-05-04 13:03:54 +03001012 return;
Felipe Balbia0807882012-05-04 13:03:54 +03001013
Andrew Mortonc390b032013-03-08 09:42:50 +02001014 maxpacket = dep->endpoint.maxpacket;
Kishon Vijay Abraham Ic0bd5452015-07-27 12:25:32 +05301015
1016 if (req->request.length > DWC3_EP0_BOUNCE_SIZE) {
1017 transfer_size = ALIGN(req->request.length - maxpacket,
1018 maxpacket);
Felipe Balbi19ec3122016-12-20 14:08:48 +02001019 dwc3_ep0_prepare_one_trb(dwc, dep->number,
Kishon Vijay Abraham Ic0bd5452015-07-27 12:25:32 +05301020 req->request.dma,
1021 transfer_size,
1022 DWC3_TRBCTL_CONTROL_DATA,
1023 true);
1024 }
1025
Kishon Vijay Abraham I8a344222015-07-27 12:25:29 +05301026 transfer_size = roundup((req->request.length - transfer_size),
1027 maxpacket);
Felipe Balbia0807882012-05-04 13:03:54 +03001028
1029 dwc->ep0_bounced = true;
1030
Felipe Balbi19ec3122016-12-20 14:08:48 +02001031 dwc3_ep0_prepare_one_trb(dwc, dep->number,
Felipe Balbia0807882012-05-04 13:03:54 +03001032 dwc->ep0_bounce_addr, transfer_size,
Kishon Vijay Abraham I368ca112015-07-27 12:25:30 +05301033 DWC3_TRBCTL_CONTROL_DATA, false);
Felipe Balbi19ec3122016-12-20 14:08:48 +02001034 ret = dwc3_ep0_start_trans(dwc, dep->number);
Felipe Balbia0807882012-05-04 13:03:54 +03001035 } else {
Arnd Bergmannd64ff402016-11-17 17:13:47 +05301036 ret = usb_gadget_map_request_by_dev(dwc->sysdev,
1037 &req->request, dep->number);
Felipe Balbi5eb30ce2016-11-03 14:07:51 +02001038 if (ret)
Felipe Balbia0807882012-05-04 13:03:54 +03001039 return;
Felipe Balbia0807882012-05-04 13:03:54 +03001040
Felipe Balbi19ec3122016-12-20 14:08:48 +02001041 dwc3_ep0_prepare_one_trb(dwc, dep->number, req->request.dma,
Kishon Vijay Abraham I368ca112015-07-27 12:25:30 +05301042 req->request.length, DWC3_TRBCTL_CONTROL_DATA,
1043 false);
Felipe Balbi19ec3122016-12-20 14:08:48 +02001044 ret = dwc3_ep0_start_trans(dwc, dep->number);
Felipe Balbia0807882012-05-04 13:03:54 +03001045 }
1046
1047 WARN_ON(ret < 0);
1048}
1049
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001050static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001051{
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001052 struct dwc3 *dwc = dep->dwc;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001053 u32 type;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001054
1055 type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3
1056 : DWC3_TRBCTL_CONTROL_STATUS2;
1057
Felipe Balbi19ec3122016-12-20 14:08:48 +02001058 dwc3_ep0_prepare_one_trb(dwc, dep->number,
Kishon Vijay Abraham I368ca112015-07-27 12:25:30 +05301059 dwc->ctrl_req_addr, 0, type, false);
Felipe Balbi19ec3122016-12-20 14:08:48 +02001060 return dwc3_ep0_start_trans(dwc, dep->number);
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001061}
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001062
Felipe Balbi788a23f2012-05-21 14:22:41 +03001063static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001064{
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001065 WARN_ON(dwc3_ep0_start_control_status(dep));
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001066}
1067
Felipe Balbi788a23f2012-05-21 14:22:41 +03001068static void dwc3_ep0_do_control_status(struct dwc3 *dwc,
1069 const struct dwc3_event_depevt *event)
1070{
1071 struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
1072
1073 __dwc3_ep0_do_control_status(dwc, dep);
1074}
1075
Felipe Balbi2e3db062012-07-19 09:26:59 +03001076static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep)
1077{
1078 struct dwc3_gadget_ep_cmd_params params;
1079 u32 cmd;
1080 int ret;
1081
1082 if (!dep->resource_index)
1083 return;
1084
1085 cmd = DWC3_DEPCMD_ENDTRANSFER;
1086 cmd |= DWC3_DEPCMD_CMDIOC;
1087 cmd |= DWC3_DEPCMD_PARAM(dep->resource_index);
1088 memset(&params, 0, sizeof(params));
Felipe Balbi2cd47182016-04-12 16:42:43 +03001089 ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
Felipe Balbi2e3db062012-07-19 09:26:59 +03001090 WARN_ON_ONCE(ret);
1091 dep->resource_index = 0;
1092}
1093
Felipe Balbi72246da2011-08-19 18:10:58 +03001094static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
1095 const struct dwc3_event_depevt *event)
1096{
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001097 switch (event->status) {
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001098 case DEPEVT_STATUS_CONTROL_DATA:
Felipe Balbi55f3fba2011-09-08 18:27:33 +03001099 /*
Felipe Balbi2e3db062012-07-19 09:26:59 +03001100 * We already have a DATA transfer in the controller's cache,
1101 * if we receive a XferNotReady(DATA) we will ignore it, unless
1102 * it's for the wrong direction.
Felipe Balbi55f3fba2011-09-08 18:27:33 +03001103 *
Felipe Balbi2e3db062012-07-19 09:26:59 +03001104 * In that case, we must issue END_TRANSFER command to the Data
1105 * Phase we already have started and issue SetStall on the
1106 * control endpoint.
Felipe Balbi55f3fba2011-09-08 18:27:33 +03001107 */
1108 if (dwc->ep0_expect_in != event->endpoint_number) {
Felipe Balbi2e3db062012-07-19 09:26:59 +03001109 struct dwc3_ep *dep = dwc->eps[dwc->ep0_expect_in];
1110
Felipe Balbi5eb30ce2016-11-03 14:07:51 +02001111 dev_err(dwc->dev, "unexpected direction for Data Phase\n");
Felipe Balbi2e3db062012-07-19 09:26:59 +03001112 dwc3_ep0_end_control_data(dwc, dep);
Felipe Balbi55f3fba2011-09-08 18:27:33 +03001113 dwc3_ep0_stall_and_restart(dwc);
1114 return;
1115 }
1116
Felipe Balbi72246da2011-08-19 18:10:58 +03001117 break;
Felipe Balbi1ddcb212011-08-30 15:52:17 +03001118
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001119 case DEPEVT_STATUS_CONTROL_STATUS:
Felipe Balbi77fa6df2012-07-23 09:09:32 +03001120 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS)
1121 return;
1122
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001123 dwc->ep0state = EP0_STATUS_PHASE;
1124
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +01001125 if (dwc->delayed_status) {
Baolin Wang53896792017-01-14 16:40:39 +08001126 struct dwc3_ep *dep = dwc->eps[0];
1127
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +01001128 WARN_ON_ONCE(event->endpoint_number != 1);
Baolin Wang53896792017-01-14 16:40:39 +08001129 /*
1130 * We should handle the delay STATUS phase here if the
1131 * request for handling delay STATUS has been queued
1132 * into the list.
1133 */
1134 if (!list_empty(&dep->pending_list)) {
1135 dwc->delayed_status = false;
1136 usb_gadget_set_state(&dwc->gadget,
1137 USB_STATE_CONFIGURED);
1138 dwc3_ep0_do_control_status(dwc, event);
1139 }
1140
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +01001141 return;
1142 }
1143
Felipe Balbi788a23f2012-05-21 14:22:41 +03001144 dwc3_ep0_do_control_status(dwc, event);
Felipe Balbi72246da2011-08-19 18:10:58 +03001145 }
1146}
1147
1148void dwc3_ep0_interrupt(struct dwc3 *dwc,
Felipe Balbi8becf272011-11-04 12:40:05 +02001149 const struct dwc3_event_depevt *event)
Felipe Balbi72246da2011-08-19 18:10:58 +03001150{
Felipe Balbi72246da2011-08-19 18:10:58 +03001151 switch (event->endpoint_event) {
1152 case DWC3_DEPEVT_XFERCOMPLETE:
1153 dwc3_ep0_xfer_complete(dwc, event);
1154 break;
1155
1156 case DWC3_DEPEVT_XFERNOTREADY:
1157 dwc3_ep0_xfernotready(dwc, event);
1158 break;
1159
1160 case DWC3_DEPEVT_XFERINPROGRESS:
1161 case DWC3_DEPEVT_RXTXFIFOEVT:
1162 case DWC3_DEPEVT_STREAMEVT:
1163 case DWC3_DEPEVT_EPCMDCMPLT:
1164 break;
1165 }
1166}