Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2001 by David Brownell |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the |
| 6 | * Free Software Foundation; either version 2 of the License, or (at your |
| 7 | * option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but |
| 10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 12 | * for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software Foundation, |
| 16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 17 | */ |
| 18 | |
| 19 | /* this file is part of ehci-hcd.c */ |
| 20 | |
| 21 | /*-------------------------------------------------------------------------*/ |
| 22 | |
| 23 | /* |
| 24 | * There's basically three types of memory: |
| 25 | * - data used only by the HCD ... kmalloc is fine |
| 26 | * - async and periodic schedules, shared by HC and HCD ... these |
| 27 | * need to use dma_pool or dma_alloc_coherent |
| 28 | * - driver buffers, read/written by HC ... single shot DMA mapped |
| 29 | * |
| 30 | * There's also PCI "register" data, which is memory mapped. |
| 31 | * No memory seen by this driver is pageable. |
| 32 | */ |
| 33 | |
| 34 | /*-------------------------------------------------------------------------*/ |
| 35 | |
| 36 | /* Allocate the key transfer structures from the previously allocated pool */ |
| 37 | |
| 38 | static inline void ehci_qtd_init (struct ehci_qtd *qtd, dma_addr_t dma) |
| 39 | { |
| 40 | memset (qtd, 0, sizeof *qtd); |
| 41 | qtd->qtd_dma = dma; |
| 42 | qtd->hw_token = cpu_to_le32 (QTD_STS_HALT); |
| 43 | qtd->hw_next = EHCI_LIST_END; |
| 44 | qtd->hw_alt_next = EHCI_LIST_END; |
| 45 | INIT_LIST_HEAD (&qtd->qtd_list); |
| 46 | } |
| 47 | |
Al Viro | 55016f1 | 2005-10-21 03:21:58 -0400 | [diff] [blame] | 48 | static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | { |
| 50 | struct ehci_qtd *qtd; |
| 51 | dma_addr_t dma; |
| 52 | |
| 53 | qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma); |
| 54 | if (qtd != NULL) { |
| 55 | ehci_qtd_init (qtd, dma); |
| 56 | } |
| 57 | return qtd; |
| 58 | } |
| 59 | |
| 60 | static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd) |
| 61 | { |
| 62 | dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma); |
| 63 | } |
| 64 | |
| 65 | |
| 66 | static void qh_destroy (struct kref *kref) |
| 67 | { |
| 68 | struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref); |
| 69 | struct ehci_hcd *ehci = qh->ehci; |
| 70 | |
| 71 | /* clean qtds first, and know this is not linked */ |
| 72 | if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) { |
| 73 | ehci_dbg (ehci, "unused qh not empty!\n"); |
| 74 | BUG (); |
| 75 | } |
| 76 | if (qh->dummy) |
| 77 | ehci_qtd_free (ehci, qh->dummy); |
| 78 | usb_put_dev (qh->dev); |
| 79 | dma_pool_free (ehci->qh_pool, qh, qh->qh_dma); |
| 80 | } |
| 81 | |
Al Viro | 55016f1 | 2005-10-21 03:21:58 -0400 | [diff] [blame] | 82 | static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | { |
| 84 | struct ehci_qh *qh; |
| 85 | dma_addr_t dma; |
| 86 | |
| 87 | qh = (struct ehci_qh *) |
| 88 | dma_pool_alloc (ehci->qh_pool, flags, &dma); |
| 89 | if (!qh) |
| 90 | return qh; |
| 91 | |
| 92 | memset (qh, 0, sizeof *qh); |
| 93 | kref_init(&qh->kref); |
| 94 | qh->ehci = ehci; |
| 95 | qh->qh_dma = dma; |
| 96 | // INIT_LIST_HEAD (&qh->qh_list); |
| 97 | INIT_LIST_HEAD (&qh->qtd_list); |
| 98 | |
| 99 | /* dummy td enables safe urb queuing */ |
| 100 | qh->dummy = ehci_qtd_alloc (ehci, flags); |
| 101 | if (qh->dummy == NULL) { |
| 102 | ehci_dbg (ehci, "no dummy td\n"); |
| 103 | dma_pool_free (ehci->qh_pool, qh, qh->qh_dma); |
| 104 | qh = NULL; |
| 105 | } |
| 106 | return qh; |
| 107 | } |
| 108 | |
| 109 | /* to share a qh (cpu threads, or hc) */ |
| 110 | static inline struct ehci_qh *qh_get (struct ehci_qh *qh) |
| 111 | { |
| 112 | kref_get(&qh->kref); |
| 113 | return qh; |
| 114 | } |
| 115 | |
| 116 | static inline void qh_put (struct ehci_qh *qh) |
| 117 | { |
| 118 | kref_put(&qh->kref, qh_destroy); |
| 119 | } |
| 120 | |
| 121 | /*-------------------------------------------------------------------------*/ |
| 122 | |
| 123 | /* The queue heads and transfer descriptors are managed from pools tied |
| 124 | * to each of the "per device" structures. |
| 125 | * This is the initialisation and cleanup code. |
| 126 | */ |
| 127 | |
| 128 | static void ehci_mem_cleanup (struct ehci_hcd *ehci) |
| 129 | { |
| 130 | if (ehci->async) |
| 131 | qh_put (ehci->async); |
| 132 | ehci->async = NULL; |
| 133 | |
| 134 | /* DMA consistent memory and pools */ |
| 135 | if (ehci->qtd_pool) |
| 136 | dma_pool_destroy (ehci->qtd_pool); |
| 137 | ehci->qtd_pool = NULL; |
| 138 | |
| 139 | if (ehci->qh_pool) { |
| 140 | dma_pool_destroy (ehci->qh_pool); |
| 141 | ehci->qh_pool = NULL; |
| 142 | } |
| 143 | |
| 144 | if (ehci->itd_pool) |
| 145 | dma_pool_destroy (ehci->itd_pool); |
| 146 | ehci->itd_pool = NULL; |
| 147 | |
| 148 | if (ehci->sitd_pool) |
| 149 | dma_pool_destroy (ehci->sitd_pool); |
| 150 | ehci->sitd_pool = NULL; |
| 151 | |
| 152 | if (ehci->periodic) |
| 153 | dma_free_coherent (ehci_to_hcd(ehci)->self.controller, |
| 154 | ehci->periodic_size * sizeof (u32), |
| 155 | ehci->periodic, ehci->periodic_dma); |
| 156 | ehci->periodic = NULL; |
| 157 | |
| 158 | /* shadow periodic table */ |
Jesper Juhl | 1bc3c9e | 2005-04-18 17:39:34 -0700 | [diff] [blame] | 159 | kfree(ehci->pshadow); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | ehci->pshadow = NULL; |
| 161 | } |
| 162 | |
| 163 | /* remember to add cleanup code (above) if you add anything here */ |
Al Viro | 55016f1 | 2005-10-21 03:21:58 -0400 | [diff] [blame] | 164 | static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | { |
| 166 | int i; |
| 167 | |
| 168 | /* QTDs for control/bulk/intr transfers */ |
| 169 | ehci->qtd_pool = dma_pool_create ("ehci_qtd", |
| 170 | ehci_to_hcd(ehci)->self.controller, |
| 171 | sizeof (struct ehci_qtd), |
| 172 | 32 /* byte alignment (for hw parts) */, |
| 173 | 4096 /* can't cross 4K */); |
| 174 | if (!ehci->qtd_pool) { |
| 175 | goto fail; |
| 176 | } |
| 177 | |
| 178 | /* QHs for control/bulk/intr transfers */ |
| 179 | ehci->qh_pool = dma_pool_create ("ehci_qh", |
| 180 | ehci_to_hcd(ehci)->self.controller, |
| 181 | sizeof (struct ehci_qh), |
| 182 | 32 /* byte alignment (for hw parts) */, |
| 183 | 4096 /* can't cross 4K */); |
| 184 | if (!ehci->qh_pool) { |
| 185 | goto fail; |
| 186 | } |
| 187 | ehci->async = ehci_qh_alloc (ehci, flags); |
| 188 | if (!ehci->async) { |
| 189 | goto fail; |
| 190 | } |
| 191 | |
| 192 | /* ITD for high speed ISO transfers */ |
| 193 | ehci->itd_pool = dma_pool_create ("ehci_itd", |
| 194 | ehci_to_hcd(ehci)->self.controller, |
| 195 | sizeof (struct ehci_itd), |
| 196 | 32 /* byte alignment (for hw parts) */, |
| 197 | 4096 /* can't cross 4K */); |
| 198 | if (!ehci->itd_pool) { |
| 199 | goto fail; |
| 200 | } |
| 201 | |
| 202 | /* SITD for full/low speed split ISO transfers */ |
| 203 | ehci->sitd_pool = dma_pool_create ("ehci_sitd", |
| 204 | ehci_to_hcd(ehci)->self.controller, |
| 205 | sizeof (struct ehci_sitd), |
| 206 | 32 /* byte alignment (for hw parts) */, |
| 207 | 4096 /* can't cross 4K */); |
| 208 | if (!ehci->sitd_pool) { |
| 209 | goto fail; |
| 210 | } |
| 211 | |
| 212 | /* Hardware periodic table */ |
| 213 | ehci->periodic = (__le32 *) |
| 214 | dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller, |
| 215 | ehci->periodic_size * sizeof(__le32), |
| 216 | &ehci->periodic_dma, 0); |
| 217 | if (ehci->periodic == NULL) { |
| 218 | goto fail; |
| 219 | } |
| 220 | for (i = 0; i < ehci->periodic_size; i++) |
| 221 | ehci->periodic [i] = EHCI_LIST_END; |
| 222 | |
| 223 | /* software shadow of hardware table */ |
| 224 | ehci->pshadow = kmalloc (ehci->periodic_size * sizeof (void *), flags); |
| 225 | if (ehci->pshadow == NULL) { |
| 226 | goto fail; |
| 227 | } |
| 228 | memset (ehci->pshadow, 0, ehci->periodic_size * sizeof (void *)); |
| 229 | |
| 230 | return 0; |
| 231 | |
| 232 | fail: |
| 233 | ehci_dbg (ehci, "couldn't init memory\n"); |
| 234 | ehci_mem_cleanup (ehci); |
| 235 | return -ENOMEM; |
| 236 | } |