blob: 7b5350060612786c566d6f96cbffa2f444a91453 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/kernel/setup.c
3 *
4 * Copyright (C) 1995-2001 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
Ard Biesheuvelda58fb62015-09-24 13:49:52 -070010#include <linux/efi.h>
Paul Gortmakerecea4ab2011-07-22 10:58:34 -040011#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <linux/kernel.h>
13#include <linux/stddef.h>
14#include <linux/ioport.h>
15#include <linux/delay.h>
16#include <linux/utsname.h>
17#include <linux/initrd.h>
18#include <linux/console.h>
19#include <linux/bootmem.h>
20#include <linux/seq_file.h>
Jon Smirl894673e2006-07-10 04:44:13 -070021#include <linux/screen_info.h>
Will Deaconaf4dda72014-08-27 17:51:16 +010022#include <linux/of_iommu.h>
Arnd Bergmann883a1062013-01-31 17:51:18 +000023#include <linux/of_platform.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#include <linux/init.h>
Mika Westerberg3c57fb42010-05-10 09:20:22 +010025#include <linux/kexec.h>
Grant Likely93c02ab2011-04-28 14:27:21 -060026#include <linux/of_fdt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/cpu.h>
28#include <linux/interrupt.h>
Russell King7bbb7942006-02-16 11:08:09 +000029#include <linux/smp.h>
Russell Kinge119bff2010-01-10 17:23:29 +000030#include <linux/proc_fs.h>
Russell King2778f622010-07-09 16:27:52 +010031#include <linux/memblock.h>
Dave Martin2ecccf92011-08-19 17:58:35 +010032#include <linux/bug.h>
33#include <linux/compiler.h>
Nicolas Pitre27a3f0e2011-08-25 19:10:29 -040034#include <linux/sort.h>
Mark Rutlandbe120392015-07-31 15:46:19 +010035#include <linux/psci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Catalin Marinasb86040a2009-07-24 12:32:54 +010037#include <asm/unified.h>
Russell King15d07dc2012-03-28 18:30:01 +010038#include <asm/cp15.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <asm/cpu.h>
Russell King0ba8b9b2008-08-10 18:08:10 +010040#include <asm/cputype.h>
Ard Biesheuvelda58fb62015-09-24 13:49:52 -070041#include <asm/efi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070042#include <asm/elf.h>
Ard Biesheuvel29373672015-09-01 08:59:28 +020043#include <asm/early_ioremap.h>
Stefan Agnera5f4c562015-08-13 00:01:52 +010044#include <asm/fixmap.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <asm/procinfo.h>
Stefano Stabellini05774082013-05-21 14:24:11 +000046#include <asm/psci.h>
Russell King37efe642008-12-01 11:53:07 +000047#include <asm/sections.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070048#include <asm/setup.h>
Russell Kingf00ec482010-09-04 10:47:48 +010049#include <asm/smp_plat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#include <asm/mach-types.h>
51#include <asm/cacheflush.h>
Russell King46097c72008-08-10 18:10:19 +010052#include <asm/cachetype.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <asm/tlbflush.h>
Stefano Stabellini5882bfe2015-05-06 14:13:31 +000054#include <asm/xen/hypervisor.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Grant Likely93c02ab2011-04-28 14:27:21 -060056#include <asm/prom.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070057#include <asm/mach/arch.h>
58#include <asm/mach/irq.h>
59#include <asm/mach/time.h>
David Howells9f97da72012-03-28 18:30:01 +010060#include <asm/system_info.h>
61#include <asm/system_misc.h>
Jason Wessel5cbad0e2008-02-20 13:33:40 -060062#include <asm/traps.h>
Catalin Marinasbff595c2009-02-16 11:41:36 +010063#include <asm/unwind.h>
Tejun Heo1c16d242011-12-08 10:22:06 -080064#include <asm/memblock.h>
Dave Martin4588c342012-02-17 16:54:28 +000065#include <asm/virt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070066
Richard Purdie4cd9d6f2008-01-02 00:56:46 +010067#include "atags.h"
Ben Dooks0fc1c832006-03-15 23:17:30 +000068
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
70#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
71char fpe_type[8];
72
73static int __init fpe_setup(char *line)
74{
75 memcpy(fpe_type, line, 8);
76 return 1;
77}
78
79__setup("fpe=", fpe_setup);
80#endif
81
Russell Kingca8f0b02014-05-27 20:34:28 +010082extern void init_default_cache_policy(unsigned long);
Russell Kingff69a4c2013-07-26 14:55:59 +010083extern void paging_init(const struct machine_desc *desc);
Russell King1221ed12015-04-04 17:25:20 +010084extern void early_paging_init(const struct machine_desc *);
Russell King0371d3f2011-07-05 19:58:29 +010085extern void sanity_check_meminfo(void);
Robin Holt16d6d5b2013-07-08 16:01:39 -070086extern enum reboot_mode reboot_mode;
Russell Kingff69a4c2013-07-26 14:55:59 +010087extern void setup_dma_zone(const struct machine_desc *desc);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
89unsigned int processor_id;
Krzysztof Halasac18f6582007-12-18 03:53:27 +010090EXPORT_SYMBOL(processor_id);
Russell King0385ebc2010-12-04 17:45:55 +000091unsigned int __machine_arch_type __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -070092EXPORT_SYMBOL(__machine_arch_type);
Russell King0385ebc2010-12-04 17:45:55 +000093unsigned int cacheid __read_mostly;
Russell Kingc0e95872008-09-25 15:35:28 +010094EXPORT_SYMBOL(cacheid);
Linus Torvalds1da177e2005-04-16 15:20:36 -070095
Bill Gatliff9d20fdd2007-05-31 22:02:22 +010096unsigned int __atags_pointer __initdata;
97
Linus Torvalds1da177e2005-04-16 15:20:36 -070098unsigned int system_rev;
99EXPORT_SYMBOL(system_rev);
100
Paul Kocialkowski3f599872015-05-06 15:23:56 +0100101const char *system_serial;
102EXPORT_SYMBOL(system_serial);
103
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104unsigned int system_serial_low;
105EXPORT_SYMBOL(system_serial_low);
106
107unsigned int system_serial_high;
108EXPORT_SYMBOL(system_serial_high);
109
Russell King0385ebc2010-12-04 17:45:55 +0000110unsigned int elf_hwcap __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111EXPORT_SYMBOL(elf_hwcap);
112
Ard Biesheuvelb342ea42014-02-19 22:28:40 +0100113unsigned int elf_hwcap2 __read_mostly;
114EXPORT_SYMBOL(elf_hwcap2);
115
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116
117#ifdef MULTI_CPU
Russell King0385ebc2010-12-04 17:45:55 +0000118struct processor processor __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119#endif
120#ifdef MULTI_TLB
Russell King0385ebc2010-12-04 17:45:55 +0000121struct cpu_tlb_fns cpu_tlb __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122#endif
123#ifdef MULTI_USER
Russell King0385ebc2010-12-04 17:45:55 +0000124struct cpu_user_fns cpu_user __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125#endif
126#ifdef MULTI_CACHE
Russell King0385ebc2010-12-04 17:45:55 +0000127struct cpu_cache_fns cpu_cache __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128#endif
Catalin Marinas953233d2007-02-05 14:48:08 +0100129#ifdef CONFIG_OUTER_CACHE
Russell King0385ebc2010-12-04 17:45:55 +0000130struct outer_cache_fns outer_cache __read_mostly;
Santosh Shilimkar6c09f092010-02-16 07:57:43 +0100131EXPORT_SYMBOL(outer_cache);
Catalin Marinas953233d2007-02-05 14:48:08 +0100132#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133
Dave Martin2ecccf92011-08-19 17:58:35 +0100134/*
135 * Cached cpu_architecture() result for use by assembler code.
136 * C code should use the cpu_architecture() function instead of accessing this
137 * variable directly.
138 */
139int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
140
Russell Kingccea7a12005-05-31 22:22:32 +0100141struct stack {
142 u32 irq[3];
143 u32 abt[3];
144 u32 und[3];
Daniel Thompsonc0e7f7e2014-09-17 17:12:06 +0100145 u32 fiq[3];
Russell Kingccea7a12005-05-31 22:22:32 +0100146} ____cacheline_aligned;
147
Catalin Marinas55bdd692010-05-21 18:06:41 +0100148#ifndef CONFIG_CPU_V7M
Russell Kingccea7a12005-05-31 22:22:32 +0100149static struct stack stacks[NR_CPUS];
Catalin Marinas55bdd692010-05-21 18:06:41 +0100150#endif
Russell Kingccea7a12005-05-31 22:22:32 +0100151
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152char elf_platform[ELF_PLATFORM_SIZE];
153EXPORT_SYMBOL(elf_platform);
154
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155static const char *cpu_name;
156static const char *machine_name;
Jeremy Kerr48ab7e02010-01-27 01:13:31 +0100157static char __initdata cmd_line[COMMAND_LINE_SIZE];
Russell Kingff69a4c2013-07-26 14:55:59 +0100158const struct machine_desc *machine_desc __initdata;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
161#define ENDIANNESS ((char)endian_test.l)
162
163DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
164
165/*
166 * Standard memory resources
167 */
168static struct resource mem_res[] = {
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700169 {
170 .name = "Video RAM",
171 .start = 0,
172 .end = 0,
173 .flags = IORESOURCE_MEM
174 },
175 {
Kees Cooka36d8e52012-01-18 01:57:21 +0100176 .name = "Kernel code",
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700177 .start = 0,
178 .end = 0,
Toshi Kani35d98e92016-01-26 21:57:22 +0100179 .flags = IORESOURCE_SYSTEM_RAM
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700180 },
181 {
182 .name = "Kernel data",
183 .start = 0,
184 .end = 0,
Toshi Kani35d98e92016-01-26 21:57:22 +0100185 .flags = IORESOURCE_SYSTEM_RAM
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700186 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187};
188
189#define video_ram mem_res[0]
190#define kernel_code mem_res[1]
191#define kernel_data mem_res[2]
192
193static struct resource io_res[] = {
Greg Kroah-Hartman740e5182006-06-12 14:47:06 -0700194 {
195 .name = "reserved",
196 .start = 0x3bc,
197 .end = 0x3be,
198 .flags = IORESOURCE_IO | IORESOURCE_BUSY
199 },
200 {
201 .name = "reserved",
202 .start = 0x378,
203 .end = 0x37f,
204 .flags = IORESOURCE_IO | IORESOURCE_BUSY
205 },
206 {
207 .name = "reserved",
208 .start = 0x278,
209 .end = 0x27f,
210 .flags = IORESOURCE_IO | IORESOURCE_BUSY
211 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212};
213
214#define lp0 io_res[0]
215#define lp1 io_res[1]
216#define lp2 io_res[2]
217
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218static const char *proc_arch[] = {
219 "undefined/unknown",
220 "3",
221 "4",
222 "4T",
223 "5",
224 "5T",
225 "5TE",
226 "5TEJ",
227 "6TEJ",
Catalin Marinas6b090a22006-01-12 16:28:16 +0000228 "7",
Catalin Marinas55bdd692010-05-21 18:06:41 +0100229 "7M",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230 "?(12)",
231 "?(13)",
232 "?(14)",
233 "?(15)",
234 "?(16)",
235 "?(17)",
236};
237
Catalin Marinas55bdd692010-05-21 18:06:41 +0100238#ifdef CONFIG_CPU_V7M
239static int __get_cpu_architecture(void)
240{
241 return CPU_ARCH_ARMv7M;
242}
243#else
Dave Martin2ecccf92011-08-19 17:58:35 +0100244static int __get_cpu_architecture(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245{
246 int cpu_arch;
247
Russell King0ba8b9b2008-08-10 18:08:10 +0100248 if ((read_cpuid_id() & 0x0008f000) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249 cpu_arch = CPU_ARCH_UNKNOWN;
Russell King0ba8b9b2008-08-10 18:08:10 +0100250 } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
251 cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
252 } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
253 cpu_arch = (read_cpuid_id() >> 16) & 7;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 if (cpu_arch)
255 cpu_arch += CPU_ARCH_ARMv3;
Russell King0ba8b9b2008-08-10 18:08:10 +0100256 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
Catalin Marinas180005c2007-09-25 16:49:45 +0100257 /* Revised CPUID format. Read the Memory Model Feature
258 * Register 0 and check for VMSAv7 or PMSAv7 */
Mason526299c2015-03-17 21:37:25 +0100259 unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);
Catalin Marinas315cfe72011-02-15 18:06:57 +0100260 if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
261 (mmfr0 & 0x000000f0) >= 0x00000030)
Catalin Marinas180005c2007-09-25 16:49:45 +0100262 cpu_arch = CPU_ARCH_ARMv7;
263 else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
264 (mmfr0 & 0x000000f0) == 0x00000020)
265 cpu_arch = CPU_ARCH_ARMv6;
266 else
267 cpu_arch = CPU_ARCH_UNKNOWN;
268 } else
269 cpu_arch = CPU_ARCH_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270
271 return cpu_arch;
272}
Catalin Marinas55bdd692010-05-21 18:06:41 +0100273#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274
Dave Martin2ecccf92011-08-19 17:58:35 +0100275int __pure cpu_architecture(void)
276{
277 BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
278
279 return __cpu_architecture;
280}
281
Will Deacon8925ec42010-09-13 16:18:30 +0100282static int cpu_has_aliasing_icache(unsigned int arch)
283{
284 int aliasing_icache;
285 unsigned int id_reg, num_sets, line_size;
286
Will Deacon7f94e9c2011-08-23 22:22:11 +0100287 /* PIPT caches never alias. */
288 if (icache_is_pipt())
289 return 0;
290
Will Deacon8925ec42010-09-13 16:18:30 +0100291 /* arch specifies the register format */
292 switch (arch) {
293 case CPU_ARCH_ARMv7:
Linus Walleij5fb31a92010-10-06 11:07:28 +0100294 asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
295 : /* No output operands */
Will Deacon8925ec42010-09-13 16:18:30 +0100296 : "r" (1));
Linus Walleij5fb31a92010-10-06 11:07:28 +0100297 isb();
298 asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
299 : "=r" (id_reg));
Will Deacon8925ec42010-09-13 16:18:30 +0100300 line_size = 4 << ((id_reg & 0x7) + 2);
301 num_sets = ((id_reg >> 13) & 0x7fff) + 1;
302 aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
303 break;
304 case CPU_ARCH_ARMv6:
305 aliasing_icache = read_cpuid_cachetype() & (1 << 11);
306 break;
307 default:
308 /* I-cache aliases will be handled by D-cache aliasing code */
309 aliasing_icache = 0;
310 }
311
312 return aliasing_icache;
313}
314
Russell Kingc0e95872008-09-25 15:35:28 +0100315static void __init cacheid_init(void)
316{
Russell Kingc0e95872008-09-25 15:35:28 +0100317 unsigned int arch = cpu_architecture();
318
Catalin Marinas55bdd692010-05-21 18:06:41 +0100319 if (arch == CPU_ARCH_ARMv7M) {
320 cacheid = 0;
321 } else if (arch >= CPU_ARCH_ARMv6) {
Uwe Kleine-Königac52e832013-01-30 17:38:21 +0100322 unsigned int cachetype = read_cpuid_cachetype();
Catalin Marinasb57ee992009-03-03 11:44:12 +0100323 if ((cachetype & (7 << 29)) == 4 << 29) {
324 /* ARMv7 register format */
Will Deacon72dc53a2011-08-03 12:37:04 +0100325 arch = CPU_ARCH_ARMv7;
Catalin Marinasb57ee992009-03-03 11:44:12 +0100326 cacheid = CACHEID_VIPT_NONALIASING;
Will Deacon7f94e9c2011-08-23 22:22:11 +0100327 switch (cachetype & (3 << 14)) {
328 case (1 << 14):
Catalin Marinasb57ee992009-03-03 11:44:12 +0100329 cacheid |= CACHEID_ASID_TAGGED;
Will Deacon7f94e9c2011-08-23 22:22:11 +0100330 break;
331 case (3 << 14):
332 cacheid |= CACHEID_PIPT;
333 break;
334 }
Will Deacon8925ec42010-09-13 16:18:30 +0100335 } else {
Will Deacon72dc53a2011-08-03 12:37:04 +0100336 arch = CPU_ARCH_ARMv6;
337 if (cachetype & (1 << 23))
338 cacheid = CACHEID_VIPT_ALIASING;
339 else
340 cacheid = CACHEID_VIPT_NONALIASING;
Will Deacon8925ec42010-09-13 16:18:30 +0100341 }
Will Deacon72dc53a2011-08-03 12:37:04 +0100342 if (cpu_has_aliasing_icache(arch))
343 cacheid |= CACHEID_VIPT_I_ALIASING;
Russell Kingc0e95872008-09-25 15:35:28 +0100344 } else {
345 cacheid = CACHEID_VIVT;
346 }
Russell King2b4ae1f2008-09-25 15:39:20 +0100347
Olof Johansson1b0f6682013-12-05 18:29:35 +0100348 pr_info("CPU: %s data cache, %s instruction cache\n",
Russell King2b4ae1f2008-09-25 15:39:20 +0100349 cache_is_vivt() ? "VIVT" :
350 cache_is_vipt_aliasing() ? "VIPT aliasing" :
Will Deacon7f94e9c2011-08-23 22:22:11 +0100351 cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
Russell King2b4ae1f2008-09-25 15:39:20 +0100352 cache_is_vivt() ? "VIVT" :
353 icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
Will Deacon8925ec42010-09-13 16:18:30 +0100354 icache_is_vipt_aliasing() ? "VIPT aliasing" :
Will Deacon7f94e9c2011-08-23 22:22:11 +0100355 icache_is_pipt() ? "PIPT" :
Russell King2b4ae1f2008-09-25 15:39:20 +0100356 cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
Russell Kingc0e95872008-09-25 15:35:28 +0100357}
358
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359/*
360 * These functions re-use the assembly code in head.S, which
361 * already provide the required functionality.
362 */
Russell King0f44ba12006-02-24 21:04:56 +0000363extern struct proc_info_list *lookup_processor_type(unsigned int);
Russell King6fc31d52011-01-12 17:50:42 +0000364
Grant Likely93c02ab2011-04-28 14:27:21 -0600365void __init early_print(const char *str, ...)
Russell King6fc31d52011-01-12 17:50:42 +0000366{
367 extern void printascii(const char *);
368 char buf[256];
369 va_list ap;
370
371 va_start(ap, str);
372 vsnprintf(buf, sizeof(buf), str, ap);
373 va_end(ap);
374
375#ifdef CONFIG_DEBUG_LL
376 printascii(buf);
377#endif
378 printk("%s", buf);
379}
380
Nicolas Pitre42f25bd2015-12-12 02:49:21 +0100381#ifdef CONFIG_ARM_PATCH_IDIV
382
383static inline u32 __attribute_const__ sdiv_instruction(void)
384{
385 if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
386 /* "sdiv r0, r0, r1" */
387 u32 insn = __opcode_thumb32_compose(0xfb90, 0xf0f1);
388 return __opcode_to_mem_thumb32(insn);
389 }
390
391 /* "sdiv r0, r0, r1" */
392 return __opcode_to_mem_arm(0xe710f110);
393}
394
395static inline u32 __attribute_const__ udiv_instruction(void)
396{
397 if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
398 /* "udiv r0, r0, r1" */
399 u32 insn = __opcode_thumb32_compose(0xfbb0, 0xf0f1);
400 return __opcode_to_mem_thumb32(insn);
401 }
402
403 /* "udiv r0, r0, r1" */
404 return __opcode_to_mem_arm(0xe730f110);
405}
406
407static inline u32 __attribute_const__ bx_lr_instruction(void)
408{
409 if (IS_ENABLED(CONFIG_THUMB2_KERNEL)) {
410 /* "bx lr; nop" */
411 u32 insn = __opcode_thumb32_compose(0x4770, 0x46c0);
412 return __opcode_to_mem_thumb32(insn);
413 }
414
415 /* "bx lr" */
416 return __opcode_to_mem_arm(0xe12fff1e);
417}
418
419static void __init patch_aeabi_idiv(void)
420{
421 extern void __aeabi_uidiv(void);
422 extern void __aeabi_idiv(void);
423 uintptr_t fn_addr;
424 unsigned int mask;
425
426 mask = IS_ENABLED(CONFIG_THUMB2_KERNEL) ? HWCAP_IDIVT : HWCAP_IDIVA;
427 if (!(elf_hwcap & mask))
428 return;
429
430 pr_info("CPU: div instructions available: patching division code\n");
431
432 fn_addr = ((uintptr_t)&__aeabi_uidiv) & ~1;
Nicolas Pitre208fae52016-03-14 02:55:45 +0100433 asm ("" : "+g" (fn_addr));
Nicolas Pitre42f25bd2015-12-12 02:49:21 +0100434 ((u32 *)fn_addr)[0] = udiv_instruction();
435 ((u32 *)fn_addr)[1] = bx_lr_instruction();
436 flush_icache_range(fn_addr, fn_addr + 8);
437
438 fn_addr = ((uintptr_t)&__aeabi_idiv) & ~1;
Nicolas Pitre208fae52016-03-14 02:55:45 +0100439 asm ("" : "+g" (fn_addr));
Nicolas Pitre42f25bd2015-12-12 02:49:21 +0100440 ((u32 *)fn_addr)[0] = sdiv_instruction();
441 ((u32 *)fn_addr)[1] = bx_lr_instruction();
442 flush_icache_range(fn_addr, fn_addr + 8);
443}
444
445#else
446static inline void patch_aeabi_idiv(void) { }
447#endif
448
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100449static void __init cpuid_init_hwcaps(void)
450{
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100451 int block;
Ard Biesheuvela092aed2015-03-19 19:04:05 +0100452 u32 isar5;
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100453
454 if (cpu_architecture() < CPU_ARCH_ARMv7)
455 return;
456
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100457 block = cpuid_feature_extract(CPUID_EXT_ISAR0, 24);
458 if (block >= 2)
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100459 elf_hwcap |= HWCAP_IDIVA;
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100460 if (block >= 1)
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100461 elf_hwcap |= HWCAP_IDIVT;
Will Deacona469abd2013-04-08 17:13:12 +0100462
463 /* LPAE implies atomic ldrd/strd instructions */
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100464 block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0);
465 if (block >= 5)
Will Deacona469abd2013-04-08 17:13:12 +0100466 elf_hwcap |= HWCAP_LPAE;
Ard Biesheuvela092aed2015-03-19 19:04:05 +0100467
468 /* check for supported v8 Crypto instructions */
469 isar5 = read_cpuid_ext(CPUID_EXT_ISAR5);
470
471 block = cpuid_feature_extract_field(isar5, 4);
472 if (block >= 2)
473 elf_hwcap2 |= HWCAP2_PMULL;
474 if (block >= 1)
475 elf_hwcap2 |= HWCAP2_AES;
476
477 block = cpuid_feature_extract_field(isar5, 8);
478 if (block >= 1)
479 elf_hwcap2 |= HWCAP2_SHA1;
480
481 block = cpuid_feature_extract_field(isar5, 12);
482 if (block >= 1)
483 elf_hwcap2 |= HWCAP2_SHA2;
484
485 block = cpuid_feature_extract_field(isar5, 16);
486 if (block >= 1)
487 elf_hwcap2 |= HWCAP2_CRC32;
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100488}
489
Russell King58171bf2014-07-04 16:41:21 +0100490static void __init elf_hwcap_fixup(void)
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100491{
Russell King58171bf2014-07-04 16:41:21 +0100492 unsigned id = read_cpuid_id();
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100493
494 /*
495 * HWCAP_TLS is available only on 1136 r1p0 and later,
496 * see also kuser_get_tls_init.
497 */
Russell King58171bf2014-07-04 16:41:21 +0100498 if (read_cpuid_part() == ARM_CPU_PART_ARM1136 &&
499 ((id >> 20) & 3) == 0) {
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100500 elf_hwcap &= ~HWCAP_TLS;
Russell King58171bf2014-07-04 16:41:21 +0100501 return;
502 }
503
504 /* Verify if CPUID scheme is implemented */
505 if ((id & 0x000f0000) != 0x000f0000)
506 return;
507
508 /*
509 * If the CPU supports LDREX/STREX and LDREXB/STREXB,
510 * avoid advertising SWP; it may not be atomic with
511 * multiprocessing cores.
512 */
Ard Biesheuvelb8c95922015-03-19 19:03:25 +0100513 if (cpuid_feature_extract(CPUID_EXT_ISAR3, 12) > 1 ||
514 (cpuid_feature_extract(CPUID_EXT_ISAR3, 12) == 1 &&
Vladimir Murzin03f12172016-04-19 12:35:20 +0100515 cpuid_feature_extract(CPUID_EXT_ISAR4, 20) >= 3))
Russell King58171bf2014-07-04 16:41:21 +0100516 elf_hwcap &= ~HWCAP_SWP;
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100517}
518
Russell Kingb69874e2011-06-21 18:57:31 +0100519/*
520 * cpu_init - initialise one CPU.
521 *
522 * cpu_init sets up the per-CPU stacks.
523 */
Jon Medhurst1783d452013-04-25 14:40:22 +0100524void notrace cpu_init(void)
Russell Kingb69874e2011-06-21 18:57:31 +0100525{
Catalin Marinas55bdd692010-05-21 18:06:41 +0100526#ifndef CONFIG_CPU_V7M
Russell Kingb69874e2011-06-21 18:57:31 +0100527 unsigned int cpu = smp_processor_id();
528 struct stack *stk = &stacks[cpu];
529
530 if (cpu >= NR_CPUS) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100531 pr_crit("CPU%u: bad primary CPU number\n", cpu);
Russell Kingb69874e2011-06-21 18:57:31 +0100532 BUG();
533 }
534
Rob Herring14318efb2012-11-29 20:39:54 +0100535 /*
536 * This only works on resume and secondary cores. For booting on the
537 * boot cpu, smp_prepare_boot_cpu is called after percpu area setup.
538 */
539 set_my_cpu_offset(per_cpu_offset(cpu));
540
Russell Kingb69874e2011-06-21 18:57:31 +0100541 cpu_proc_init();
542
543 /*
544 * Define the placement constraint for the inline asm directive below.
545 * In Thumb-2, msr with an immediate value is not allowed.
546 */
547#ifdef CONFIG_THUMB2_KERNEL
548#define PLC "r"
549#else
550#define PLC "I"
551#endif
552
553 /*
554 * setup stacks for re-entrant exception handlers
555 */
556 __asm__ (
557 "msr cpsr_c, %1\n\t"
558 "add r14, %0, %2\n\t"
559 "mov sp, r14\n\t"
560 "msr cpsr_c, %3\n\t"
561 "add r14, %0, %4\n\t"
562 "mov sp, r14\n\t"
563 "msr cpsr_c, %5\n\t"
564 "add r14, %0, %6\n\t"
565 "mov sp, r14\n\t"
Daniel Thompsonc0e7f7e2014-09-17 17:12:06 +0100566 "msr cpsr_c, %7\n\t"
567 "add r14, %0, %8\n\t"
568 "mov sp, r14\n\t"
569 "msr cpsr_c, %9"
Russell Kingb69874e2011-06-21 18:57:31 +0100570 :
571 : "r" (stk),
572 PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
573 "I" (offsetof(struct stack, irq[0])),
574 PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
575 "I" (offsetof(struct stack, abt[0])),
576 PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
577 "I" (offsetof(struct stack, und[0])),
Daniel Thompsonc0e7f7e2014-09-17 17:12:06 +0100578 PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
579 "I" (offsetof(struct stack, fiq[0])),
Russell Kingb69874e2011-06-21 18:57:31 +0100580 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
581 : "r14");
Catalin Marinas55bdd692010-05-21 18:06:41 +0100582#endif
Russell Kingb69874e2011-06-21 18:57:31 +0100583}
584
Lorenzo Pieralisi18d7f152013-06-19 10:40:48 +0100585u32 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
Will Deaconeb504392012-01-20 12:01:12 +0100586
587void __init smp_setup_processor_id(void)
588{
589 int i;
Lorenzo Pieralisicb8cf4f2012-11-08 18:05:56 +0000590 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
591 u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
Will Deaconeb504392012-01-20 12:01:12 +0100592
593 cpu_logical_map(0) = cpu;
Lorenzo Pieralisicb8cf4f2012-11-08 18:05:56 +0000594 for (i = 1; i < nr_cpu_ids; ++i)
Will Deaconeb504392012-01-20 12:01:12 +0100595 cpu_logical_map(i) = i == cpu ? 0 : i;
596
Ming Lei9394c1c2013-03-11 13:52:12 +0100597 /*
598 * clear __my_cpu_offset on boot CPU to avoid hang caused by
599 * using percpu variable early, for example, lockdep will
600 * access percpu variable inside lock_release
601 */
602 set_my_cpu_offset(0);
603
Olof Johansson1b0f6682013-12-05 18:29:35 +0100604 pr_info("Booting Linux on physical CPU 0x%x\n", mpidr);
Will Deaconeb504392012-01-20 12:01:12 +0100605}
606
Lorenzo Pieralisi8cf72172013-05-16 10:32:09 +0100607struct mpidr_hash mpidr_hash;
608#ifdef CONFIG_SMP
609/**
610 * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
611 * level in order to build a linear index from an
612 * MPIDR value. Resulting algorithm is a collision
613 * free hash carried out through shifting and ORing
614 */
615static void __init smp_build_mpidr_hash(void)
616{
617 u32 i, affinity;
618 u32 fs[3], bits[3], ls, mask = 0;
619 /*
620 * Pre-scan the list of MPIDRS and filter out bits that do
621 * not contribute to affinity levels, ie they never toggle.
622 */
623 for_each_possible_cpu(i)
624 mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
625 pr_debug("mask of set bits 0x%x\n", mask);
626 /*
627 * Find and stash the last and first bit set at all affinity levels to
628 * check how many bits are required to represent them.
629 */
630 for (i = 0; i < 3; i++) {
631 affinity = MPIDR_AFFINITY_LEVEL(mask, i);
632 /*
633 * Find the MSB bit and LSB bits position
634 * to determine how many bits are required
635 * to express the affinity level.
636 */
637 ls = fls(affinity);
638 fs[i] = affinity ? ffs(affinity) - 1 : 0;
639 bits[i] = ls - fs[i];
640 }
641 /*
642 * An index can be created from the MPIDR by isolating the
643 * significant bits at each affinity level and by shifting
644 * them in order to compress the 24 bits values space to a
645 * compressed set of values. This is equivalent to hashing
646 * the MPIDR through shifting and ORing. It is a collision free
647 * hash though not minimal since some levels might contain a number
648 * of CPUs that is not an exact power of 2 and their bit
649 * representation might contain holes, eg MPIDR[7:0] = {0x2, 0x80}.
650 */
651 mpidr_hash.shift_aff[0] = fs[0];
652 mpidr_hash.shift_aff[1] = MPIDR_LEVEL_BITS + fs[1] - bits[0];
653 mpidr_hash.shift_aff[2] = 2*MPIDR_LEVEL_BITS + fs[2] -
654 (bits[1] + bits[0]);
655 mpidr_hash.mask = mask;
656 mpidr_hash.bits = bits[2] + bits[1] + bits[0];
657 pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] mask[0x%x] bits[%u]\n",
658 mpidr_hash.shift_aff[0],
659 mpidr_hash.shift_aff[1],
660 mpidr_hash.shift_aff[2],
661 mpidr_hash.mask,
662 mpidr_hash.bits);
663 /*
664 * 4x is an arbitrary value used to warn on a hash table much bigger
665 * than expected on most systems.
666 */
667 if (mpidr_hash_size() > 4 * num_possible_cpus())
668 pr_warn("Large number of MPIDR hash buckets detected\n");
669 sync_cache_w(&mpidr_hash);
670}
671#endif
672
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673static void __init setup_processor(void)
674{
675 struct proc_info_list *list;
676
677 /*
678 * locate processor in the list of supported processor
679 * types. The linker builds this table for us from the
680 * entries in arch/arm/mm/proc-*.S
681 */
Russell King0ba8b9b2008-08-10 18:08:10 +0100682 list = lookup_processor_type(read_cpuid_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683 if (!list) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100684 pr_err("CPU configuration botched (ID %08x), unable to continue.\n",
685 read_cpuid_id());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700686 while (1);
687 }
688
689 cpu_name = list->cpu_name;
Dave Martin2ecccf92011-08-19 17:58:35 +0100690 __cpu_architecture = __get_cpu_architecture();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700691
692#ifdef MULTI_CPU
693 processor = *list->proc;
694#endif
695#ifdef MULTI_TLB
696 cpu_tlb = *list->tlb;
697#endif
698#ifdef MULTI_USER
699 cpu_user = *list->user;
700#endif
701#ifdef MULTI_CACHE
702 cpu_cache = *list->cache;
703#endif
704
Olof Johansson1b0f6682013-12-05 18:29:35 +0100705 pr_info("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
706 cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
Russell King4585eaf2014-04-13 18:47:34 +0100707 proc_arch[cpu_architecture()], get_cr());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708
Will Deacona34dbfb2011-11-11 11:35:58 +0100709 snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
710 list->arch_name, ENDIANNESS);
711 snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
712 list->elf_name, ENDIANNESS);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 elf_hwcap = list->elf_hwcap;
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100714
715 cpuid_init_hwcaps();
Nicolas Pitre42f25bd2015-12-12 02:49:21 +0100716 patch_aeabi_idiv();
Stephen Boyd8164f7a2013-03-18 19:44:15 +0100717
Catalin Marinasadeff422006-04-10 21:32:35 +0100718#ifndef CONFIG_ARM_THUMB
Stephen Boydc40e3642013-03-18 19:44:14 +0100719 elf_hwcap &= ~(HWCAP_THUMB | HWCAP_IDIVT);
Catalin Marinasadeff422006-04-10 21:32:35 +0100720#endif
Russell Kingca8f0b02014-05-27 20:34:28 +0100721#ifdef CONFIG_MMU
722 init_default_cache_policy(list->__cpu_mm_mmu_flags);
723#endif
Rob Herring92871b92013-10-09 17:26:44 +0100724 erratum_a15_798181_init();
725
Russell King58171bf2014-07-04 16:41:21 +0100726 elf_hwcap_fixup();
Tony Lindgrenf159f4e2010-07-05 14:53:10 +0100727
Russell Kingc0e95872008-09-25 15:35:28 +0100728 cacheid_init();
Russell Kingb69874e2011-06-21 18:57:31 +0100729 cpu_init();
Russell Kingccea7a12005-05-31 22:22:32 +0100730}
731
Grant Likely93c02ab2011-04-28 14:27:21 -0600732void __init dump_machine_table(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733{
Russell Kingff69a4c2013-07-26 14:55:59 +0100734 const struct machine_desc *p;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735
Grant Likely62913192011-04-28 14:27:21 -0600736 early_print("Available machine support:\n\nID (hex)\tNAME\n");
737 for_each_machine_desc(p)
Nicolas Pitredce72dd2011-02-21 07:00:32 +0100738 early_print("%08x\t%s\n", p->nr, p->name);
739
740 early_print("\nPlease check your kernel config and/or bootloader.\n");
741
742 while (true)
743 /* can't use cpu_relax() here as it may require MMU setup */;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744}
745
Magnus Damm6a5014a2013-10-22 17:53:16 +0100746int __init arm_add_memory(u64 start, u64 size)
Russell King3a669412005-06-22 21:43:10 +0100747{
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100748 u64 aligned_start;
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400749
Russell King3a669412005-06-22 21:43:10 +0100750 /*
751 * Ensure that start/size are aligned to a page boundary.
Masahiro Yamada909ba292015-01-20 04:38:25 +0100752 * Size is rounded down, start is rounded up.
Russell King3a669412005-06-22 21:43:10 +0100753 */
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100754 aligned_start = PAGE_ALIGN(start);
Masahiro Yamada909ba292015-01-20 04:38:25 +0100755 if (aligned_start > start + size)
756 size = 0;
757 else
758 size -= aligned_start - start;
Will Deacone5ab8582012-04-12 17:15:08 +0100759
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100760#ifndef CONFIG_ARCH_PHYS_ADDR_T_64BIT
761 if (aligned_start > ULONG_MAX) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100762 pr_crit("Ignoring memory at 0x%08llx outside 32-bit physical address space\n",
763 (long long)start);
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100764 return -EINVAL;
765 }
766
767 if (aligned_start + size > ULONG_MAX) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100768 pr_crit("Truncating memory at 0x%08llx to fit in 32-bit physical address space\n",
769 (long long)start);
Will Deacone5ab8582012-04-12 17:15:08 +0100770 /*
771 * To ensure bank->start + bank->size is representable in
772 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
773 * This means we lose a page after masking.
774 */
Magnus Damm6d7d5da2013-10-22 17:59:54 +0100775 size = ULONG_MAX - aligned_start;
Will Deacone5ab8582012-04-12 17:15:08 +0100776 }
777#endif
778
Russell King571b1432014-01-11 11:22:18 +0000779 if (aligned_start < PHYS_OFFSET) {
780 if (aligned_start + size <= PHYS_OFFSET) {
781 pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n",
782 aligned_start, aligned_start + size);
783 return -EINVAL;
784 }
785
786 pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n",
787 aligned_start, (u64)PHYS_OFFSET);
788
789 size -= PHYS_OFFSET - aligned_start;
790 aligned_start = PHYS_OFFSET;
791 }
792
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100793 start = aligned_start;
794 size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400795
796 /*
797 * Check whether this memory region has non-zero size or
798 * invalid node number.
799 */
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100800 if (size == 0)
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400801 return -EINVAL;
802
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100803 memblock_add(start, size);
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -0400804 return 0;
Russell King3a669412005-06-22 21:43:10 +0100805}
806
Linus Torvalds1da177e2005-04-16 15:20:36 -0700807/*
808 * Pick out the memory size. We look for mem=size@start,
809 * where start and size are "size[KkMm]"
810 */
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100811
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100812static int __init early_mem(char *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813{
814 static int usermem __initdata = 0;
Magnus Damm6a5014a2013-10-22 17:53:16 +0100815 u64 size;
816 u64 start;
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100817 char *endp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818
819 /*
820 * If the user specifies memory size, we
821 * blow away any automatically generated
822 * size.
823 */
824 if (usermem == 0) {
825 usermem = 1;
Laura Abbott1c2f87c2014-04-13 22:54:58 +0100826 memblock_remove(memblock_start_of_DRAM(),
827 memblock_end_of_DRAM() - memblock_start_of_DRAM());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828 }
829
830 start = PHYS_OFFSET;
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100831 size = memparse(p, &endp);
832 if (*endp == '@')
833 start = memparse(endp + 1, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834
Andrew Morton1c97b732006-04-20 21:41:18 +0100835 arm_add_memory(start, size);
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100836
837 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838}
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +0100839early_param("mem", early_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700840
Russell Kingff69a4c2013-07-26 14:55:59 +0100841static void __init request_standard_resources(const struct machine_desc *mdesc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842{
Dima Zavin11b93692011-01-14 23:05:14 +0100843 struct memblock_region *region;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845
Russell King37efe642008-12-01 11:53:07 +0000846 kernel_code.start = virt_to_phys(_text);
847 kernel_code.end = virt_to_phys(_etext - 1);
Russell King842eab42010-10-01 14:12:22 +0100848 kernel_data.start = virt_to_phys(_sdata);
Russell King37efe642008-12-01 11:53:07 +0000849 kernel_data.end = virt_to_phys(_end - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850
Dima Zavin11b93692011-01-14 23:05:14 +0100851 for_each_memblock(memory, region) {
Santosh Shilimkarca474402014-02-06 19:50:35 +0100852 res = memblock_virt_alloc(sizeof(*res), 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700853 res->name = "System RAM";
Dima Zavin11b93692011-01-14 23:05:14 +0100854 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
855 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
Toshi Kani35d98e92016-01-26 21:57:22 +0100856 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700857
858 request_resource(&iomem_resource, res);
859
860 if (kernel_code.start >= res->start &&
861 kernel_code.end <= res->end)
862 request_resource(res, &kernel_code);
863 if (kernel_data.start >= res->start &&
864 kernel_data.end <= res->end)
865 request_resource(res, &kernel_data);
866 }
867
868 if (mdesc->video_start) {
869 video_ram.start = mdesc->video_start;
870 video_ram.end = mdesc->video_end;
871 request_resource(&iomem_resource, &video_ram);
872 }
873
874 /*
875 * Some machines don't have the possibility of ever
876 * possessing lp0, lp1 or lp2
877 */
878 if (mdesc->reserve_lp0)
879 request_resource(&ioport_resource, &lp0);
880 if (mdesc->reserve_lp1)
881 request_resource(&ioport_resource, &lp1);
882 if (mdesc->reserve_lp2)
883 request_resource(&ioport_resource, &lp2);
884}
885
Ard Biesheuvel801820b2016-04-25 21:06:53 +0100886#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) || \
887 defined(CONFIG_EFI)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700888struct screen_info screen_info = {
889 .orig_video_lines = 30,
890 .orig_video_cols = 80,
891 .orig_video_mode = 0,
892 .orig_video_ega_bx = 0,
893 .orig_video_isVGA = 1,
894 .orig_video_points = 8
895};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896#endif
897
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898static int __init customize_machine(void)
899{
Arnd Bergmann883a1062013-01-31 17:51:18 +0000900 /*
901 * customizes platform devices, or adds new ones
902 * On DT based machines, we fall back to populating the
903 * machine from the device tree, if no callback is provided,
904 * otherwise we would always need an init_machine callback.
905 */
Will Deaconaf4dda72014-08-27 17:51:16 +0100906 of_iommu_init();
Russell King8ff14432010-12-20 10:18:36 +0000907 if (machine_desc->init_machine)
908 machine_desc->init_machine();
Arnd Bergmann883a1062013-01-31 17:51:18 +0000909#ifdef CONFIG_OF
910 else
911 of_platform_populate(NULL, of_default_bus_match_table,
912 NULL, NULL);
913#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914 return 0;
915}
916arch_initcall(customize_machine);
917
Shawn Guo90de4132012-04-25 22:24:44 +0800918static int __init init_machine_late(void)
919{
Paul Kocialkowski3f599872015-05-06 15:23:56 +0100920 struct device_node *root;
921 int ret;
922
Shawn Guo90de4132012-04-25 22:24:44 +0800923 if (machine_desc->init_late)
924 machine_desc->init_late();
Paul Kocialkowski3f599872015-05-06 15:23:56 +0100925
926 root = of_find_node_by_path("/");
927 if (root) {
928 ret = of_property_read_string(root, "serial-number",
929 &system_serial);
930 if (ret)
931 system_serial = NULL;
932 }
933
934 if (!system_serial)
935 system_serial = kasprintf(GFP_KERNEL, "%08x%08x",
936 system_serial_high,
937 system_serial_low);
938
Shawn Guo90de4132012-04-25 22:24:44 +0800939 return 0;
940}
941late_initcall(init_machine_late);
942
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100943#ifdef CONFIG_KEXEC
Russell King61603012016-03-14 19:34:37 +0000944/*
945 * The crash region must be aligned to 128MB to avoid
946 * zImage relocating below the reserved region.
947 */
948#define CRASH_ALIGN (128 << 20)
Russell King61603012016-03-14 19:34:37 +0000949
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100950static inline unsigned long long get_total_mem(void)
951{
952 unsigned long total;
953
954 total = max_low_pfn - min_low_pfn;
955 return total << PAGE_SHIFT;
956}
957
958/**
959 * reserve_crashkernel() - reserves memory are for crash kernel
960 *
961 * This function reserves memory area given in "crashkernel=" kernel command
962 * line parameter. The memory reserved is used by a dump capture kernel when
963 * primary kernel is crashing.
964 */
965static void __init reserve_crashkernel(void)
966{
967 unsigned long long crash_size, crash_base;
968 unsigned long long total_mem;
969 int ret;
970
971 total_mem = get_total_mem();
972 ret = parse_crashkernel(boot_command_line, total_mem,
973 &crash_size, &crash_base);
974 if (ret)
975 return;
976
Russell King61603012016-03-14 19:34:37 +0000977 if (crash_base <= 0) {
Russell Kingd0506a22016-04-01 14:47:36 +0100978 unsigned long long crash_max = idmap_to_phys((u32)~0);
Russell King61603012016-03-14 19:34:37 +0000979 crash_base = memblock_find_in_range(CRASH_ALIGN, crash_max,
980 crash_size, CRASH_ALIGN);
981 if (!crash_base) {
982 pr_err("crashkernel reservation failed - No suitable area found.\n");
983 return;
984 }
985 } else {
986 unsigned long long start;
987
988 start = memblock_find_in_range(crash_base,
989 crash_base + crash_size,
990 crash_size, SECTION_SIZE);
991 if (start != crash_base) {
992 pr_err("crashkernel reservation failed - memory is in use.\n");
993 return;
994 }
995 }
996
Santosh Shilimkar84f452b2013-06-30 00:28:46 -0400997 ret = memblock_reserve(crash_base, crash_size);
Mika Westerberg3c57fb42010-05-10 09:20:22 +0100998 if (ret < 0) {
Olof Johansson1b0f6682013-12-05 18:29:35 +0100999 pr_warn("crashkernel reservation failed - memory is in use (0x%lx)\n",
1000 (unsigned long)crash_base);
Mika Westerberg3c57fb42010-05-10 09:20:22 +01001001 return;
1002 }
1003
Olof Johansson1b0f6682013-12-05 18:29:35 +01001004 pr_info("Reserving %ldMB of memory at %ldMB for crashkernel (System RAM: %ldMB)\n",
1005 (unsigned long)(crash_size >> 20),
1006 (unsigned long)(crash_base >> 20),
1007 (unsigned long)(total_mem >> 20));
Mika Westerberg3c57fb42010-05-10 09:20:22 +01001008
1009 crashk_res.start = crash_base;
1010 crashk_res.end = crash_base + crash_size - 1;
1011 insert_resource(&iomem_resource, &crashk_res);
1012}
1013#else
1014static inline void reserve_crashkernel(void) {}
1015#endif /* CONFIG_KEXEC */
1016
Dave Martin4588c342012-02-17 16:54:28 +00001017void __init hyp_mode_check(void)
1018{
1019#ifdef CONFIG_ARM_VIRT_EXT
Mark Rutland8fbac212013-07-18 17:20:33 +01001020 sync_boot_mode();
1021
Dave Martin4588c342012-02-17 16:54:28 +00001022 if (is_hyp_mode_available()) {
1023 pr_info("CPU: All CPU(s) started in HYP mode.\n");
1024 pr_info("CPU: Virtualization extensions available.\n");
1025 } else if (is_hyp_mode_mismatched()) {
1026 pr_warn("CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x%x)\n",
1027 __boot_cpu_mode & MODE_MASK);
1028 pr_warn("CPU: This may indicate a broken bootloader or firmware.\n");
1029 } else
1030 pr_info("CPU: All CPU(s) started in SVC mode.\n");
1031#endif
1032}
1033
Grant Likely62913192011-04-28 14:27:21 -06001034void __init setup_arch(char **cmdline_p)
1035{
Russell Kingff69a4c2013-07-26 14:55:59 +01001036 const struct machine_desc *mdesc;
Grant Likely62913192011-04-28 14:27:21 -06001037
Grant Likely62913192011-04-28 14:27:21 -06001038 setup_processor();
Grant Likely93c02ab2011-04-28 14:27:21 -06001039 mdesc = setup_machine_fdt(__atags_pointer);
1040 if (!mdesc)
Alexander Shiyanb8b499c2012-12-12 08:32:11 +01001041 mdesc = setup_machine_tags(__atags_pointer, __machine_arch_type);
Grant Likely62913192011-04-28 14:27:21 -06001042 machine_desc = mdesc;
1043 machine_name = mdesc->name;
Russell King719c9d12014-10-28 12:40:26 +00001044 dump_stack_set_arch_desc("%s", mdesc->name);
Grant Likely62913192011-04-28 14:27:21 -06001045
Robin Holt16d6d5b2013-07-08 16:01:39 -07001046 if (mdesc->reboot_mode != REBOOT_HARD)
1047 reboot_mode = mdesc->reboot_mode;
Grant Likely62913192011-04-28 14:27:21 -06001048
Russell King37efe642008-12-01 11:53:07 +00001049 init_mm.start_code = (unsigned long) _text;
1050 init_mm.end_code = (unsigned long) _etext;
1051 init_mm.end_data = (unsigned long) _edata;
1052 init_mm.brk = (unsigned long) _end;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053
Jeremy Kerr48ab7e02010-01-27 01:13:31 +01001054 /* populate cmd_line too for later use, preserving boot_command_line */
1055 strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
1056 *cmdline_p = cmd_line;
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +01001057
Ard Biesheuvel29373672015-09-01 08:59:28 +02001058 early_fixmap_init();
1059 early_ioremap_init();
Stefan Agnera5f4c562015-08-13 00:01:52 +01001060
Jeremy Kerr2b0d8c22010-01-11 23:17:34 +01001061 parse_early_param();
1062
Russell King1221ed12015-04-04 17:25:20 +01001063#ifdef CONFIG_MMU
1064 early_paging_init(mdesc);
1065#endif
Santosh Shilimkar7c927322013-12-02 20:29:59 +01001066 setup_dma_zone(mdesc);
Ard Biesheuvelda58fb62015-09-24 13:49:52 -07001067 efi_init();
Russell King0371d3f2011-07-05 19:58:29 +01001068 sanity_check_meminfo();
Laura Abbott1c2f87c2014-04-13 22:54:58 +01001069 arm_memblock_init(mdesc);
Russell King2778f622010-07-09 16:27:52 +01001070
Ard Biesheuvel29373672015-09-01 08:59:28 +02001071 early_ioremap_reset();
1072
Nicolas Pitre4b5f32c2008-10-06 13:24:40 -04001073 paging_init(mdesc);
Dima Zavin11b93692011-01-14 23:05:14 +01001074 request_standard_resources(mdesc);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001075
Russell Kinga5287212011-11-04 15:05:24 +00001076 if (mdesc->restart)
1077 arm_pm_restart = mdesc->restart;
1078
Grant Likely93c02ab2011-04-28 14:27:21 -06001079 unflatten_device_tree();
1080
Lorenzo Pieralisi55871642011-12-14 16:01:24 +00001081 arm_dt_init_cpu_maps();
Mark Rutlandbe120392015-07-31 15:46:19 +01001082 psci_dt_init();
Stefano Stabellini5882bfe2015-05-06 14:13:31 +00001083 xen_early_init();
Russell King7bbb7942006-02-16 11:08:09 +00001084#ifdef CONFIG_SMP
Marc Zyngierabcee5f2011-09-08 09:06:10 +01001085 if (is_smp()) {
Jon Medhurstb382b942013-05-21 13:40:51 +00001086 if (!mdesc->smp_init || !mdesc->smp_init()) {
1087 if (psci_smp_available())
1088 smp_set_ops(&psci_smp_ops);
1089 else if (mdesc->smp)
1090 smp_set_ops(mdesc->smp);
1091 }
Russell Kingf00ec482010-09-04 10:47:48 +01001092 smp_init_cpus();
Lorenzo Pieralisi8cf72172013-05-16 10:32:09 +01001093 smp_build_mpidr_hash();
Marc Zyngierabcee5f2011-09-08 09:06:10 +01001094 }
Russell King7bbb7942006-02-16 11:08:09 +00001095#endif
Dave Martin4588c342012-02-17 16:54:28 +00001096
1097 if (!is_smp())
1098 hyp_mode_check();
1099
Mika Westerberg3c57fb42010-05-10 09:20:22 +01001100 reserve_crashkernel();
Russell King7bbb7942006-02-16 11:08:09 +00001101
eric miao52108642010-12-13 09:42:34 +01001102#ifdef CONFIG_MULTI_IRQ_HANDLER
1103 handle_arch_irq = mdesc->handle_irq;
1104#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001105
1106#ifdef CONFIG_VT
1107#if defined(CONFIG_VGA_CONSOLE)
1108 conswitchp = &vga_con;
1109#elif defined(CONFIG_DUMMY_CONSOLE)
1110 conswitchp = &dummy_con;
1111#endif
1112#endif
Russell Kingdec12e62010-12-16 13:49:34 +00001113
1114 if (mdesc->init_early)
1115 mdesc->init_early();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116}
1117
1118
1119static int __init topology_init(void)
1120{
1121 int cpu;
1122
Russell King66fb8bd2007-03-13 09:54:21 +00001123 for_each_possible_cpu(cpu) {
1124 struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
Stephen Boyd787047e2015-07-29 00:34:48 +01001125 cpuinfo->cpu.hotpluggable = platform_can_hotplug_cpu(cpu);
Russell King66fb8bd2007-03-13 09:54:21 +00001126 register_cpu(&cpuinfo->cpu, cpu);
1127 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001128
1129 return 0;
1130}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001131subsys_initcall(topology_init);
1132
Russell Kinge119bff2010-01-10 17:23:29 +00001133#ifdef CONFIG_HAVE_PROC_CPU
1134static int __init proc_cpu_init(void)
1135{
1136 struct proc_dir_entry *res;
1137
1138 res = proc_mkdir("cpu", NULL);
1139 if (!res)
1140 return -ENOMEM;
1141 return 0;
1142}
1143fs_initcall(proc_cpu_init);
1144#endif
1145
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146static const char *hwcap_str[] = {
1147 "swp",
1148 "half",
1149 "thumb",
1150 "26bit",
1151 "fastmult",
1152 "fpa",
1153 "vfp",
1154 "edsp",
1155 "java",
Paul Gortmaker8f7f9432006-10-27 05:13:19 +01001156 "iwmmxt",
Lennert Buytenhek99e4a6d2006-12-18 00:59:10 +01001157 "crunch",
Catalin Marinas4369ae12008-11-06 13:23:06 +00001158 "thumbee",
Catalin Marinas2bedbdf2008-11-06 13:23:07 +00001159 "neon",
Catalin Marinas7279dc32009-02-11 13:13:56 +01001160 "vfpv3",
1161 "vfpv3d16",
Will Deacon254cdf82011-06-03 14:15:22 +01001162 "tls",
1163 "vfpv4",
1164 "idiva",
1165 "idivt",
Tetsuyuki Kobayashiab8d46c02013-07-22 14:58:17 +01001166 "vfpd32",
Will Deacona469abd2013-04-08 17:13:12 +01001167 "lpae",
Sudeep KarkadaNageshae9faebc2013-08-13 14:30:32 +01001168 "evtstrm",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 NULL
1170};
1171
Ard Biesheuvelb342ea42014-02-19 22:28:40 +01001172static const char *hwcap2_str[] = {
Ard Biesheuvel8258a982014-02-19 22:29:40 +01001173 "aes",
1174 "pmull",
1175 "sha1",
1176 "sha2",
1177 "crc32",
Ard Biesheuvelb342ea42014-02-19 22:28:40 +01001178 NULL
1179};
1180
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181static int c_show(struct seq_file *m, void *v)
1182{
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001183 int i, j;
1184 u32 cpuid;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186 for_each_online_cpu(i) {
Russell King15559722005-11-06 21:41:08 +00001187 /*
1188 * glibc reads /proc/cpuinfo to determine the number of
1189 * online processors, looking for lines beginning with
1190 * "processor". Give glibc what it expects.
1191 */
1192 seq_printf(m, "processor\t: %d\n", i);
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001193 cpuid = is_smp() ? per_cpu(cpu_data, i).cpuid : read_cpuid_id();
1194 seq_printf(m, "model name\t: %s rev %d (%s)\n",
1195 cpu_name, cpuid & 15, elf_platform);
1196
Pavel Machek4bf96362015-01-04 20:01:23 +01001197#if defined(CONFIG_SMP)
1198 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
1199 per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
1200 (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
1201#else
1202 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
1203 loops_per_jiffy / (500000/HZ),
1204 (loops_per_jiffy / (5000/HZ)) % 100);
1205#endif
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001206 /* dump out the processor features */
1207 seq_puts(m, "Features\t: ");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001208
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001209 for (j = 0; hwcap_str[j]; j++)
1210 if (elf_hwcap & (1 << j))
1211 seq_printf(m, "%s ", hwcap_str[j]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212
Ard Biesheuvelb342ea42014-02-19 22:28:40 +01001213 for (j = 0; hwcap2_str[j]; j++)
1214 if (elf_hwcap2 & (1 << j))
1215 seq_printf(m, "%s ", hwcap2_str[j]);
1216
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001217 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", cpuid >> 24);
1218 seq_printf(m, "CPU architecture: %s\n",
1219 proc_arch[cpu_architecture()]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001220
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001221 if ((cpuid & 0x0008f000) == 0x00000000) {
1222 /* pre-ARM7 */
1223 seq_printf(m, "CPU part\t: %07x\n", cpuid >> 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001224 } else {
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001225 if ((cpuid & 0x0008f000) == 0x00007000) {
1226 /* ARM7 */
1227 seq_printf(m, "CPU variant\t: 0x%02x\n",
1228 (cpuid >> 16) & 127);
1229 } else {
1230 /* post-ARM7 */
1231 seq_printf(m, "CPU variant\t: 0x%x\n",
1232 (cpuid >> 20) & 15);
1233 }
1234 seq_printf(m, "CPU part\t: 0x%03x\n",
1235 (cpuid >> 4) & 0xfff);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001236 }
Lorenzo Pieralisib4b8f772012-09-10 18:55:21 +01001237 seq_printf(m, "CPU revision\t: %d\n\n", cpuid & 15);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001238 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001239
1240 seq_printf(m, "Hardware\t: %s\n", machine_name);
1241 seq_printf(m, "Revision\t: %04x\n", system_rev);
Paul Kocialkowski3f599872015-05-06 15:23:56 +01001242 seq_printf(m, "Serial\t\t: %s\n", system_serial);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001243
1244 return 0;
1245}
1246
1247static void *c_start(struct seq_file *m, loff_t *pos)
1248{
1249 return *pos < 1 ? (void *)1 : NULL;
1250}
1251
1252static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1253{
1254 ++*pos;
1255 return NULL;
1256}
1257
1258static void c_stop(struct seq_file *m, void *v)
1259{
1260}
1261
Jan Engelhardt2ffd6e12008-01-22 20:41:07 +01001262const struct seq_operations cpuinfo_op = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001263 .start = c_start,
1264 .next = c_next,
1265 .stop = c_stop,
1266 .show = c_show
1267};