Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
| 13 | /dts-v1/; |
Shawn Guo | 7c1da58 | 2013-02-04 23:09:16 +0800 | [diff] [blame] | 14 | /include/ "imx6q.dtsi" |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 15 | |
| 16 | / { |
Dirk Behme | 752baf5 | 2011-12-08 08:22:01 +0100 | [diff] [blame] | 17 | model = "Freescale i.MX6 Quad Armadillo2 Board"; |
| 18 | compatible = "fsl,imx6q-arm2", "fsl,imx6q"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 19 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 20 | memory { |
| 21 | reg = <0x10000000 0x80000000>; |
| 22 | }; |
| 23 | |
Shawn Guo | 648162a | 2012-02-27 17:11:12 +0800 | [diff] [blame] | 24 | regulators { |
| 25 | compatible = "simple-bus"; |
| 26 | |
| 27 | reg_3p3v: 3p3v { |
| 28 | compatible = "regulator-fixed"; |
| 29 | regulator-name = "3P3V"; |
| 30 | regulator-min-microvolt = <3300000>; |
| 31 | regulator-max-microvolt = <3300000>; |
| 32 | regulator-always-on; |
| 33 | }; |
| 34 | }; |
| 35 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 36 | leds { |
| 37 | compatible = "gpio-leds"; |
| 38 | |
| 39 | debug-led { |
| 40 | label = "Heartbeat"; |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 41 | gpios = <&gpio3 25 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 42 | linux,default-trigger = "heartbeat"; |
| 43 | }; |
| 44 | }; |
| 45 | }; |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 46 | |
| 47 | &gpmi { |
| 48 | pinctrl-names = "default"; |
| 49 | pinctrl-0 = <&pinctrl_gpmi_nand_1>; |
| 50 | status = "disabled"; /* gpmi nand conflicts with SD */ |
| 51 | }; |
| 52 | |
| 53 | &iomuxc { |
| 54 | pinctrl-names = "default"; |
| 55 | pinctrl-0 = <&pinctrl_hog>; |
| 56 | |
| 57 | hog { |
| 58 | pinctrl_hog: hoggrp { |
| 59 | fsl,pins = < |
| 60 | 176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */ |
| 61 | >; |
| 62 | }; |
| 63 | }; |
| 64 | |
| 65 | arm2 { |
| 66 | pinctrl_usdhc3_arm2: usdhc3grp-arm2 { |
| 67 | fsl,pins = < |
| 68 | 1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */ |
| 69 | 1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */ |
| 70 | >; |
| 71 | }; |
| 72 | }; |
| 73 | }; |
| 74 | |
| 75 | &fec { |
| 76 | pinctrl-names = "default"; |
| 77 | pinctrl-0 = <&pinctrl_enet_2>; |
| 78 | phy-mode = "rgmii"; |
| 79 | status = "okay"; |
| 80 | }; |
| 81 | |
| 82 | &usdhc3 { |
| 83 | cd-gpios = <&gpio6 11 0>; |
| 84 | wp-gpios = <&gpio6 14 0>; |
| 85 | vmmc-supply = <®_3p3v>; |
| 86 | pinctrl-names = "default"; |
| 87 | pinctrl-0 = <&pinctrl_usdhc3_1 |
| 88 | &pinctrl_usdhc3_arm2>; |
| 89 | status = "okay"; |
| 90 | }; |
| 91 | |
| 92 | &usdhc4 { |
| 93 | non-removable; |
| 94 | vmmc-supply = <®_3p3v>; |
| 95 | pinctrl-names = "default"; |
| 96 | pinctrl-0 = <&pinctrl_usdhc4_1>; |
| 97 | status = "okay"; |
| 98 | }; |
| 99 | |
| 100 | &uart4 { |
| 101 | pinctrl-names = "default"; |
| 102 | pinctrl-0 = <&pinctrl_uart4_1>; |
| 103 | status = "okay"; |
| 104 | }; |