Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/serial/s3c2410.c |
| 3 | * |
| 4 | * Driver for onboard UARTs on the Samsung S3C24XX |
| 5 | * |
| 6 | * Based on drivers/char/serial.c and drivers/char/21285.c |
| 7 | * |
| 8 | * Ben Dooks, (c) 2003-2005 Simtec Electronics |
| 9 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 10 | * |
| 11 | * Changelog: |
| 12 | * |
| 13 | * 22-Jul-2004 BJD Finished off device rewrite |
| 14 | * |
| 15 | * 21-Jul-2004 BJD Thanks to <herbet@13thfloor.at> for pointing out |
| 16 | * problems with baud rate and loss of IR settings. Update |
| 17 | * to add configuration via platform_device structure |
| 18 | * |
| 19 | * 28-Sep-2004 BJD Re-write for the following items |
| 20 | * - S3C2410 and S3C2440 serial support |
| 21 | * - Power Management support |
| 22 | * - Fix console via IrDA devices |
| 23 | * - SysReq (Herbert Pötzl) |
| 24 | * - Break character handling (Herbert Pötzl) |
| 25 | * - spin-lock initialisation (Dimitry Andric) |
| 26 | * - added clock control |
| 27 | * - updated init code to use platform_device info |
| 28 | * |
| 29 | * 06-Mar-2005 BJD Add s3c2440 fclk clock source |
| 30 | * |
| 31 | * 09-Mar-2005 BJD Add s3c2400 support |
| 32 | * |
| 33 | * 10-Mar-2005 LCVR Changed S3C2410_VA_UART to S3C24XX_VA_UART |
| 34 | */ |
| 35 | |
| 36 | /* Note on 2440 fclk clock source handling |
| 37 | * |
| 38 | * Whilst it is possible to use the fclk as clock source, the method |
| 39 | * of properly switching too/from this is currently un-implemented, so |
| 40 | * whichever way is configured at startup is the one that will be used. |
| 41 | */ |
| 42 | |
| 43 | /* Hote on 2410 error handling |
| 44 | * |
| 45 | * The s3c2410 manual has a love/hate affair with the contents of the |
| 46 | * UERSTAT register in the UART blocks, and keeps marking some of the |
| 47 | * error bits as reserved. Having checked with the s3c2410x01, |
| 48 | * it copes with BREAKs properly, so I am happy to ignore the RESERVED |
| 49 | * feature from the latter versions of the manual. |
| 50 | * |
| 51 | * If it becomes aparrent that latter versions of the 2410 remove these |
| 52 | * bits, then action will have to be taken to differentiate the versions |
| 53 | * and change the policy on BREAK |
| 54 | * |
| 55 | * BJD, 04-Nov-2004 |
| 56 | */ |
| 57 | |
| 58 | #include <linux/config.h> |
| 59 | |
| 60 | #if defined(CONFIG_SERIAL_S3C2410_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
| 61 | #define SUPPORT_SYSRQ |
| 62 | #endif |
| 63 | |
| 64 | #include <linux/module.h> |
| 65 | #include <linux/ioport.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 66 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | #include <linux/init.h> |
| 68 | #include <linux/sysrq.h> |
| 69 | #include <linux/console.h> |
| 70 | #include <linux/tty.h> |
| 71 | #include <linux/tty_flip.h> |
| 72 | #include <linux/serial_core.h> |
| 73 | #include <linux/serial.h> |
| 74 | #include <linux/delay.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 75 | #include <linux/clk.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | |
| 77 | #include <asm/io.h> |
| 78 | #include <asm/irq.h> |
| 79 | |
| 80 | #include <asm/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | |
| 82 | #include <asm/arch/regs-serial.h> |
| 83 | #include <asm/arch/regs-gpio.h> |
| 84 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | /* structures */ |
| 86 | |
| 87 | struct s3c24xx_uart_info { |
| 88 | char *name; |
| 89 | unsigned int type; |
| 90 | unsigned int fifosize; |
| 91 | unsigned long rx_fifomask; |
| 92 | unsigned long rx_fifoshift; |
| 93 | unsigned long rx_fifofull; |
| 94 | unsigned long tx_fifomask; |
| 95 | unsigned long tx_fifoshift; |
| 96 | unsigned long tx_fifofull; |
| 97 | |
| 98 | /* clock source control */ |
| 99 | |
| 100 | int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); |
| 101 | int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); |
| 102 | |
| 103 | /* uart controls */ |
| 104 | int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); |
| 105 | }; |
| 106 | |
| 107 | struct s3c24xx_uart_port { |
| 108 | unsigned char rx_claimed; |
| 109 | unsigned char tx_claimed; |
| 110 | |
| 111 | struct s3c24xx_uart_info *info; |
| 112 | struct s3c24xx_uart_clksrc *clksrc; |
| 113 | struct clk *clk; |
| 114 | struct clk *baudclk; |
| 115 | struct uart_port port; |
| 116 | }; |
| 117 | |
| 118 | |
| 119 | /* configuration defines */ |
| 120 | |
| 121 | #if 0 |
| 122 | #if 1 |
| 123 | /* send debug to the low-level output routines */ |
| 124 | |
| 125 | extern void printascii(const char *); |
| 126 | |
| 127 | static void |
| 128 | s3c24xx_serial_dbg(const char *fmt, ...) |
| 129 | { |
| 130 | va_list va; |
| 131 | char buff[256]; |
| 132 | |
| 133 | va_start(va, fmt); |
| 134 | vsprintf(buff, fmt, va); |
| 135 | va_end(va); |
| 136 | |
| 137 | printascii(buff); |
| 138 | } |
| 139 | |
| 140 | #define dbg(x...) s3c24xx_serial_dbg(x) |
| 141 | |
| 142 | #else |
| 143 | #define dbg(x...) printk(KERN_DEBUG "s3c24xx: "); |
| 144 | #endif |
| 145 | #else /* no debug */ |
| 146 | #define dbg(x...) do {} while(0) |
| 147 | #endif |
| 148 | |
| 149 | /* UART name and device definitions */ |
| 150 | |
| 151 | #define S3C24XX_SERIAL_NAME "ttySAC" |
| 152 | #define S3C24XX_SERIAL_DEVFS "tts/" |
| 153 | #define S3C24XX_SERIAL_MAJOR 204 |
| 154 | #define S3C24XX_SERIAL_MINOR 64 |
| 155 | |
| 156 | |
| 157 | /* conversion functions */ |
| 158 | |
| 159 | #define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) |
| 160 | #define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data) |
| 161 | |
| 162 | /* we can support 3 uarts, but not always use them */ |
| 163 | |
Lucas Correia Villa Real | 5cba742 | 2006-02-08 21:31:54 +0000 | [diff] [blame] | 164 | #ifdef CONFIG_CPU_S3C2400 |
| 165 | #define NR_PORTS (2) |
| 166 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | #define NR_PORTS (3) |
Lucas Correia Villa Real | 5cba742 | 2006-02-08 21:31:54 +0000 | [diff] [blame] | 168 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | |
| 170 | /* port irq numbers */ |
| 171 | |
| 172 | #define TX_IRQ(port) ((port)->irq + 1) |
| 173 | #define RX_IRQ(port) ((port)->irq) |
| 174 | |
| 175 | /* register access controls */ |
| 176 | |
| 177 | #define portaddr(port, reg) ((port)->membase + (reg)) |
| 178 | |
| 179 | #define rd_regb(port, reg) (__raw_readb(portaddr(port, reg))) |
| 180 | #define rd_regl(port, reg) (__raw_readl(portaddr(port, reg))) |
| 181 | |
| 182 | #define wr_regb(port, reg, val) \ |
| 183 | do { __raw_writeb(val, portaddr(port, reg)); } while(0) |
| 184 | |
| 185 | #define wr_regl(port, reg, val) \ |
| 186 | do { __raw_writel(val, portaddr(port, reg)); } while(0) |
| 187 | |
| 188 | /* macros to change one thing to another */ |
| 189 | |
| 190 | #define tx_enabled(port) ((port)->unused[0]) |
| 191 | #define rx_enabled(port) ((port)->unused[1]) |
| 192 | |
| 193 | /* flag to ignore all characters comming in */ |
| 194 | #define RXSTAT_DUMMY_READ (0x10000000) |
| 195 | |
| 196 | static inline struct s3c24xx_uart_port *to_ourport(struct uart_port *port) |
| 197 | { |
| 198 | return container_of(port, struct s3c24xx_uart_port, port); |
| 199 | } |
| 200 | |
| 201 | /* translate a port to the device name */ |
| 202 | |
Ben Dooks | d9dc580 | 2005-06-23 21:56:46 +0100 | [diff] [blame] | 203 | static inline const char *s3c24xx_serial_portname(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | { |
| 205 | return to_platform_device(port->dev)->name; |
| 206 | } |
| 207 | |
| 208 | static int s3c24xx_serial_txempty_nofifo(struct uart_port *port) |
| 209 | { |
| 210 | return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE); |
| 211 | } |
| 212 | |
| 213 | static void s3c24xx_serial_rx_enable(struct uart_port *port) |
| 214 | { |
| 215 | unsigned long flags; |
| 216 | unsigned int ucon, ufcon; |
| 217 | int count = 10000; |
| 218 | |
| 219 | spin_lock_irqsave(&port->lock, flags); |
| 220 | |
| 221 | while (--count && !s3c24xx_serial_txempty_nofifo(port)) |
| 222 | udelay(100); |
| 223 | |
| 224 | ufcon = rd_regl(port, S3C2410_UFCON); |
| 225 | ufcon |= S3C2410_UFCON_RESETRX; |
| 226 | wr_regl(port, S3C2410_UFCON, ufcon); |
| 227 | |
| 228 | ucon = rd_regl(port, S3C2410_UCON); |
| 229 | ucon |= S3C2410_UCON_RXIRQMODE; |
| 230 | wr_regl(port, S3C2410_UCON, ucon); |
| 231 | |
| 232 | rx_enabled(port) = 1; |
| 233 | spin_unlock_irqrestore(&port->lock, flags); |
| 234 | } |
| 235 | |
| 236 | static void s3c24xx_serial_rx_disable(struct uart_port *port) |
| 237 | { |
| 238 | unsigned long flags; |
| 239 | unsigned int ucon; |
| 240 | |
| 241 | spin_lock_irqsave(&port->lock, flags); |
| 242 | |
| 243 | ucon = rd_regl(port, S3C2410_UCON); |
| 244 | ucon &= ~S3C2410_UCON_RXIRQMODE; |
| 245 | wr_regl(port, S3C2410_UCON, ucon); |
| 246 | |
| 247 | rx_enabled(port) = 0; |
| 248 | spin_unlock_irqrestore(&port->lock, flags); |
| 249 | } |
| 250 | |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 251 | static void s3c24xx_serial_stop_tx(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | { |
| 253 | if (tx_enabled(port)) { |
| 254 | disable_irq(TX_IRQ(port)); |
| 255 | tx_enabled(port) = 0; |
| 256 | if (port->flags & UPF_CONS_FLOW) |
| 257 | s3c24xx_serial_rx_enable(port); |
| 258 | } |
| 259 | } |
| 260 | |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 261 | static void s3c24xx_serial_start_tx(struct uart_port *port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | { |
| 263 | if (!tx_enabled(port)) { |
| 264 | if (port->flags & UPF_CONS_FLOW) |
| 265 | s3c24xx_serial_rx_disable(port); |
| 266 | |
| 267 | enable_irq(TX_IRQ(port)); |
| 268 | tx_enabled(port) = 1; |
| 269 | } |
| 270 | } |
| 271 | |
| 272 | |
| 273 | static void s3c24xx_serial_stop_rx(struct uart_port *port) |
| 274 | { |
| 275 | if (rx_enabled(port)) { |
| 276 | dbg("s3c24xx_serial_stop_rx: port=%p\n", port); |
| 277 | disable_irq(RX_IRQ(port)); |
| 278 | rx_enabled(port) = 0; |
| 279 | } |
| 280 | } |
| 281 | |
| 282 | static void s3c24xx_serial_enable_ms(struct uart_port *port) |
| 283 | { |
| 284 | } |
| 285 | |
| 286 | static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port) |
| 287 | { |
| 288 | return to_ourport(port)->info; |
| 289 | } |
| 290 | |
| 291 | static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) |
| 292 | { |
| 293 | if (port->dev == NULL) |
| 294 | return NULL; |
| 295 | |
| 296 | return (struct s3c2410_uartcfg *)port->dev->platform_data; |
| 297 | } |
| 298 | |
| 299 | static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, |
| 300 | unsigned long ufstat) |
| 301 | { |
| 302 | struct s3c24xx_uart_info *info = ourport->info; |
| 303 | |
| 304 | if (ufstat & info->rx_fifofull) |
| 305 | return info->fifosize; |
| 306 | |
| 307 | return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; |
| 308 | } |
| 309 | |
| 310 | |
| 311 | /* ? - where has parity gone?? */ |
| 312 | #define S3C2410_UERSTAT_PARITY (0x1000) |
| 313 | |
| 314 | static irqreturn_t |
| 315 | s3c24xx_serial_rx_chars(int irq, void *dev_id, struct pt_regs *regs) |
| 316 | { |
| 317 | struct s3c24xx_uart_port *ourport = dev_id; |
| 318 | struct uart_port *port = &ourport->port; |
| 319 | struct tty_struct *tty = port->info->tty; |
| 320 | unsigned int ufcon, ch, flag, ufstat, uerstat; |
| 321 | int max_count = 64; |
| 322 | |
| 323 | while (max_count-- > 0) { |
| 324 | ufcon = rd_regl(port, S3C2410_UFCON); |
| 325 | ufstat = rd_regl(port, S3C2410_UFSTAT); |
| 326 | |
| 327 | if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) |
| 328 | break; |
| 329 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 330 | uerstat = rd_regl(port, S3C2410_UERSTAT); |
| 331 | ch = rd_regb(port, S3C2410_URXH); |
| 332 | |
| 333 | if (port->flags & UPF_CONS_FLOW) { |
| 334 | int txe = s3c24xx_serial_txempty_nofifo(port); |
| 335 | |
| 336 | if (rx_enabled(port)) { |
| 337 | if (!txe) { |
| 338 | rx_enabled(port) = 0; |
| 339 | continue; |
| 340 | } |
| 341 | } else { |
| 342 | if (txe) { |
| 343 | ufcon |= S3C2410_UFCON_RESETRX; |
| 344 | wr_regl(port, S3C2410_UFCON, ufcon); |
| 345 | rx_enabled(port) = 1; |
| 346 | goto out; |
| 347 | } |
| 348 | continue; |
| 349 | } |
| 350 | } |
| 351 | |
| 352 | /* insert the character into the buffer */ |
| 353 | |
| 354 | flag = TTY_NORMAL; |
| 355 | port->icount.rx++; |
| 356 | |
Russell King | 4584928 | 2005-04-26 15:29:44 +0100 | [diff] [blame] | 357 | if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n", |
| 359 | ch, uerstat); |
| 360 | |
| 361 | /* check for break */ |
| 362 | if (uerstat & S3C2410_UERSTAT_BREAK) { |
| 363 | dbg("break!\n"); |
| 364 | port->icount.brk++; |
| 365 | if (uart_handle_break(port)) |
| 366 | goto ignore_char; |
| 367 | } |
| 368 | |
| 369 | if (uerstat & S3C2410_UERSTAT_FRAME) |
| 370 | port->icount.frame++; |
| 371 | if (uerstat & S3C2410_UERSTAT_OVERRUN) |
| 372 | port->icount.overrun++; |
| 373 | |
| 374 | uerstat &= port->read_status_mask; |
| 375 | |
| 376 | if (uerstat & S3C2410_UERSTAT_BREAK) |
| 377 | flag = TTY_BREAK; |
| 378 | else if (uerstat & S3C2410_UERSTAT_PARITY) |
| 379 | flag = TTY_PARITY; |
| 380 | else if (uerstat & ( S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_OVERRUN)) |
| 381 | flag = TTY_FRAME; |
| 382 | } |
| 383 | |
| 384 | if (uart_handle_sysrq_char(port, ch, regs)) |
| 385 | goto ignore_char; |
| 386 | |
Russell King | 05ab301 | 2005-05-09 23:21:59 +0100 | [diff] [blame] | 387 | uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch, flag); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | |
| 389 | ignore_char: |
| 390 | continue; |
| 391 | } |
| 392 | tty_flip_buffer_push(tty); |
| 393 | |
| 394 | out: |
| 395 | return IRQ_HANDLED; |
| 396 | } |
| 397 | |
| 398 | static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id, struct pt_regs *regs) |
| 399 | { |
| 400 | struct s3c24xx_uart_port *ourport = id; |
| 401 | struct uart_port *port = &ourport->port; |
| 402 | struct circ_buf *xmit = &port->info->xmit; |
| 403 | int count = 256; |
| 404 | |
| 405 | if (port->x_char) { |
| 406 | wr_regb(port, S3C2410_UTXH, port->x_char); |
| 407 | port->icount.tx++; |
| 408 | port->x_char = 0; |
| 409 | goto out; |
| 410 | } |
| 411 | |
| 412 | /* if there isnt anything more to transmit, or the uart is now |
| 413 | * stopped, disable the uart and exit |
| 414 | */ |
| 415 | |
| 416 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 417 | s3c24xx_serial_stop_tx(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | goto out; |
| 419 | } |
| 420 | |
| 421 | /* try and drain the buffer... */ |
| 422 | |
| 423 | while (!uart_circ_empty(xmit) && count-- > 0) { |
| 424 | if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) |
| 425 | break; |
| 426 | |
| 427 | wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); |
| 428 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 429 | port->icount.tx++; |
| 430 | } |
| 431 | |
| 432 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 433 | uart_write_wakeup(port); |
| 434 | |
| 435 | if (uart_circ_empty(xmit)) |
Russell King | b129a8c | 2005-08-31 10:12:14 +0100 | [diff] [blame] | 436 | s3c24xx_serial_stop_tx(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | |
| 438 | out: |
| 439 | return IRQ_HANDLED; |
| 440 | } |
| 441 | |
| 442 | static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) |
| 443 | { |
| 444 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 445 | unsigned long ufstat = rd_regl(port, S3C2410_UFSTAT); |
| 446 | unsigned long ufcon = rd_regl(port, S3C2410_UFCON); |
| 447 | |
| 448 | if (ufcon & S3C2410_UFCON_FIFOMODE) { |
| 449 | if ((ufstat & info->tx_fifomask) != 0 || |
| 450 | (ufstat & info->tx_fifofull)) |
| 451 | return 0; |
| 452 | |
| 453 | return 1; |
| 454 | } |
| 455 | |
| 456 | return s3c24xx_serial_txempty_nofifo(port); |
| 457 | } |
| 458 | |
| 459 | /* no modem control lines */ |
| 460 | static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) |
| 461 | { |
| 462 | unsigned int umstat = rd_regb(port,S3C2410_UMSTAT); |
| 463 | |
| 464 | if (umstat & S3C2410_UMSTAT_CTS) |
| 465 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; |
| 466 | else |
| 467 | return TIOCM_CAR | TIOCM_DSR; |
| 468 | } |
| 469 | |
| 470 | static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 471 | { |
| 472 | /* todo - possibly remove AFC and do manual CTS */ |
| 473 | } |
| 474 | |
| 475 | static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state) |
| 476 | { |
| 477 | unsigned long flags; |
| 478 | unsigned int ucon; |
| 479 | |
| 480 | spin_lock_irqsave(&port->lock, flags); |
| 481 | |
| 482 | ucon = rd_regl(port, S3C2410_UCON); |
| 483 | |
| 484 | if (break_state) |
| 485 | ucon |= S3C2410_UCON_SBREAK; |
| 486 | else |
| 487 | ucon &= ~S3C2410_UCON_SBREAK; |
| 488 | |
| 489 | wr_regl(port, S3C2410_UCON, ucon); |
| 490 | |
| 491 | spin_unlock_irqrestore(&port->lock, flags); |
| 492 | } |
| 493 | |
| 494 | static void s3c24xx_serial_shutdown(struct uart_port *port) |
| 495 | { |
| 496 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
| 497 | |
| 498 | if (ourport->tx_claimed) { |
| 499 | free_irq(TX_IRQ(port), ourport); |
| 500 | tx_enabled(port) = 0; |
| 501 | ourport->tx_claimed = 0; |
| 502 | } |
| 503 | |
| 504 | if (ourport->rx_claimed) { |
| 505 | free_irq(RX_IRQ(port), ourport); |
| 506 | ourport->rx_claimed = 0; |
| 507 | rx_enabled(port) = 0; |
| 508 | } |
| 509 | } |
| 510 | |
| 511 | |
| 512 | static int s3c24xx_serial_startup(struct uart_port *port) |
| 513 | { |
| 514 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | int ret; |
| 516 | |
| 517 | dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n", |
| 518 | port->mapbase, port->membase); |
| 519 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | rx_enabled(port) = 1; |
| 521 | |
| 522 | ret = request_irq(RX_IRQ(port), |
| 523 | s3c24xx_serial_rx_chars, 0, |
| 524 | s3c24xx_serial_portname(port), ourport); |
| 525 | |
| 526 | if (ret != 0) { |
| 527 | printk(KERN_ERR "cannot get irq %d\n", RX_IRQ(port)); |
| 528 | return ret; |
| 529 | } |
| 530 | |
| 531 | ourport->rx_claimed = 1; |
| 532 | |
| 533 | dbg("requesting tx irq...\n"); |
| 534 | |
| 535 | tx_enabled(port) = 1; |
| 536 | |
| 537 | ret = request_irq(TX_IRQ(port), |
| 538 | s3c24xx_serial_tx_chars, 0, |
| 539 | s3c24xx_serial_portname(port), ourport); |
| 540 | |
| 541 | if (ret) { |
| 542 | printk(KERN_ERR "cannot get irq %d\n", TX_IRQ(port)); |
| 543 | goto err; |
| 544 | } |
| 545 | |
| 546 | ourport->tx_claimed = 1; |
| 547 | |
| 548 | dbg("s3c24xx_serial_startup ok\n"); |
| 549 | |
| 550 | /* the port reset code should have done the correct |
| 551 | * register setup for the port controls */ |
| 552 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | return ret; |
| 554 | |
| 555 | err: |
| 556 | s3c24xx_serial_shutdown(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | return ret; |
| 558 | } |
| 559 | |
| 560 | /* power power management control */ |
| 561 | |
| 562 | static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, |
| 563 | unsigned int old) |
| 564 | { |
| 565 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
| 566 | |
| 567 | switch (level) { |
| 568 | case 3: |
| 569 | if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) |
| 570 | clk_disable(ourport->baudclk); |
| 571 | |
| 572 | clk_disable(ourport->clk); |
| 573 | break; |
| 574 | |
| 575 | case 0: |
| 576 | clk_enable(ourport->clk); |
| 577 | |
| 578 | if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) |
| 579 | clk_enable(ourport->baudclk); |
| 580 | |
| 581 | break; |
| 582 | default: |
| 583 | printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level); |
| 584 | } |
| 585 | } |
| 586 | |
| 587 | /* baud rate calculation |
| 588 | * |
| 589 | * The UARTs on the S3C2410/S3C2440 can take their clocks from a number |
| 590 | * of different sources, including the peripheral clock ("pclk") and an |
| 591 | * external clock ("uclk"). The S3C2440 also adds the core clock ("fclk") |
| 592 | * with a programmable extra divisor. |
| 593 | * |
| 594 | * The following code goes through the clock sources, and calculates the |
| 595 | * baud clocks (and the resultant actual baud rates) and then tries to |
| 596 | * pick the closest one and select that. |
| 597 | * |
| 598 | */ |
| 599 | |
| 600 | |
| 601 | #define MAX_CLKS (8) |
| 602 | |
| 603 | static struct s3c24xx_uart_clksrc tmp_clksrc = { |
| 604 | .name = "pclk", |
| 605 | .min_baud = 0, |
| 606 | .max_baud = 0, |
| 607 | .divisor = 1, |
| 608 | }; |
| 609 | |
| 610 | static inline int |
| 611 | s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) |
| 612 | { |
| 613 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 614 | |
| 615 | return (info->get_clksrc)(port, c); |
| 616 | } |
| 617 | |
| 618 | static inline int |
| 619 | s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) |
| 620 | { |
| 621 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 622 | |
| 623 | return (info->set_clksrc)(port, c); |
| 624 | } |
| 625 | |
| 626 | struct baud_calc { |
| 627 | struct s3c24xx_uart_clksrc *clksrc; |
| 628 | unsigned int calc; |
| 629 | unsigned int quot; |
| 630 | struct clk *src; |
| 631 | }; |
| 632 | |
| 633 | static int s3c24xx_serial_calcbaud(struct baud_calc *calc, |
| 634 | struct uart_port *port, |
| 635 | struct s3c24xx_uart_clksrc *clksrc, |
| 636 | unsigned int baud) |
| 637 | { |
| 638 | unsigned long rate; |
| 639 | |
| 640 | calc->src = clk_get(port->dev, clksrc->name); |
| 641 | if (calc->src == NULL || IS_ERR(calc->src)) |
| 642 | return 0; |
| 643 | |
| 644 | rate = clk_get_rate(calc->src); |
| 645 | rate /= clksrc->divisor; |
| 646 | |
| 647 | calc->clksrc = clksrc; |
| 648 | calc->quot = (rate + (8 * baud)) / (16 * baud); |
| 649 | calc->calc = (rate / (calc->quot * 16)); |
| 650 | |
| 651 | calc->quot--; |
| 652 | return 1; |
| 653 | } |
| 654 | |
| 655 | static unsigned int s3c24xx_serial_getclk(struct uart_port *port, |
| 656 | struct s3c24xx_uart_clksrc **clksrc, |
| 657 | struct clk **clk, |
| 658 | unsigned int baud) |
| 659 | { |
| 660 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); |
| 661 | struct s3c24xx_uart_clksrc *clkp; |
| 662 | struct baud_calc res[MAX_CLKS]; |
| 663 | struct baud_calc *resptr, *best, *sptr; |
| 664 | int i; |
| 665 | |
| 666 | clkp = cfg->clocks; |
| 667 | best = NULL; |
| 668 | |
| 669 | if (cfg->clocks_size < 2) { |
| 670 | if (cfg->clocks_size == 0) |
| 671 | clkp = &tmp_clksrc; |
| 672 | |
| 673 | /* check to see if we're sourcing fclk, and if so we're |
| 674 | * going to have to update the clock source |
| 675 | */ |
| 676 | |
| 677 | if (strcmp(clkp->name, "fclk") == 0) { |
| 678 | struct s3c24xx_uart_clksrc src; |
| 679 | |
| 680 | s3c24xx_serial_getsource(port, &src); |
| 681 | |
| 682 | /* check that the port already using fclk, and if |
| 683 | * not, then re-select fclk |
| 684 | */ |
| 685 | |
| 686 | if (strcmp(src.name, clkp->name) == 0) { |
| 687 | s3c24xx_serial_setsource(port, clkp); |
| 688 | s3c24xx_serial_getsource(port, &src); |
| 689 | } |
| 690 | |
| 691 | clkp->divisor = src.divisor; |
| 692 | } |
| 693 | |
| 694 | s3c24xx_serial_calcbaud(res, port, clkp, baud); |
| 695 | best = res; |
| 696 | resptr = best + 1; |
| 697 | } else { |
| 698 | resptr = res; |
| 699 | |
| 700 | for (i = 0; i < cfg->clocks_size; i++, clkp++) { |
| 701 | if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud)) |
| 702 | resptr++; |
| 703 | } |
| 704 | } |
| 705 | |
| 706 | /* ok, we now need to select the best clock we found */ |
| 707 | |
| 708 | if (!best) { |
| 709 | unsigned int deviation = (1<<30)|((1<<30)-1); |
| 710 | int calc_deviation; |
| 711 | |
| 712 | for (sptr = res; sptr < resptr; sptr++) { |
| 713 | printk(KERN_DEBUG |
| 714 | "found clk %p (%s) quot %d, calc %d\n", |
| 715 | sptr->clksrc, sptr->clksrc->name, |
| 716 | sptr->quot, sptr->calc); |
| 717 | |
| 718 | calc_deviation = baud - sptr->calc; |
| 719 | if (calc_deviation < 0) |
| 720 | calc_deviation = -calc_deviation; |
| 721 | |
| 722 | if (calc_deviation < deviation) { |
| 723 | best = sptr; |
| 724 | deviation = calc_deviation; |
| 725 | } |
| 726 | } |
| 727 | |
| 728 | printk(KERN_DEBUG "best %p (deviation %d)\n", best, deviation); |
| 729 | } |
| 730 | |
| 731 | printk(KERN_DEBUG "selected clock %p (%s) quot %d, calc %d\n", |
| 732 | best->clksrc, best->clksrc->name, best->quot, best->calc); |
| 733 | |
| 734 | /* store results to pass back */ |
| 735 | |
| 736 | *clksrc = best->clksrc; |
| 737 | *clk = best->src; |
| 738 | |
| 739 | return best->quot; |
| 740 | } |
| 741 | |
| 742 | static void s3c24xx_serial_set_termios(struct uart_port *port, |
| 743 | struct termios *termios, |
| 744 | struct termios *old) |
| 745 | { |
| 746 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); |
| 747 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
Ben Dooks | f04da5d | 2005-09-25 23:02:49 +0100 | [diff] [blame] | 748 | struct s3c24xx_uart_clksrc *clksrc = NULL; |
| 749 | struct clk *clk = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | unsigned long flags; |
| 751 | unsigned int baud, quot; |
| 752 | unsigned int ulcon; |
| 753 | unsigned int umcon; |
| 754 | |
| 755 | /* |
| 756 | * We don't support modem control lines. |
| 757 | */ |
| 758 | termios->c_cflag &= ~(HUPCL | CMSPAR); |
| 759 | termios->c_cflag |= CLOCAL; |
| 760 | |
| 761 | /* |
| 762 | * Ask the core to calculate the divisor for us. |
| 763 | */ |
| 764 | |
| 765 | baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); |
| 766 | |
| 767 | if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) |
| 768 | quot = port->custom_divisor; |
| 769 | else |
| 770 | quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud); |
| 771 | |
| 772 | /* check to see if we need to change clock source */ |
| 773 | |
| 774 | if (ourport->clksrc != clksrc || ourport->baudclk != clk) { |
| 775 | s3c24xx_serial_setsource(port, clksrc); |
| 776 | |
| 777 | if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { |
| 778 | clk_disable(ourport->baudclk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | ourport->baudclk = NULL; |
| 780 | } |
| 781 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 782 | clk_enable(clk); |
| 783 | |
| 784 | ourport->clksrc = clksrc; |
| 785 | ourport->baudclk = clk; |
| 786 | } |
| 787 | |
| 788 | switch (termios->c_cflag & CSIZE) { |
| 789 | case CS5: |
| 790 | dbg("config: 5bits/char\n"); |
| 791 | ulcon = S3C2410_LCON_CS5; |
| 792 | break; |
| 793 | case CS6: |
| 794 | dbg("config: 6bits/char\n"); |
| 795 | ulcon = S3C2410_LCON_CS6; |
| 796 | break; |
| 797 | case CS7: |
| 798 | dbg("config: 7bits/char\n"); |
| 799 | ulcon = S3C2410_LCON_CS7; |
| 800 | break; |
| 801 | case CS8: |
| 802 | default: |
| 803 | dbg("config: 8bits/char\n"); |
| 804 | ulcon = S3C2410_LCON_CS8; |
| 805 | break; |
| 806 | } |
| 807 | |
| 808 | /* preserve original lcon IR settings */ |
| 809 | ulcon |= (cfg->ulcon & S3C2410_LCON_IRM); |
| 810 | |
| 811 | if (termios->c_cflag & CSTOPB) |
| 812 | ulcon |= S3C2410_LCON_STOPB; |
| 813 | |
| 814 | umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0; |
| 815 | |
| 816 | if (termios->c_cflag & PARENB) { |
| 817 | if (termios->c_cflag & PARODD) |
| 818 | ulcon |= S3C2410_LCON_PODD; |
| 819 | else |
| 820 | ulcon |= S3C2410_LCON_PEVEN; |
| 821 | } else { |
| 822 | ulcon |= S3C2410_LCON_PNONE; |
| 823 | } |
| 824 | |
| 825 | spin_lock_irqsave(&port->lock, flags); |
| 826 | |
| 827 | dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot); |
| 828 | |
| 829 | wr_regl(port, S3C2410_ULCON, ulcon); |
| 830 | wr_regl(port, S3C2410_UBRDIV, quot); |
| 831 | wr_regl(port, S3C2410_UMCON, umcon); |
| 832 | |
| 833 | dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", |
| 834 | rd_regl(port, S3C2410_ULCON), |
| 835 | rd_regl(port, S3C2410_UCON), |
| 836 | rd_regl(port, S3C2410_UFCON)); |
| 837 | |
| 838 | /* |
| 839 | * Update the per-port timeout. |
| 840 | */ |
| 841 | uart_update_timeout(port, termios->c_cflag, baud); |
| 842 | |
| 843 | /* |
| 844 | * Which character status flags are we interested in? |
| 845 | */ |
| 846 | port->read_status_mask = S3C2410_UERSTAT_OVERRUN; |
| 847 | if (termios->c_iflag & INPCK) |
| 848 | port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY; |
| 849 | |
| 850 | /* |
| 851 | * Which character status flags should we ignore? |
| 852 | */ |
| 853 | port->ignore_status_mask = 0; |
| 854 | if (termios->c_iflag & IGNPAR) |
| 855 | port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN; |
| 856 | if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) |
| 857 | port->ignore_status_mask |= S3C2410_UERSTAT_FRAME; |
| 858 | |
| 859 | /* |
| 860 | * Ignore all characters if CREAD is not set. |
| 861 | */ |
| 862 | if ((termios->c_cflag & CREAD) == 0) |
| 863 | port->ignore_status_mask |= RXSTAT_DUMMY_READ; |
| 864 | |
| 865 | spin_unlock_irqrestore(&port->lock, flags); |
| 866 | } |
| 867 | |
| 868 | static const char *s3c24xx_serial_type(struct uart_port *port) |
| 869 | { |
| 870 | switch (port->type) { |
| 871 | case PORT_S3C2410: |
| 872 | return "S3C2410"; |
| 873 | case PORT_S3C2440: |
| 874 | return "S3C2440"; |
| 875 | default: |
| 876 | return NULL; |
| 877 | } |
| 878 | } |
| 879 | |
| 880 | #define MAP_SIZE (0x100) |
| 881 | |
| 882 | static void s3c24xx_serial_release_port(struct uart_port *port) |
| 883 | { |
| 884 | release_mem_region(port->mapbase, MAP_SIZE); |
| 885 | } |
| 886 | |
| 887 | static int s3c24xx_serial_request_port(struct uart_port *port) |
| 888 | { |
Ben Dooks | d9dc580 | 2005-06-23 21:56:46 +0100 | [diff] [blame] | 889 | const char *name = s3c24xx_serial_portname(port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | return request_mem_region(port->mapbase, MAP_SIZE, name) ? 0 : -EBUSY; |
| 891 | } |
| 892 | |
| 893 | static void s3c24xx_serial_config_port(struct uart_port *port, int flags) |
| 894 | { |
| 895 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 896 | |
| 897 | if (flags & UART_CONFIG_TYPE && |
| 898 | s3c24xx_serial_request_port(port) == 0) |
| 899 | port->type = info->type; |
| 900 | } |
| 901 | |
| 902 | /* |
| 903 | * verify the new serial_struct (for TIOCSSERIAL). |
| 904 | */ |
| 905 | static int |
| 906 | s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 907 | { |
| 908 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 909 | |
| 910 | if (ser->type != PORT_UNKNOWN && ser->type != info->type) |
| 911 | return -EINVAL; |
| 912 | |
| 913 | return 0; |
| 914 | } |
| 915 | |
| 916 | |
| 917 | #ifdef CONFIG_SERIAL_S3C2410_CONSOLE |
| 918 | |
| 919 | static struct console s3c24xx_serial_console; |
| 920 | |
| 921 | #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console |
| 922 | #else |
| 923 | #define S3C24XX_SERIAL_CONSOLE NULL |
| 924 | #endif |
| 925 | |
| 926 | static struct uart_ops s3c24xx_serial_ops = { |
| 927 | .pm = s3c24xx_serial_pm, |
| 928 | .tx_empty = s3c24xx_serial_tx_empty, |
| 929 | .get_mctrl = s3c24xx_serial_get_mctrl, |
| 930 | .set_mctrl = s3c24xx_serial_set_mctrl, |
| 931 | .stop_tx = s3c24xx_serial_stop_tx, |
| 932 | .start_tx = s3c24xx_serial_start_tx, |
| 933 | .stop_rx = s3c24xx_serial_stop_rx, |
| 934 | .enable_ms = s3c24xx_serial_enable_ms, |
| 935 | .break_ctl = s3c24xx_serial_break_ctl, |
| 936 | .startup = s3c24xx_serial_startup, |
| 937 | .shutdown = s3c24xx_serial_shutdown, |
| 938 | .set_termios = s3c24xx_serial_set_termios, |
| 939 | .type = s3c24xx_serial_type, |
| 940 | .release_port = s3c24xx_serial_release_port, |
| 941 | .request_port = s3c24xx_serial_request_port, |
| 942 | .config_port = s3c24xx_serial_config_port, |
| 943 | .verify_port = s3c24xx_serial_verify_port, |
| 944 | }; |
| 945 | |
| 946 | |
| 947 | static struct uart_driver s3c24xx_uart_drv = { |
| 948 | .owner = THIS_MODULE, |
| 949 | .dev_name = "s3c2410_serial", |
| 950 | .nr = 3, |
| 951 | .cons = S3C24XX_SERIAL_CONSOLE, |
| 952 | .driver_name = S3C24XX_SERIAL_NAME, |
| 953 | .devfs_name = S3C24XX_SERIAL_DEVFS, |
| 954 | .major = S3C24XX_SERIAL_MAJOR, |
| 955 | .minor = S3C24XX_SERIAL_MINOR, |
| 956 | }; |
| 957 | |
| 958 | static struct s3c24xx_uart_port s3c24xx_serial_ports[NR_PORTS] = { |
| 959 | [0] = { |
| 960 | .port = { |
| 961 | .lock = SPIN_LOCK_UNLOCKED, |
| 962 | .iotype = UPIO_MEM, |
| 963 | .irq = IRQ_S3CUART_RX0, |
| 964 | .uartclk = 0, |
| 965 | .fifosize = 16, |
| 966 | .ops = &s3c24xx_serial_ops, |
| 967 | .flags = UPF_BOOT_AUTOCONF, |
| 968 | .line = 0, |
| 969 | } |
| 970 | }, |
| 971 | [1] = { |
| 972 | .port = { |
| 973 | .lock = SPIN_LOCK_UNLOCKED, |
| 974 | .iotype = UPIO_MEM, |
| 975 | .irq = IRQ_S3CUART_RX1, |
| 976 | .uartclk = 0, |
| 977 | .fifosize = 16, |
| 978 | .ops = &s3c24xx_serial_ops, |
| 979 | .flags = UPF_BOOT_AUTOCONF, |
| 980 | .line = 1, |
| 981 | } |
| 982 | }, |
| 983 | #if NR_PORTS > 2 |
| 984 | |
| 985 | [2] = { |
| 986 | .port = { |
| 987 | .lock = SPIN_LOCK_UNLOCKED, |
| 988 | .iotype = UPIO_MEM, |
| 989 | .irq = IRQ_S3CUART_RX2, |
| 990 | .uartclk = 0, |
| 991 | .fifosize = 16, |
| 992 | .ops = &s3c24xx_serial_ops, |
| 993 | .flags = UPF_BOOT_AUTOCONF, |
| 994 | .line = 2, |
| 995 | } |
| 996 | } |
| 997 | #endif |
| 998 | }; |
| 999 | |
| 1000 | /* s3c24xx_serial_resetport |
| 1001 | * |
| 1002 | * wrapper to call the specific reset for this port (reset the fifos |
| 1003 | * and the settings) |
| 1004 | */ |
| 1005 | |
| 1006 | static inline int s3c24xx_serial_resetport(struct uart_port * port, |
| 1007 | struct s3c2410_uartcfg *cfg) |
| 1008 | { |
| 1009 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 1010 | |
| 1011 | return (info->reset_port)(port, cfg); |
| 1012 | } |
| 1013 | |
| 1014 | /* s3c24xx_serial_init_port |
| 1015 | * |
| 1016 | * initialise a single serial port from the platform device given |
| 1017 | */ |
| 1018 | |
| 1019 | static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, |
| 1020 | struct s3c24xx_uart_info *info, |
| 1021 | struct platform_device *platdev) |
| 1022 | { |
| 1023 | struct uart_port *port = &ourport->port; |
| 1024 | struct s3c2410_uartcfg *cfg; |
| 1025 | struct resource *res; |
| 1026 | |
| 1027 | dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev); |
| 1028 | |
| 1029 | if (platdev == NULL) |
| 1030 | return -ENODEV; |
| 1031 | |
| 1032 | cfg = s3c24xx_dev_to_cfg(&platdev->dev); |
| 1033 | |
| 1034 | if (port->mapbase != 0) |
| 1035 | return 0; |
| 1036 | |
| 1037 | if (cfg->hwport > 3) |
| 1038 | return -EINVAL; |
| 1039 | |
| 1040 | /* setup info for port */ |
| 1041 | port->dev = &platdev->dev; |
| 1042 | ourport->info = info; |
| 1043 | |
| 1044 | /* copy the info in from provided structure */ |
| 1045 | ourport->port.fifosize = info->fifosize; |
| 1046 | |
| 1047 | dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport); |
| 1048 | |
| 1049 | port->uartclk = 1; |
| 1050 | |
| 1051 | if (cfg->uart_flags & UPF_CONS_FLOW) { |
| 1052 | dbg("s3c24xx_serial_init_port: enabling flow control\n"); |
| 1053 | port->flags |= UPF_CONS_FLOW; |
| 1054 | } |
| 1055 | |
| 1056 | /* sort our the physical and virtual addresses for each UART */ |
| 1057 | |
| 1058 | res = platform_get_resource(platdev, IORESOURCE_MEM, 0); |
| 1059 | if (res == NULL) { |
| 1060 | printk(KERN_ERR "failed to find memory resource for uart\n"); |
| 1061 | return -EINVAL; |
| 1062 | } |
| 1063 | |
| 1064 | dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); |
| 1065 | |
| 1066 | port->mapbase = res->start; |
Lucas Correia Villa Real | 0367a8d | 2006-01-26 15:20:50 +0000 | [diff] [blame] | 1067 | port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1068 | port->irq = platform_get_irq(platdev, 0); |
| 1069 | |
| 1070 | ourport->clk = clk_get(&platdev->dev, "uart"); |
| 1071 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1072 | dbg("port: map=%08x, mem=%08x, irq=%d, clock=%ld\n", |
| 1073 | port->mapbase, port->membase, port->irq, port->uartclk); |
| 1074 | |
| 1075 | /* reset the fifos (and setup the uart) */ |
| 1076 | s3c24xx_serial_resetport(port, cfg); |
| 1077 | return 0; |
| 1078 | } |
| 1079 | |
| 1080 | /* Device driver serial port probe */ |
| 1081 | |
| 1082 | static int probe_index = 0; |
| 1083 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1084 | static int s3c24xx_serial_probe(struct platform_device *dev, |
Ben Dooks | 17efa64 | 2005-10-12 19:58:06 +0100 | [diff] [blame] | 1085 | struct s3c24xx_uart_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | { |
| 1087 | struct s3c24xx_uart_port *ourport; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1088 | int ret; |
| 1089 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1090 | dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1091 | |
| 1092 | ourport = &s3c24xx_serial_ports[probe_index]; |
| 1093 | probe_index++; |
| 1094 | |
| 1095 | dbg("%s: initialising port %p...\n", __FUNCTION__, ourport); |
| 1096 | |
| 1097 | ret = s3c24xx_serial_init_port(ourport, info, dev); |
| 1098 | if (ret < 0) |
| 1099 | goto probe_err; |
| 1100 | |
| 1101 | dbg("%s: adding port\n", __FUNCTION__); |
| 1102 | uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1103 | platform_set_drvdata(dev, &ourport->port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1104 | |
| 1105 | return 0; |
| 1106 | |
| 1107 | probe_err: |
| 1108 | return ret; |
| 1109 | } |
| 1110 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1111 | static int s3c24xx_serial_remove(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1112 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1113 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1114 | |
| 1115 | if (port) |
| 1116 | uart_remove_one_port(&s3c24xx_uart_drv, port); |
| 1117 | |
| 1118 | return 0; |
| 1119 | } |
| 1120 | |
| 1121 | /* UART power management code */ |
| 1122 | |
| 1123 | #ifdef CONFIG_PM |
| 1124 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1125 | static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1126 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1127 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 1129 | if (port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1130 | uart_suspend_port(&s3c24xx_uart_drv, port); |
| 1131 | |
| 1132 | return 0; |
| 1133 | } |
| 1134 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1135 | static int s3c24xx_serial_resume(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1137 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1138 | struct s3c24xx_uart_port *ourport = to_ourport(port); |
| 1139 | |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 1140 | if (port) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1141 | clk_enable(ourport->clk); |
| 1142 | s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); |
| 1143 | clk_disable(ourport->clk); |
| 1144 | |
| 1145 | uart_resume_port(&s3c24xx_uart_drv, port); |
| 1146 | } |
| 1147 | |
| 1148 | return 0; |
| 1149 | } |
| 1150 | |
| 1151 | #else |
| 1152 | #define s3c24xx_serial_suspend NULL |
| 1153 | #define s3c24xx_serial_resume NULL |
| 1154 | #endif |
| 1155 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1156 | static int s3c24xx_serial_init(struct platform_driver *drv, |
Ben Dooks | 17efa64 | 2005-10-12 19:58:06 +0100 | [diff] [blame] | 1157 | struct s3c24xx_uart_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1158 | { |
| 1159 | dbg("s3c24xx_serial_init(%p,%p)\n", drv, info); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1160 | return platform_driver_register(drv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1161 | } |
| 1162 | |
| 1163 | |
| 1164 | /* now comes the code to initialise either the s3c2410 or s3c2440 serial |
| 1165 | * port information |
| 1166 | */ |
| 1167 | |
| 1168 | /* cpu specific variations on the serial port support */ |
| 1169 | |
| 1170 | #ifdef CONFIG_CPU_S3C2400 |
| 1171 | |
| 1172 | static int s3c2400_serial_getsource(struct uart_port *port, |
| 1173 | struct s3c24xx_uart_clksrc *clk) |
| 1174 | { |
| 1175 | clk->divisor = 1; |
| 1176 | clk->name = "pclk"; |
| 1177 | |
| 1178 | return 0; |
| 1179 | } |
| 1180 | |
| 1181 | static int s3c2400_serial_setsource(struct uart_port *port, |
| 1182 | struct s3c24xx_uart_clksrc *clk) |
| 1183 | { |
| 1184 | return 0; |
| 1185 | } |
| 1186 | |
| 1187 | static int s3c2400_serial_resetport(struct uart_port *port, |
| 1188 | struct s3c2410_uartcfg *cfg) |
| 1189 | { |
| 1190 | dbg("s3c2400_serial_resetport: port=%p (%08lx), cfg=%p\n", |
| 1191 | port, port->mapbase, cfg); |
| 1192 | |
| 1193 | wr_regl(port, S3C2410_UCON, cfg->ucon); |
| 1194 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); |
| 1195 | |
| 1196 | /* reset both fifos */ |
| 1197 | |
| 1198 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); |
| 1199 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); |
| 1200 | |
| 1201 | return 0; |
| 1202 | } |
| 1203 | |
| 1204 | static struct s3c24xx_uart_info s3c2400_uart_inf = { |
| 1205 | .name = "Samsung S3C2400 UART", |
| 1206 | .type = PORT_S3C2400, |
| 1207 | .fifosize = 16, |
| 1208 | .rx_fifomask = S3C2410_UFSTAT_RXMASK, |
| 1209 | .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, |
| 1210 | .rx_fifofull = S3C2410_UFSTAT_RXFULL, |
| 1211 | .tx_fifofull = S3C2410_UFSTAT_TXFULL, |
| 1212 | .tx_fifomask = S3C2410_UFSTAT_TXMASK, |
| 1213 | .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, |
| 1214 | .get_clksrc = s3c2400_serial_getsource, |
| 1215 | .set_clksrc = s3c2400_serial_setsource, |
| 1216 | .reset_port = s3c2400_serial_resetport, |
| 1217 | }; |
| 1218 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1219 | static int s3c2400_serial_probe(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | { |
| 1221 | return s3c24xx_serial_probe(dev, &s3c2400_uart_inf); |
| 1222 | } |
| 1223 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1224 | static struct platform_driver s3c2400_serial_drv = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1225 | .probe = s3c2400_serial_probe, |
| 1226 | .remove = s3c24xx_serial_remove, |
| 1227 | .suspend = s3c24xx_serial_suspend, |
| 1228 | .resume = s3c24xx_serial_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1229 | .driver = { |
| 1230 | .name = "s3c2400-uart", |
| 1231 | .owner = THIS_MODULE, |
| 1232 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1233 | }; |
| 1234 | |
| 1235 | static inline int s3c2400_serial_init(void) |
| 1236 | { |
| 1237 | return s3c24xx_serial_init(&s3c2400_serial_drv, &s3c2400_uart_inf); |
| 1238 | } |
| 1239 | |
| 1240 | static inline void s3c2400_serial_exit(void) |
| 1241 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1242 | platform_driver_unregister(&s3c2400_serial_drv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | } |
| 1244 | |
| 1245 | #define s3c2400_uart_inf_at &s3c2400_uart_inf |
| 1246 | #else |
| 1247 | |
| 1248 | static inline int s3c2400_serial_init(void) |
| 1249 | { |
| 1250 | return 0; |
| 1251 | } |
| 1252 | |
| 1253 | static inline void s3c2400_serial_exit(void) |
| 1254 | { |
| 1255 | } |
| 1256 | |
| 1257 | #define s3c2400_uart_inf_at NULL |
| 1258 | |
| 1259 | #endif /* CONFIG_CPU_S3C2400 */ |
| 1260 | |
| 1261 | /* S3C2410 support */ |
| 1262 | |
| 1263 | #ifdef CONFIG_CPU_S3C2410 |
| 1264 | |
| 1265 | static int s3c2410_serial_setsource(struct uart_port *port, |
| 1266 | struct s3c24xx_uart_clksrc *clk) |
| 1267 | { |
| 1268 | unsigned long ucon = rd_regl(port, S3C2410_UCON); |
| 1269 | |
| 1270 | if (strcmp(clk->name, "uclk") == 0) |
| 1271 | ucon |= S3C2410_UCON_UCLK; |
| 1272 | else |
| 1273 | ucon &= ~S3C2410_UCON_UCLK; |
| 1274 | |
| 1275 | wr_regl(port, S3C2410_UCON, ucon); |
| 1276 | return 0; |
| 1277 | } |
| 1278 | |
| 1279 | static int s3c2410_serial_getsource(struct uart_port *port, |
| 1280 | struct s3c24xx_uart_clksrc *clk) |
| 1281 | { |
| 1282 | unsigned long ucon = rd_regl(port, S3C2410_UCON); |
| 1283 | |
| 1284 | clk->divisor = 1; |
| 1285 | clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk"; |
| 1286 | |
| 1287 | return 0; |
| 1288 | } |
| 1289 | |
| 1290 | static int s3c2410_serial_resetport(struct uart_port *port, |
| 1291 | struct s3c2410_uartcfg *cfg) |
| 1292 | { |
| 1293 | dbg("s3c2410_serial_resetport: port=%p (%08lx), cfg=%p\n", |
| 1294 | port, port->mapbase, cfg); |
| 1295 | |
| 1296 | wr_regl(port, S3C2410_UCON, cfg->ucon); |
| 1297 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); |
| 1298 | |
| 1299 | /* reset both fifos */ |
| 1300 | |
| 1301 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); |
| 1302 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); |
| 1303 | |
| 1304 | return 0; |
| 1305 | } |
| 1306 | |
| 1307 | static struct s3c24xx_uart_info s3c2410_uart_inf = { |
| 1308 | .name = "Samsung S3C2410 UART", |
| 1309 | .type = PORT_S3C2410, |
| 1310 | .fifosize = 16, |
| 1311 | .rx_fifomask = S3C2410_UFSTAT_RXMASK, |
| 1312 | .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, |
| 1313 | .rx_fifofull = S3C2410_UFSTAT_RXFULL, |
| 1314 | .tx_fifofull = S3C2410_UFSTAT_TXFULL, |
| 1315 | .tx_fifomask = S3C2410_UFSTAT_TXMASK, |
| 1316 | .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, |
| 1317 | .get_clksrc = s3c2410_serial_getsource, |
| 1318 | .set_clksrc = s3c2410_serial_setsource, |
| 1319 | .reset_port = s3c2410_serial_resetport, |
| 1320 | }; |
| 1321 | |
| 1322 | /* device management */ |
| 1323 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1324 | static int s3c2410_serial_probe(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1325 | { |
| 1326 | return s3c24xx_serial_probe(dev, &s3c2410_uart_inf); |
| 1327 | } |
| 1328 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1329 | static struct platform_driver s3c2410_serial_drv = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1330 | .probe = s3c2410_serial_probe, |
| 1331 | .remove = s3c24xx_serial_remove, |
| 1332 | .suspend = s3c24xx_serial_suspend, |
| 1333 | .resume = s3c24xx_serial_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1334 | .driver = { |
| 1335 | .name = "s3c2410-uart", |
| 1336 | .owner = THIS_MODULE, |
| 1337 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1338 | }; |
| 1339 | |
| 1340 | static inline int s3c2410_serial_init(void) |
| 1341 | { |
| 1342 | return s3c24xx_serial_init(&s3c2410_serial_drv, &s3c2410_uart_inf); |
| 1343 | } |
| 1344 | |
| 1345 | static inline void s3c2410_serial_exit(void) |
| 1346 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1347 | platform_driver_unregister(&s3c2410_serial_drv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1348 | } |
| 1349 | |
| 1350 | #define s3c2410_uart_inf_at &s3c2410_uart_inf |
| 1351 | #else |
| 1352 | |
| 1353 | static inline int s3c2410_serial_init(void) |
| 1354 | { |
| 1355 | return 0; |
| 1356 | } |
| 1357 | |
| 1358 | static inline void s3c2410_serial_exit(void) |
| 1359 | { |
| 1360 | } |
| 1361 | |
| 1362 | #define s3c2410_uart_inf_at NULL |
| 1363 | |
| 1364 | #endif /* CONFIG_CPU_S3C2410 */ |
| 1365 | |
| 1366 | #ifdef CONFIG_CPU_S3C2440 |
| 1367 | |
| 1368 | static int s3c2440_serial_setsource(struct uart_port *port, |
| 1369 | struct s3c24xx_uart_clksrc *clk) |
| 1370 | { |
| 1371 | unsigned long ucon = rd_regl(port, S3C2410_UCON); |
| 1372 | |
| 1373 | // todo - proper fclk<>nonfclk switch // |
| 1374 | |
| 1375 | ucon &= ~S3C2440_UCON_CLKMASK; |
| 1376 | |
| 1377 | if (strcmp(clk->name, "uclk") == 0) |
| 1378 | ucon |= S3C2440_UCON_UCLK; |
| 1379 | else if (strcmp(clk->name, "pclk") == 0) |
| 1380 | ucon |= S3C2440_UCON_PCLK; |
| 1381 | else if (strcmp(clk->name, "fclk") == 0) |
| 1382 | ucon |= S3C2440_UCON_FCLK; |
| 1383 | else { |
| 1384 | printk(KERN_ERR "unknown clock source %s\n", clk->name); |
| 1385 | return -EINVAL; |
| 1386 | } |
| 1387 | |
| 1388 | wr_regl(port, S3C2410_UCON, ucon); |
| 1389 | return 0; |
| 1390 | } |
| 1391 | |
| 1392 | |
| 1393 | static int s3c2440_serial_getsource(struct uart_port *port, |
| 1394 | struct s3c24xx_uart_clksrc *clk) |
| 1395 | { |
| 1396 | unsigned long ucon = rd_regl(port, S3C2410_UCON); |
| 1397 | unsigned long ucon0, ucon1, ucon2; |
| 1398 | |
| 1399 | switch (ucon & S3C2440_UCON_CLKMASK) { |
| 1400 | case S3C2440_UCON_UCLK: |
| 1401 | clk->divisor = 1; |
| 1402 | clk->name = "uclk"; |
| 1403 | break; |
| 1404 | |
| 1405 | case S3C2440_UCON_PCLK: |
| 1406 | case S3C2440_UCON_PCLK2: |
| 1407 | clk->divisor = 1; |
| 1408 | clk->name = "pclk"; |
| 1409 | break; |
| 1410 | |
| 1411 | case S3C2440_UCON_FCLK: |
| 1412 | /* the fun of calculating the uart divisors on |
| 1413 | * the s3c2440 */ |
| 1414 | |
| 1415 | ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON); |
| 1416 | ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON); |
| 1417 | ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON); |
| 1418 | |
| 1419 | printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2); |
| 1420 | |
| 1421 | ucon0 &= S3C2440_UCON0_DIVMASK; |
| 1422 | ucon1 &= S3C2440_UCON1_DIVMASK; |
| 1423 | ucon2 &= S3C2440_UCON2_DIVMASK; |
| 1424 | |
| 1425 | if (ucon0 != 0) { |
| 1426 | clk->divisor = ucon0 >> S3C2440_UCON_DIVSHIFT; |
| 1427 | clk->divisor += 6; |
| 1428 | } else if (ucon1 != 0) { |
| 1429 | clk->divisor = ucon1 >> S3C2440_UCON_DIVSHIFT; |
| 1430 | clk->divisor += 21; |
| 1431 | } else if (ucon2 != 0) { |
| 1432 | clk->divisor = ucon2 >> S3C2440_UCON_DIVSHIFT; |
| 1433 | clk->divisor += 36; |
| 1434 | } else { |
| 1435 | /* manual calims 44, seems to be 9 */ |
| 1436 | clk->divisor = 9; |
| 1437 | } |
| 1438 | |
| 1439 | clk->name = "fclk"; |
| 1440 | break; |
| 1441 | } |
| 1442 | |
| 1443 | return 0; |
| 1444 | } |
| 1445 | |
| 1446 | static int s3c2440_serial_resetport(struct uart_port *port, |
| 1447 | struct s3c2410_uartcfg *cfg) |
| 1448 | { |
| 1449 | unsigned long ucon = rd_regl(port, S3C2410_UCON); |
| 1450 | |
| 1451 | dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n", |
| 1452 | port, port->mapbase, cfg); |
| 1453 | |
| 1454 | /* ensure we don't change the clock settings... */ |
| 1455 | |
| 1456 | ucon &= (S3C2440_UCON0_DIVMASK | (3<<10)); |
| 1457 | |
| 1458 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); |
| 1459 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); |
| 1460 | |
| 1461 | /* reset both fifos */ |
| 1462 | |
| 1463 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); |
| 1464 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); |
| 1465 | |
| 1466 | return 0; |
| 1467 | } |
| 1468 | |
| 1469 | static struct s3c24xx_uart_info s3c2440_uart_inf = { |
| 1470 | .name = "Samsung S3C2440 UART", |
| 1471 | .type = PORT_S3C2440, |
| 1472 | .fifosize = 64, |
| 1473 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, |
| 1474 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, |
| 1475 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, |
| 1476 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, |
| 1477 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, |
| 1478 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, |
| 1479 | .get_clksrc = s3c2440_serial_getsource, |
| 1480 | .set_clksrc = s3c2440_serial_setsource, |
| 1481 | .reset_port = s3c2440_serial_resetport, |
| 1482 | }; |
| 1483 | |
| 1484 | /* device management */ |
| 1485 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1486 | static int s3c2440_serial_probe(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1487 | { |
| 1488 | dbg("s3c2440_serial_probe: dev=%p\n", dev); |
| 1489 | return s3c24xx_serial_probe(dev, &s3c2440_uart_inf); |
| 1490 | } |
| 1491 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1492 | static struct platform_driver s3c2440_serial_drv = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1493 | .probe = s3c2440_serial_probe, |
| 1494 | .remove = s3c24xx_serial_remove, |
| 1495 | .suspend = s3c24xx_serial_suspend, |
| 1496 | .resume = s3c24xx_serial_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1497 | .driver = { |
| 1498 | .name = "s3c2440-uart", |
| 1499 | .owner = THIS_MODULE, |
| 1500 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1501 | }; |
| 1502 | |
| 1503 | |
| 1504 | static inline int s3c2440_serial_init(void) |
| 1505 | { |
| 1506 | return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf); |
| 1507 | } |
| 1508 | |
| 1509 | static inline void s3c2440_serial_exit(void) |
| 1510 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1511 | platform_driver_unregister(&s3c2440_serial_drv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1512 | } |
| 1513 | |
| 1514 | #define s3c2440_uart_inf_at &s3c2440_uart_inf |
| 1515 | #else |
| 1516 | |
| 1517 | static inline int s3c2440_serial_init(void) |
| 1518 | { |
| 1519 | return 0; |
| 1520 | } |
| 1521 | |
| 1522 | static inline void s3c2440_serial_exit(void) |
| 1523 | { |
| 1524 | } |
| 1525 | |
| 1526 | #define s3c2440_uart_inf_at NULL |
| 1527 | #endif /* CONFIG_CPU_S3C2440 */ |
| 1528 | |
| 1529 | /* module initialisation code */ |
| 1530 | |
| 1531 | static int __init s3c24xx_serial_modinit(void) |
| 1532 | { |
| 1533 | int ret; |
| 1534 | |
| 1535 | ret = uart_register_driver(&s3c24xx_uart_drv); |
| 1536 | if (ret < 0) { |
| 1537 | printk(KERN_ERR "failed to register UART driver\n"); |
| 1538 | return -1; |
| 1539 | } |
| 1540 | |
| 1541 | s3c2400_serial_init(); |
| 1542 | s3c2410_serial_init(); |
| 1543 | s3c2440_serial_init(); |
| 1544 | |
| 1545 | return 0; |
| 1546 | } |
| 1547 | |
| 1548 | static void __exit s3c24xx_serial_modexit(void) |
| 1549 | { |
| 1550 | s3c2400_serial_exit(); |
| 1551 | s3c2410_serial_exit(); |
| 1552 | s3c2440_serial_exit(); |
| 1553 | |
| 1554 | uart_unregister_driver(&s3c24xx_uart_drv); |
| 1555 | } |
| 1556 | |
| 1557 | |
| 1558 | module_init(s3c24xx_serial_modinit); |
| 1559 | module_exit(s3c24xx_serial_modexit); |
| 1560 | |
| 1561 | /* Console code */ |
| 1562 | |
| 1563 | #ifdef CONFIG_SERIAL_S3C2410_CONSOLE |
| 1564 | |
| 1565 | static struct uart_port *cons_uart; |
| 1566 | |
| 1567 | static int |
| 1568 | s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon) |
| 1569 | { |
| 1570 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); |
| 1571 | unsigned long ufstat, utrstat; |
| 1572 | |
| 1573 | if (ufcon & S3C2410_UFCON_FIFOMODE) { |
| 1574 | /* fifo mode - check ammount of data in fifo registers... */ |
| 1575 | |
| 1576 | ufstat = rd_regl(port, S3C2410_UFSTAT); |
| 1577 | return (ufstat & info->tx_fifofull) ? 0 : 1; |
| 1578 | } |
| 1579 | |
| 1580 | /* in non-fifo mode, we go and use the tx buffer empty */ |
| 1581 | |
| 1582 | utrstat = rd_regl(port, S3C2410_UTRSTAT); |
| 1583 | return (utrstat & S3C2410_UTRSTAT_TXE) ? 1 : 0; |
| 1584 | } |
| 1585 | |
| 1586 | static void |
| 1587 | s3c24xx_serial_console_write(struct console *co, const char *s, |
| 1588 | unsigned int count) |
| 1589 | { |
| 1590 | int i; |
| 1591 | unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); |
| 1592 | |
| 1593 | for (i = 0; i < count; i++) { |
| 1594 | while (!s3c24xx_serial_console_txrdy(cons_uart, ufcon)) |
| 1595 | barrier(); |
| 1596 | |
| 1597 | wr_regb(cons_uart, S3C2410_UTXH, s[i]); |
| 1598 | |
| 1599 | if (s[i] == '\n') { |
| 1600 | while (!s3c24xx_serial_console_txrdy(cons_uart, ufcon)) |
| 1601 | barrier(); |
| 1602 | |
| 1603 | wr_regb(cons_uart, S3C2410_UTXH, '\r'); |
| 1604 | } |
| 1605 | } |
| 1606 | } |
| 1607 | |
| 1608 | static void __init |
| 1609 | s3c24xx_serial_get_options(struct uart_port *port, int *baud, |
| 1610 | int *parity, int *bits) |
| 1611 | { |
| 1612 | struct s3c24xx_uart_clksrc clksrc; |
| 1613 | struct clk *clk; |
| 1614 | unsigned int ulcon; |
| 1615 | unsigned int ucon; |
| 1616 | unsigned int ubrdiv; |
| 1617 | unsigned long rate; |
| 1618 | |
| 1619 | ulcon = rd_regl(port, S3C2410_ULCON); |
| 1620 | ucon = rd_regl(port, S3C2410_UCON); |
| 1621 | ubrdiv = rd_regl(port, S3C2410_UBRDIV); |
| 1622 | |
| 1623 | dbg("s3c24xx_serial_get_options: port=%p\n" |
| 1624 | "registers: ulcon=%08x, ucon=%08x, ubdriv=%08x\n", |
| 1625 | port, ulcon, ucon, ubrdiv); |
| 1626 | |
| 1627 | if ((ucon & 0xf) != 0) { |
| 1628 | /* consider the serial port configured if the tx/rx mode set */ |
| 1629 | |
| 1630 | switch (ulcon & S3C2410_LCON_CSMASK) { |
| 1631 | case S3C2410_LCON_CS5: |
| 1632 | *bits = 5; |
| 1633 | break; |
| 1634 | case S3C2410_LCON_CS6: |
| 1635 | *bits = 6; |
| 1636 | break; |
| 1637 | case S3C2410_LCON_CS7: |
| 1638 | *bits = 7; |
| 1639 | break; |
| 1640 | default: |
| 1641 | case S3C2410_LCON_CS8: |
| 1642 | *bits = 8; |
| 1643 | break; |
| 1644 | } |
| 1645 | |
| 1646 | switch (ulcon & S3C2410_LCON_PMASK) { |
| 1647 | case S3C2410_LCON_PEVEN: |
| 1648 | *parity = 'e'; |
| 1649 | break; |
| 1650 | |
| 1651 | case S3C2410_LCON_PODD: |
| 1652 | *parity = 'o'; |
| 1653 | break; |
| 1654 | |
| 1655 | case S3C2410_LCON_PNONE: |
| 1656 | default: |
| 1657 | *parity = 'n'; |
| 1658 | } |
| 1659 | |
| 1660 | /* now calculate the baud rate */ |
| 1661 | |
| 1662 | s3c24xx_serial_getsource(port, &clksrc); |
| 1663 | |
| 1664 | clk = clk_get(port->dev, clksrc.name); |
| 1665 | if (!IS_ERR(clk) && clk != NULL) |
| 1666 | rate = clk_get_rate(clk) / clksrc.divisor; |
| 1667 | else |
| 1668 | rate = 1; |
| 1669 | |
| 1670 | |
| 1671 | *baud = rate / ( 16 * (ubrdiv + 1)); |
| 1672 | dbg("calculated baud %d\n", *baud); |
| 1673 | } |
| 1674 | |
| 1675 | } |
| 1676 | |
| 1677 | /* s3c24xx_serial_init_ports |
| 1678 | * |
| 1679 | * initialise the serial ports from the machine provided initialisation |
| 1680 | * data. |
| 1681 | */ |
| 1682 | |
| 1683 | static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) |
| 1684 | { |
| 1685 | struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; |
| 1686 | struct platform_device **platdev_ptr; |
| 1687 | int i; |
| 1688 | |
| 1689 | dbg("s3c24xx_serial_init_ports: initialising ports...\n"); |
| 1690 | |
| 1691 | platdev_ptr = s3c24xx_uart_devs; |
| 1692 | |
| 1693 | for (i = 0; i < NR_PORTS; i++, ptr++, platdev_ptr++) { |
| 1694 | s3c24xx_serial_init_port(ptr, info, *platdev_ptr); |
| 1695 | } |
| 1696 | |
| 1697 | return 0; |
| 1698 | } |
| 1699 | |
| 1700 | static int __init |
| 1701 | s3c24xx_serial_console_setup(struct console *co, char *options) |
| 1702 | { |
| 1703 | struct uart_port *port; |
| 1704 | int baud = 9600; |
| 1705 | int bits = 8; |
| 1706 | int parity = 'n'; |
| 1707 | int flow = 'n'; |
| 1708 | |
| 1709 | dbg("s3c24xx_serial_console_setup: co=%p (%d), %s\n", |
| 1710 | co, co->index, options); |
| 1711 | |
| 1712 | /* is this a valid port */ |
| 1713 | |
| 1714 | if (co->index == -1 || co->index >= NR_PORTS) |
| 1715 | co->index = 0; |
| 1716 | |
| 1717 | port = &s3c24xx_serial_ports[co->index].port; |
| 1718 | |
| 1719 | /* is the port configured? */ |
| 1720 | |
| 1721 | if (port->mapbase == 0x0) { |
| 1722 | co->index = 0; |
| 1723 | port = &s3c24xx_serial_ports[co->index].port; |
| 1724 | } |
| 1725 | |
| 1726 | cons_uart = port; |
| 1727 | |
| 1728 | dbg("s3c24xx_serial_console_setup: port=%p (%d)\n", port, co->index); |
| 1729 | |
| 1730 | /* |
| 1731 | * Check whether an invalid uart number has been specified, and |
| 1732 | * if so, search for the first available port that does have |
| 1733 | * console support. |
| 1734 | */ |
| 1735 | if (options) |
| 1736 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 1737 | else |
| 1738 | s3c24xx_serial_get_options(port, &baud, &parity, &bits); |
| 1739 | |
| 1740 | dbg("s3c24xx_serial_console_setup: baud %d\n", baud); |
| 1741 | |
| 1742 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 1743 | } |
| 1744 | |
| 1745 | /* s3c24xx_serial_initconsole |
| 1746 | * |
| 1747 | * initialise the console from one of the uart drivers |
| 1748 | */ |
| 1749 | |
| 1750 | static struct console s3c24xx_serial_console = |
| 1751 | { |
| 1752 | .name = S3C24XX_SERIAL_NAME, |
| 1753 | .device = uart_console_device, |
| 1754 | .flags = CON_PRINTBUFFER, |
| 1755 | .index = -1, |
| 1756 | .write = s3c24xx_serial_console_write, |
| 1757 | .setup = s3c24xx_serial_console_setup |
| 1758 | }; |
| 1759 | |
| 1760 | static int s3c24xx_serial_initconsole(void) |
| 1761 | { |
| 1762 | struct s3c24xx_uart_info *info; |
| 1763 | struct platform_device *dev = s3c24xx_uart_devs[0]; |
| 1764 | |
| 1765 | dbg("s3c24xx_serial_initconsole\n"); |
| 1766 | |
| 1767 | /* select driver based on the cpu */ |
| 1768 | |
| 1769 | if (dev == NULL) { |
| 1770 | printk(KERN_ERR "s3c24xx: no devices for console init\n"); |
| 1771 | return 0; |
| 1772 | } |
| 1773 | |
| 1774 | if (strcmp(dev->name, "s3c2400-uart") == 0) { |
| 1775 | info = s3c2400_uart_inf_at; |
| 1776 | } else if (strcmp(dev->name, "s3c2410-uart") == 0) { |
| 1777 | info = s3c2410_uart_inf_at; |
| 1778 | } else if (strcmp(dev->name, "s3c2440-uart") == 0) { |
| 1779 | info = s3c2440_uart_inf_at; |
| 1780 | } else { |
| 1781 | printk(KERN_ERR "s3c24xx: no driver for %s\n", dev->name); |
| 1782 | return 0; |
| 1783 | } |
| 1784 | |
| 1785 | if (info == NULL) { |
| 1786 | printk(KERN_ERR "s3c24xx: no driver for console\n"); |
| 1787 | return 0; |
| 1788 | } |
| 1789 | |
| 1790 | s3c24xx_serial_console.data = &s3c24xx_uart_drv; |
| 1791 | s3c24xx_serial_init_ports(info); |
| 1792 | |
| 1793 | register_console(&s3c24xx_serial_console); |
| 1794 | return 0; |
| 1795 | } |
| 1796 | |
| 1797 | console_initcall(s3c24xx_serial_initconsole); |
| 1798 | |
| 1799 | #endif /* CONFIG_SERIAL_S3C2410_CONSOLE */ |
| 1800 | |
| 1801 | MODULE_LICENSE("GPL"); |
| 1802 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
| 1803 | MODULE_DESCRIPTION("Samsung S3C2410/S3C2440 Serial port driver"); |