Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC |
| 3 | * |
| 4 | * PowerPC version |
| 5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 6 | * Copyright (C) 2001 IBM |
| 7 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 8 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) |
| 9 | * |
| 10 | * Derived from "arch/i386/kernel/signal.c" |
| 11 | * Copyright (C) 1991, 1992 Linus Torvalds |
| 12 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License |
| 16 | * as published by the Free Software Foundation; either version |
| 17 | * 2 of the License, or (at your option) any later version. |
| 18 | */ |
| 19 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 20 | #include <linux/sched.h> |
| 21 | #include <linux/mm.h> |
| 22 | #include <linux/smp.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 23 | #include <linux/kernel.h> |
| 24 | #include <linux/signal.h> |
| 25 | #include <linux/errno.h> |
| 26 | #include <linux/elf.h> |
Lucas Woods | 05ead01 | 2007-12-13 15:56:06 -0800 | [diff] [blame] | 27 | #include <linux/ptrace.h> |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 28 | #include <linux/ratelimit.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 29 | #ifdef CONFIG_PPC64 |
| 30 | #include <linux/syscalls.h> |
| 31 | #include <linux/compat.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 32 | #else |
| 33 | #include <linux/wait.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 34 | #include <linux/unistd.h> |
| 35 | #include <linux/stddef.h> |
| 36 | #include <linux/tty.h> |
| 37 | #include <linux/binfmts.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 38 | #endif |
| 39 | |
| 40 | #include <asm/uaccess.h> |
| 41 | #include <asm/cacheflush.h> |
Arnd Bergmann | a7f3184 | 2006-03-23 00:00:08 +0100 | [diff] [blame] | 42 | #include <asm/syscalls.h> |
David Gibson | c5ff700 | 2005-11-09 11:21:07 +1100 | [diff] [blame] | 43 | #include <asm/sigcontext.h> |
Benjamin Herrenschmidt | a7f290d | 2005-11-11 21:15:21 +1100 | [diff] [blame] | 44 | #include <asm/vdso.h> |
David Howells | ae3a197 | 2012-03-28 18:30:02 +0100 | [diff] [blame] | 45 | #include <asm/switch_to.h> |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 46 | #include <asm/tm.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 47 | #ifdef CONFIG_PPC64 |
Stephen Rothwell | 879168e | 2005-11-03 15:32:07 +1100 | [diff] [blame] | 48 | #include "ppc32.h" |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 49 | #include <asm/unistd.h> |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 50 | #else |
| 51 | #include <asm/ucontext.h> |
| 52 | #include <asm/pgtable.h> |
| 53 | #endif |
| 54 | |
Benjamin Herrenschmidt | 22e38f2 | 2007-06-04 15:15:49 +1000 | [diff] [blame] | 55 | #include "signal.h" |
| 56 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 57 | #undef DEBUG_SIG |
| 58 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 59 | #ifdef CONFIG_PPC64 |
Stephen Rothwell | b09a491 | 2005-10-18 14:51:57 +1000 | [diff] [blame] | 60 | #define sys_rt_sigreturn compat_sys_rt_sigreturn |
Stephen Rothwell | b09a491 | 2005-10-18 14:51:57 +1000 | [diff] [blame] | 61 | #define sys_swapcontext compat_sys_swapcontext |
| 62 | #define sys_sigreturn compat_sys_sigreturn |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 63 | |
| 64 | #define old_sigaction old_sigaction32 |
| 65 | #define sigcontext sigcontext32 |
| 66 | #define mcontext mcontext32 |
| 67 | #define ucontext ucontext32 |
| 68 | |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 69 | #define __save_altstack __compat_save_altstack |
| 70 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 71 | /* |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 72 | * Userspace code may pass a ucontext which doesn't include VSX added |
| 73 | * at the end. We need to check for this case. |
| 74 | */ |
| 75 | #define UCONTEXTSIZEWITHOUTVSX \ |
| 76 | (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32)) |
| 77 | |
| 78 | /* |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 79 | * Returning 0 means we return to userspace via |
| 80 | * ret_from_except and thus restore all user |
| 81 | * registers from *regs. This is what we need |
| 82 | * to do when a signal has been delivered. |
| 83 | */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 84 | |
| 85 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32)) |
| 86 | #undef __SIGNAL_FRAMESIZE |
| 87 | #define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32 |
| 88 | #undef ELF_NVRREG |
| 89 | #define ELF_NVRREG ELF_NVRREG32 |
| 90 | |
| 91 | /* |
| 92 | * Functions for flipping sigsets (thanks to brain dead generic |
| 93 | * implementation that makes things simple for little endian only) |
| 94 | */ |
| 95 | static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set) |
| 96 | { |
| 97 | compat_sigset_t cset; |
| 98 | |
| 99 | switch (_NSIG_WORDS) { |
Will Deacon | a313f4c | 2011-11-08 04:51:19 +0000 | [diff] [blame] | 100 | case 4: cset.sig[6] = set->sig[3] & 0xffffffffull; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 101 | cset.sig[7] = set->sig[3] >> 32; |
| 102 | case 3: cset.sig[4] = set->sig[2] & 0xffffffffull; |
| 103 | cset.sig[5] = set->sig[2] >> 32; |
| 104 | case 2: cset.sig[2] = set->sig[1] & 0xffffffffull; |
| 105 | cset.sig[3] = set->sig[1] >> 32; |
| 106 | case 1: cset.sig[0] = set->sig[0] & 0xffffffffull; |
| 107 | cset.sig[1] = set->sig[0] >> 32; |
| 108 | } |
| 109 | return copy_to_user(uset, &cset, sizeof(*uset)); |
| 110 | } |
| 111 | |
Paul Mackerras | 9b7cf8b | 2005-10-19 23:13:04 +1000 | [diff] [blame] | 112 | static inline int get_sigset_t(sigset_t *set, |
| 113 | const compat_sigset_t __user *uset) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 114 | { |
| 115 | compat_sigset_t s32; |
| 116 | |
| 117 | if (copy_from_user(&s32, uset, sizeof(*uset))) |
| 118 | return -EFAULT; |
| 119 | |
| 120 | /* |
| 121 | * Swap the 2 words of the 64-bit sigset_t (they are stored |
| 122 | * in the "wrong" endian in 32-bit user storage). |
| 123 | */ |
| 124 | switch (_NSIG_WORDS) { |
| 125 | case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32); |
| 126 | case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32); |
| 127 | case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32); |
| 128 | case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32); |
| 129 | } |
| 130 | return 0; |
| 131 | } |
| 132 | |
Al Viro | 29e646d | 2006-02-01 05:28:09 -0500 | [diff] [blame] | 133 | #define to_user_ptr(p) ptr_to_compat(p) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 134 | #define from_user_ptr(p) compat_ptr(p) |
| 135 | |
| 136 | static inline int save_general_regs(struct pt_regs *regs, |
| 137 | struct mcontext __user *frame) |
| 138 | { |
| 139 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; |
| 140 | int i; |
| 141 | |
Paul Mackerras | 1bd7933 | 2006-03-08 13:24:22 +1100 | [diff] [blame] | 142 | WARN_ON(!FULL_REGS(regs)); |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 143 | |
| 144 | for (i = 0; i <= PT_RESULT; i ++) { |
| 145 | if (i == 14 && !FULL_REGS(regs)) |
| 146 | i = 32; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 147 | if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i])) |
| 148 | return -EFAULT; |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 149 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 150 | return 0; |
| 151 | } |
| 152 | |
| 153 | static inline int restore_general_regs(struct pt_regs *regs, |
| 154 | struct mcontext __user *sr) |
| 155 | { |
| 156 | elf_greg_t64 *gregs = (elf_greg_t64 *)regs; |
| 157 | int i; |
| 158 | |
| 159 | for (i = 0; i <= PT_RESULT; i++) { |
| 160 | if ((i == PT_MSR) || (i == PT_SOFTE)) |
| 161 | continue; |
| 162 | if (__get_user(gregs[i], &sr->mc_gregs[i])) |
| 163 | return -EFAULT; |
| 164 | } |
| 165 | return 0; |
| 166 | } |
| 167 | |
| 168 | #else /* CONFIG_PPC64 */ |
| 169 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 170 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) |
| 171 | |
| 172 | static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set) |
| 173 | { |
| 174 | return copy_to_user(uset, set, sizeof(*uset)); |
| 175 | } |
| 176 | |
Paul Mackerras | 9b7cf8b | 2005-10-19 23:13:04 +1000 | [diff] [blame] | 177 | static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 178 | { |
| 179 | return copy_from_user(set, uset, sizeof(*uset)); |
| 180 | } |
| 181 | |
Al Viro | 29e646d | 2006-02-01 05:28:09 -0500 | [diff] [blame] | 182 | #define to_user_ptr(p) ((unsigned long)(p)) |
| 183 | #define from_user_ptr(p) ((void __user *)(p)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 184 | |
| 185 | static inline int save_general_regs(struct pt_regs *regs, |
| 186 | struct mcontext __user *frame) |
| 187 | { |
Paul Mackerras | 1bd7933 | 2006-03-08 13:24:22 +1100 | [diff] [blame] | 188 | WARN_ON(!FULL_REGS(regs)); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 189 | return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE); |
| 190 | } |
| 191 | |
| 192 | static inline int restore_general_regs(struct pt_regs *regs, |
| 193 | struct mcontext __user *sr) |
| 194 | { |
| 195 | /* copy up to but not including MSR */ |
| 196 | if (__copy_from_user(regs, &sr->mc_gregs, |
| 197 | PT_MSR * sizeof(elf_greg_t))) |
| 198 | return -EFAULT; |
| 199 | /* copy from orig_r3 (the word after the MSR) up to the end */ |
| 200 | if (__copy_from_user(®s->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3], |
| 201 | GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t))) |
| 202 | return -EFAULT; |
| 203 | return 0; |
| 204 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 205 | #endif |
| 206 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 207 | /* |
| 208 | * When we have signals to deliver, we set up on the |
| 209 | * user stack, going down from the original stack pointer: |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 210 | * an ABI gap of 56 words |
| 211 | * an mcontext struct |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 212 | * a sigcontext struct |
| 213 | * a gap of __SIGNAL_FRAMESIZE bytes |
| 214 | * |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 215 | * Each of these things must be a multiple of 16 bytes in size. The following |
| 216 | * structure represent all of this except the __SIGNAL_FRAMESIZE gap |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 217 | * |
| 218 | */ |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 219 | struct sigframe { |
| 220 | struct sigcontext sctx; /* the sigcontext */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 221 | struct mcontext mctx; /* all the register values */ |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 222 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 223 | struct sigcontext sctx_transact; |
| 224 | struct mcontext mctx_transact; |
| 225 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 226 | /* |
| 227 | * Programs using the rs6000/xcoff abi can save up to 19 gp |
| 228 | * regs and 18 fp regs below sp before decrementing it. |
| 229 | */ |
| 230 | int abigap[56]; |
| 231 | }; |
| 232 | |
| 233 | /* We use the mc_pad field for the signal return trampoline. */ |
| 234 | #define tramp mc_pad |
| 235 | |
| 236 | /* |
| 237 | * When we have rt signals to deliver, we set up on the |
| 238 | * user stack, going down from the original stack pointer: |
| 239 | * one rt_sigframe struct (siginfo + ucontext + ABI gap) |
| 240 | * a gap of __SIGNAL_FRAMESIZE+16 bytes |
| 241 | * (the +16 is to get the siginfo and ucontext in the same |
| 242 | * positions as in older kernels). |
| 243 | * |
| 244 | * Each of these things must be a multiple of 16 bytes in size. |
| 245 | * |
| 246 | */ |
| 247 | struct rt_sigframe { |
| 248 | #ifdef CONFIG_PPC64 |
| 249 | compat_siginfo_t info; |
| 250 | #else |
| 251 | struct siginfo info; |
| 252 | #endif |
| 253 | struct ucontext uc; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 254 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 255 | struct ucontext uc_transact; |
| 256 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 257 | /* |
| 258 | * Programs using the rs6000/xcoff abi can save up to 19 gp |
| 259 | * regs and 18 fp regs below sp before decrementing it. |
| 260 | */ |
| 261 | int abigap[56]; |
| 262 | }; |
| 263 | |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 264 | #ifdef CONFIG_VSX |
| 265 | unsigned long copy_fpr_to_user(void __user *to, |
| 266 | struct task_struct *task) |
| 267 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 268 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 269 | int i; |
| 270 | |
| 271 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 272 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
| 273 | buf[i] = task->thread.TS_FPR(i); |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 274 | buf[i] = task->thread.fp_state.fpscr; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 275 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
| 276 | } |
| 277 | |
| 278 | unsigned long copy_fpr_from_user(struct task_struct *task, |
| 279 | void __user *from) |
| 280 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 281 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 282 | int i; |
| 283 | |
| 284 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) |
| 285 | return 1; |
| 286 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
| 287 | task->thread.TS_FPR(i) = buf[i]; |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 288 | task->thread.fp_state.fpscr = buf[i]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 289 | |
| 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | unsigned long copy_vsx_to_user(void __user *to, |
| 294 | struct task_struct *task) |
| 295 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 296 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 297 | int i; |
| 298 | |
| 299 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 300 | for (i = 0; i < ELF_NVSRHALFREG; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 301 | buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 302 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
| 303 | } |
| 304 | |
| 305 | unsigned long copy_vsx_from_user(struct task_struct *task, |
| 306 | void __user *from) |
| 307 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 308 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 309 | int i; |
| 310 | |
| 311 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) |
| 312 | return 1; |
| 313 | for (i = 0; i < ELF_NVSRHALFREG ; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 314 | task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 315 | return 0; |
| 316 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 317 | |
| 318 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 319 | unsigned long copy_transact_fpr_to_user(void __user *to, |
| 320 | struct task_struct *task) |
| 321 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 322 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 323 | int i; |
| 324 | |
| 325 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 326 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
| 327 | buf[i] = task->thread.TS_TRANS_FPR(i); |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 328 | buf[i] = task->thread.transact_fp.fpscr; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 329 | return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); |
| 330 | } |
| 331 | |
| 332 | unsigned long copy_transact_fpr_from_user(struct task_struct *task, |
| 333 | void __user *from) |
| 334 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 335 | u64 buf[ELF_NFPREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 336 | int i; |
| 337 | |
| 338 | if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) |
| 339 | return 1; |
| 340 | for (i = 0; i < (ELF_NFPREG - 1) ; i++) |
| 341 | task->thread.TS_TRANS_FPR(i) = buf[i]; |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 342 | task->thread.transact_fp.fpscr = buf[i]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 343 | |
| 344 | return 0; |
| 345 | } |
| 346 | |
| 347 | unsigned long copy_transact_vsx_to_user(void __user *to, |
| 348 | struct task_struct *task) |
| 349 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 350 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 351 | int i; |
| 352 | |
| 353 | /* save FPR copy to local buffer then write to the thread_struct */ |
| 354 | for (i = 0; i < ELF_NVSRHALFREG; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 355 | buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 356 | return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); |
| 357 | } |
| 358 | |
| 359 | unsigned long copy_transact_vsx_from_user(struct task_struct *task, |
| 360 | void __user *from) |
| 361 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 362 | u64 buf[ELF_NVSRHALFREG]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 363 | int i; |
| 364 | |
| 365 | if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) |
| 366 | return 1; |
| 367 | for (i = 0; i < ELF_NVSRHALFREG ; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 368 | task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i]; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 369 | return 0; |
| 370 | } |
| 371 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 372 | #else |
| 373 | inline unsigned long copy_fpr_to_user(void __user *to, |
| 374 | struct task_struct *task) |
| 375 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 376 | return __copy_to_user(to, task->thread.fp_state.fpr, |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 377 | ELF_NFPREG * sizeof(double)); |
| 378 | } |
| 379 | |
| 380 | inline unsigned long copy_fpr_from_user(struct task_struct *task, |
| 381 | void __user *from) |
| 382 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 383 | return __copy_from_user(task->thread.fp_state.fpr, from, |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 384 | ELF_NFPREG * sizeof(double)); |
| 385 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 386 | |
| 387 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 388 | inline unsigned long copy_transact_fpr_to_user(void __user *to, |
| 389 | struct task_struct *task) |
| 390 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 391 | return __copy_to_user(to, task->thread.transact_fp.fpr, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 392 | ELF_NFPREG * sizeof(double)); |
| 393 | } |
| 394 | |
| 395 | inline unsigned long copy_transact_fpr_from_user(struct task_struct *task, |
| 396 | void __user *from) |
| 397 | { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 398 | return __copy_from_user(task->thread.transact_fp.fpr, from, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 399 | ELF_NFPREG * sizeof(double)); |
| 400 | } |
| 401 | #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 402 | #endif |
| 403 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 404 | /* |
| 405 | * Save the current user registers on the user stack. |
| 406 | * We only save the altivec/spe registers if the process has used |
| 407 | * altivec/spe instructions at some point. |
| 408 | */ |
| 409 | static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 410 | struct mcontext __user *tm_frame, int sigret, |
| 411 | int ctx_has_vsx_region) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 412 | { |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 413 | unsigned long msr = regs->msr; |
| 414 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 415 | /* Make sure floating point registers are stored in regs */ |
| 416 | flush_fp_to_thread(current); |
| 417 | |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 418 | /* save general registers */ |
| 419 | if (save_general_regs(regs, frame)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 420 | return 1; |
| 421 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 422 | #ifdef CONFIG_ALTIVEC |
| 423 | /* save altivec registers */ |
| 424 | if (current->thread.used_vr) { |
| 425 | flush_altivec_to_thread(current); |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 426 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 427 | ELF_NVRREG * sizeof(vector128))) |
| 428 | return 1; |
| 429 | /* set MSR_VEC in the saved MSR value to indicate that |
| 430 | frame->mc_vregs contains valid data */ |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 431 | msr |= MSR_VEC; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 432 | } |
| 433 | /* else assert((regs->msr & MSR_VEC) == 0) */ |
| 434 | |
| 435 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 436 | * use altivec. Since VSCR only contains 32 bits saved in the least |
| 437 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the |
| 438 | * most significant bits of that same vector. --BenH |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 439 | * Note that the current VRSAVE value is in the SPR at this point. |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 440 | */ |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 441 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 442 | current->thread.vrsave = mfspr(SPRN_VRSAVE); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 443 | if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) |
| 444 | return 1; |
| 445 | #endif /* CONFIG_ALTIVEC */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 446 | if (copy_fpr_to_user(&frame->mc_fregs, current)) |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 447 | return 1; |
Michael Neuling | ec67ad8 | 2013-11-25 11:12:20 +1100 | [diff] [blame] | 448 | |
| 449 | /* |
| 450 | * Clear the MSR VSX bit to indicate there is no valid state attached |
| 451 | * to this context, except in the specific case below where we set it. |
| 452 | */ |
| 453 | msr &= ~MSR_VSX; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 454 | #ifdef CONFIG_VSX |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 455 | /* |
| 456 | * Copy VSR 0-31 upper half from thread_struct to local |
| 457 | * buffer, then write that to userspace. Also set MSR_VSX in |
| 458 | * the saved MSR value to indicate that frame->mc_vregs |
| 459 | * contains valid data |
| 460 | */ |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 461 | if (current->thread.used_vsr && ctx_has_vsx_region) { |
Michael Neuling | 7c29217 | 2008-07-11 16:29:12 +1000 | [diff] [blame] | 462 | __giveup_vsx(current); |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 463 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 464 | return 1; |
| 465 | msr |= MSR_VSX; |
Michael Neuling | ec67ad8 | 2013-11-25 11:12:20 +1100 | [diff] [blame] | 466 | } |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 467 | #endif /* CONFIG_VSX */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 468 | #ifdef CONFIG_SPE |
| 469 | /* save spe registers */ |
| 470 | if (current->thread.used_spe) { |
| 471 | flush_spe_to_thread(current); |
| 472 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, |
| 473 | ELF_NEVRREG * sizeof(u32))) |
| 474 | return 1; |
| 475 | /* set MSR_SPE in the saved MSR value to indicate that |
| 476 | frame->mc_vregs contains valid data */ |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 477 | msr |= MSR_SPE; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 478 | } |
| 479 | /* else assert((regs->msr & MSR_SPE) == 0) */ |
| 480 | |
| 481 | /* We always copy to/from spefscr */ |
| 482 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) |
| 483 | return 1; |
| 484 | #endif /* CONFIG_SPE */ |
| 485 | |
Michael Neuling | 9e75118 | 2008-06-25 14:07:17 +1000 | [diff] [blame] | 486 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) |
| 487 | return 1; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 488 | /* We need to write 0 the MSR top 32 bits in the tm frame so that we |
| 489 | * can check it on the restore to see if TM is active |
| 490 | */ |
| 491 | if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR])) |
| 492 | return 1; |
| 493 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 494 | if (sigret) { |
| 495 | /* Set up the sigreturn trampoline: li r0,sigret; sc */ |
| 496 | if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) |
| 497 | || __put_user(0x44000002UL, &frame->tramp[1])) |
| 498 | return 1; |
| 499 | flush_icache_range((unsigned long) &frame->tramp[0], |
| 500 | (unsigned long) &frame->tramp[2]); |
| 501 | } |
| 502 | |
| 503 | return 0; |
| 504 | } |
| 505 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 506 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 507 | /* |
| 508 | * Save the current user registers on the user stack. |
| 509 | * We only save the altivec/spe registers if the process has used |
| 510 | * altivec/spe instructions at some point. |
| 511 | * We also save the transactional registers to a second ucontext in the |
| 512 | * frame. |
| 513 | * |
| 514 | * See save_user_regs() and signal_64.c:setup_tm_sigcontexts(). |
| 515 | */ |
| 516 | static int save_tm_user_regs(struct pt_regs *regs, |
| 517 | struct mcontext __user *frame, |
| 518 | struct mcontext __user *tm_frame, int sigret) |
| 519 | { |
| 520 | unsigned long msr = regs->msr; |
| 521 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 522 | /* Make sure floating point registers are stored in regs */ |
| 523 | flush_fp_to_thread(current); |
| 524 | |
| 525 | /* Save both sets of general registers */ |
| 526 | if (save_general_regs(¤t->thread.ckpt_regs, frame) |
| 527 | || save_general_regs(regs, tm_frame)) |
| 528 | return 1; |
| 529 | |
| 530 | /* Stash the top half of the 64bit MSR into the 32bit MSR word |
| 531 | * of the transactional mcontext. This way we have a backward-compatible |
| 532 | * MSR in the 'normal' (checkpointed) mcontext and additionally one can |
| 533 | * also look at what type of transaction (T or S) was active at the |
| 534 | * time of the signal. |
| 535 | */ |
| 536 | if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR])) |
| 537 | return 1; |
| 538 | |
| 539 | #ifdef CONFIG_ALTIVEC |
| 540 | /* save altivec registers */ |
| 541 | if (current->thread.used_vr) { |
| 542 | flush_altivec_to_thread(current); |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 543 | if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 544 | ELF_NVRREG * sizeof(vector128))) |
| 545 | return 1; |
| 546 | if (msr & MSR_VEC) { |
| 547 | if (__copy_to_user(&tm_frame->mc_vregs, |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 548 | ¤t->thread.transact_vr, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 549 | ELF_NVRREG * sizeof(vector128))) |
| 550 | return 1; |
| 551 | } else { |
| 552 | if (__copy_to_user(&tm_frame->mc_vregs, |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 553 | ¤t->thread.vr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 554 | ELF_NVRREG * sizeof(vector128))) |
| 555 | return 1; |
| 556 | } |
| 557 | |
| 558 | /* set MSR_VEC in the saved MSR value to indicate that |
| 559 | * frame->mc_vregs contains valid data |
| 560 | */ |
| 561 | msr |= MSR_VEC; |
| 562 | } |
| 563 | |
| 564 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 565 | * use altivec. Since VSCR only contains 32 bits saved in the least |
| 566 | * significant bits of a vector, we "cheat" and stuff VRSAVE in the |
| 567 | * most significant bits of that same vector. --BenH |
| 568 | */ |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 569 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 570 | current->thread.vrsave = mfspr(SPRN_VRSAVE); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 571 | if (__put_user(current->thread.vrsave, |
| 572 | (u32 __user *)&frame->mc_vregs[32])) |
| 573 | return 1; |
| 574 | if (msr & MSR_VEC) { |
| 575 | if (__put_user(current->thread.transact_vrsave, |
| 576 | (u32 __user *)&tm_frame->mc_vregs[32])) |
| 577 | return 1; |
| 578 | } else { |
| 579 | if (__put_user(current->thread.vrsave, |
| 580 | (u32 __user *)&tm_frame->mc_vregs[32])) |
| 581 | return 1; |
| 582 | } |
| 583 | #endif /* CONFIG_ALTIVEC */ |
| 584 | |
| 585 | if (copy_fpr_to_user(&frame->mc_fregs, current)) |
| 586 | return 1; |
| 587 | if (msr & MSR_FP) { |
| 588 | if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current)) |
| 589 | return 1; |
| 590 | } else { |
| 591 | if (copy_fpr_to_user(&tm_frame->mc_fregs, current)) |
| 592 | return 1; |
| 593 | } |
| 594 | |
| 595 | #ifdef CONFIG_VSX |
| 596 | /* |
| 597 | * Copy VSR 0-31 upper half from thread_struct to local |
| 598 | * buffer, then write that to userspace. Also set MSR_VSX in |
| 599 | * the saved MSR value to indicate that frame->mc_vregs |
| 600 | * contains valid data |
| 601 | */ |
| 602 | if (current->thread.used_vsr) { |
| 603 | __giveup_vsx(current); |
| 604 | if (copy_vsx_to_user(&frame->mc_vsregs, current)) |
| 605 | return 1; |
| 606 | if (msr & MSR_VSX) { |
| 607 | if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs, |
| 608 | current)) |
| 609 | return 1; |
| 610 | } else { |
| 611 | if (copy_vsx_to_user(&tm_frame->mc_vsregs, current)) |
| 612 | return 1; |
| 613 | } |
| 614 | |
| 615 | msr |= MSR_VSX; |
| 616 | } |
| 617 | #endif /* CONFIG_VSX */ |
| 618 | #ifdef CONFIG_SPE |
| 619 | /* SPE regs are not checkpointed with TM, so this section is |
| 620 | * simply the same as in save_user_regs(). |
| 621 | */ |
| 622 | if (current->thread.used_spe) { |
| 623 | flush_spe_to_thread(current); |
| 624 | if (__copy_to_user(&frame->mc_vregs, current->thread.evr, |
| 625 | ELF_NEVRREG * sizeof(u32))) |
| 626 | return 1; |
| 627 | /* set MSR_SPE in the saved MSR value to indicate that |
| 628 | * frame->mc_vregs contains valid data */ |
| 629 | msr |= MSR_SPE; |
| 630 | } |
| 631 | |
| 632 | /* We always copy to/from spefscr */ |
| 633 | if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG)) |
| 634 | return 1; |
| 635 | #endif /* CONFIG_SPE */ |
| 636 | |
| 637 | if (__put_user(msr, &frame->mc_gregs[PT_MSR])) |
| 638 | return 1; |
| 639 | if (sigret) { |
| 640 | /* Set up the sigreturn trampoline: li r0,sigret; sc */ |
| 641 | if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) |
| 642 | || __put_user(0x44000002UL, &frame->tramp[1])) |
| 643 | return 1; |
| 644 | flush_icache_range((unsigned long) &frame->tramp[0], |
| 645 | (unsigned long) &frame->tramp[2]); |
| 646 | } |
| 647 | |
| 648 | return 0; |
| 649 | } |
| 650 | #endif |
| 651 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 652 | /* |
| 653 | * Restore the current user register values from the user stack, |
| 654 | * (except for MSR). |
| 655 | */ |
| 656 | static long restore_user_regs(struct pt_regs *regs, |
| 657 | struct mcontext __user *sr, int sig) |
| 658 | { |
| 659 | long err; |
| 660 | unsigned int save_r2 = 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 661 | unsigned long msr; |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 662 | #ifdef CONFIG_VSX |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 663 | int i; |
| 664 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 665 | |
| 666 | /* |
| 667 | * restore general registers but not including MSR or SOFTE. Also |
| 668 | * take care of keeping r2 (TLS) intact if not a signal |
| 669 | */ |
| 670 | if (!sig) |
| 671 | save_r2 = (unsigned int)regs->gpr[2]; |
| 672 | err = restore_general_regs(regs, sr); |
Al Viro | 9a81c16 | 2010-09-20 21:48:57 +0100 | [diff] [blame] | 673 | regs->trap = 0; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 674 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 675 | if (!sig) |
| 676 | regs->gpr[2] = (unsigned long) save_r2; |
| 677 | if (err) |
| 678 | return 1; |
| 679 | |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 680 | /* if doing signal return, restore the previous little-endian mode */ |
| 681 | if (sig) |
| 682 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); |
| 683 | |
Paul Mackerras | 5388fb1 | 2006-01-11 22:11:39 +1100 | [diff] [blame] | 684 | /* |
| 685 | * Do this before updating the thread state in |
| 686 | * current->thread.fpr/vr/evr. That way, if we get preempted |
| 687 | * and another task grabs the FPU/Altivec/SPE, it won't be |
| 688 | * tempted to save the current CPU state into the thread_struct |
| 689 | * and corrupt what we are writing there. |
| 690 | */ |
| 691 | discard_lazy_cpu_state(); |
| 692 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 693 | #ifdef CONFIG_ALTIVEC |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 694 | /* |
| 695 | * Force the process to reload the altivec registers from |
| 696 | * current->thread when it next does altivec instructions |
| 697 | */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 698 | regs->msr &= ~MSR_VEC; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 699 | if (msr & MSR_VEC) { |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 700 | /* restore altivec registers from the stack */ |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 701 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 702 | sizeof(sr->mc_vregs))) |
| 703 | return 1; |
| 704 | } else if (current->thread.used_vr) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 705 | memset(¤t->thread.vr_state, 0, |
| 706 | ELF_NVRREG * sizeof(vector128)); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 707 | |
| 708 | /* Always get VRSAVE back */ |
| 709 | if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) |
| 710 | return 1; |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 711 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 712 | mtspr(SPRN_VRSAVE, current->thread.vrsave); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 713 | #endif /* CONFIG_ALTIVEC */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 714 | if (copy_fpr_from_user(current, &sr->mc_fregs)) |
| 715 | return 1; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 716 | |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 717 | #ifdef CONFIG_VSX |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 718 | /* |
| 719 | * Force the process to reload the VSX registers from |
| 720 | * current->thread when it next does VSX instruction. |
| 721 | */ |
| 722 | regs->msr &= ~MSR_VSX; |
| 723 | if (msr & MSR_VSX) { |
| 724 | /* |
| 725 | * Restore altivec registers from the stack to a local |
| 726 | * buffer, then write this out to the thread_struct |
| 727 | */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 728 | if (copy_vsx_from_user(current, &sr->mc_vsregs)) |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 729 | return 1; |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 730 | } else if (current->thread.used_vsr) |
| 731 | for (i = 0; i < 32 ; i++) |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 732 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 733 | #endif /* CONFIG_VSX */ |
| 734 | /* |
| 735 | * force the process to reload the FP registers from |
| 736 | * current->thread when it next does FP instructions |
| 737 | */ |
| 738 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); |
| 739 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 740 | #ifdef CONFIG_SPE |
| 741 | /* force the process to reload the spe registers from |
| 742 | current->thread when it next does spe instructions */ |
| 743 | regs->msr &= ~MSR_SPE; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 744 | if (msr & MSR_SPE) { |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 745 | /* restore spe registers from the stack */ |
| 746 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, |
| 747 | ELF_NEVRREG * sizeof(u32))) |
| 748 | return 1; |
| 749 | } else if (current->thread.used_spe) |
| 750 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); |
| 751 | |
| 752 | /* Always get SPEFSCR back */ |
| 753 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG)) |
| 754 | return 1; |
| 755 | #endif /* CONFIG_SPE */ |
| 756 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 757 | return 0; |
| 758 | } |
| 759 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 760 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 761 | /* |
| 762 | * Restore the current user register values from the user stack, except for |
| 763 | * MSR, and recheckpoint the original checkpointed register state for processes |
| 764 | * in transactions. |
| 765 | */ |
| 766 | static long restore_tm_user_regs(struct pt_regs *regs, |
| 767 | struct mcontext __user *sr, |
| 768 | struct mcontext __user *tm_sr) |
| 769 | { |
| 770 | long err; |
Michael Neuling | 2c27a18 | 2013-06-09 21:23:17 +1000 | [diff] [blame] | 771 | unsigned long msr, msr_hi; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 772 | #ifdef CONFIG_VSX |
| 773 | int i; |
| 774 | #endif |
| 775 | |
| 776 | /* |
| 777 | * restore general registers but not including MSR or SOFTE. Also |
| 778 | * take care of keeping r2 (TLS) intact if not a signal. |
| 779 | * See comment in signal_64.c:restore_tm_sigcontexts(); |
| 780 | * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR |
| 781 | * were set by the signal delivery. |
| 782 | */ |
| 783 | err = restore_general_regs(regs, tm_sr); |
| 784 | err |= restore_general_regs(¤t->thread.ckpt_regs, sr); |
| 785 | |
| 786 | err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]); |
| 787 | |
| 788 | err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); |
| 789 | if (err) |
| 790 | return 1; |
| 791 | |
| 792 | /* Restore the previous little-endian mode */ |
| 793 | regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); |
| 794 | |
| 795 | /* |
| 796 | * Do this before updating the thread state in |
| 797 | * current->thread.fpr/vr/evr. That way, if we get preempted |
| 798 | * and another task grabs the FPU/Altivec/SPE, it won't be |
| 799 | * tempted to save the current CPU state into the thread_struct |
| 800 | * and corrupt what we are writing there. |
| 801 | */ |
| 802 | discard_lazy_cpu_state(); |
| 803 | |
| 804 | #ifdef CONFIG_ALTIVEC |
| 805 | regs->msr &= ~MSR_VEC; |
| 806 | if (msr & MSR_VEC) { |
| 807 | /* restore altivec registers from the stack */ |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 808 | if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 809 | sizeof(sr->mc_vregs)) || |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 810 | __copy_from_user(¤t->thread.transact_vr, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 811 | &tm_sr->mc_vregs, |
| 812 | sizeof(sr->mc_vregs))) |
| 813 | return 1; |
| 814 | } else if (current->thread.used_vr) { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 815 | memset(¤t->thread.vr_state, 0, |
| 816 | ELF_NVRREG * sizeof(vector128)); |
| 817 | memset(¤t->thread.transact_vr, 0, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 818 | ELF_NVRREG * sizeof(vector128)); |
| 819 | } |
| 820 | |
| 821 | /* Always get VRSAVE back */ |
| 822 | if (__get_user(current->thread.vrsave, |
| 823 | (u32 __user *)&sr->mc_vregs[32]) || |
| 824 | __get_user(current->thread.transact_vrsave, |
| 825 | (u32 __user *)&tm_sr->mc_vregs[32])) |
| 826 | return 1; |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 827 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 828 | mtspr(SPRN_VRSAVE, current->thread.vrsave); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 829 | #endif /* CONFIG_ALTIVEC */ |
| 830 | |
| 831 | regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); |
| 832 | |
| 833 | if (copy_fpr_from_user(current, &sr->mc_fregs) || |
| 834 | copy_transact_fpr_from_user(current, &tm_sr->mc_fregs)) |
| 835 | return 1; |
| 836 | |
| 837 | #ifdef CONFIG_VSX |
| 838 | regs->msr &= ~MSR_VSX; |
| 839 | if (msr & MSR_VSX) { |
| 840 | /* |
| 841 | * Restore altivec registers from the stack to a local |
| 842 | * buffer, then write this out to the thread_struct |
| 843 | */ |
| 844 | if (copy_vsx_from_user(current, &sr->mc_vsregs) || |
| 845 | copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs)) |
| 846 | return 1; |
| 847 | } else if (current->thread.used_vsr) |
| 848 | for (i = 0; i < 32 ; i++) { |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 849 | current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
| 850 | current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 851 | } |
| 852 | #endif /* CONFIG_VSX */ |
| 853 | |
| 854 | #ifdef CONFIG_SPE |
| 855 | /* SPE regs are not checkpointed with TM, so this section is |
| 856 | * simply the same as in restore_user_regs(). |
| 857 | */ |
| 858 | regs->msr &= ~MSR_SPE; |
| 859 | if (msr & MSR_SPE) { |
| 860 | if (__copy_from_user(current->thread.evr, &sr->mc_vregs, |
| 861 | ELF_NEVRREG * sizeof(u32))) |
| 862 | return 1; |
| 863 | } else if (current->thread.used_spe) |
| 864 | memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); |
| 865 | |
| 866 | /* Always get SPEFSCR back */ |
| 867 | if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs |
| 868 | + ELF_NEVRREG)) |
| 869 | return 1; |
| 870 | #endif /* CONFIG_SPE */ |
| 871 | |
| 872 | /* Now, recheckpoint. This loads up all of the checkpointed (older) |
| 873 | * registers, including FP and V[S]Rs. After recheckpointing, the |
| 874 | * transactional versions should be loaded. |
| 875 | */ |
| 876 | tm_enable(); |
| 877 | /* This loads the checkpointed FP/VEC state, if used */ |
| 878 | tm_recheckpoint(¤t->thread, msr); |
Michael Neuling | 2c27a18 | 2013-06-09 21:23:17 +1000 | [diff] [blame] | 879 | /* Get the top half of the MSR */ |
| 880 | if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR])) |
| 881 | return 1; |
| 882 | /* Pull in MSR TM from user context */ |
| 883 | regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 884 | |
| 885 | /* This loads the speculative FP/VEC state, if used */ |
| 886 | if (msr & MSR_FP) { |
| 887 | do_load_up_transact_fpu(¤t->thread); |
| 888 | regs->msr |= (MSR_FP | current->thread.fpexc_mode); |
| 889 | } |
Michael Neuling | f110c0c | 2013-04-09 16:18:55 +1000 | [diff] [blame] | 890 | #ifdef CONFIG_ALTIVEC |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 891 | if (msr & MSR_VEC) { |
| 892 | do_load_up_transact_altivec(¤t->thread); |
| 893 | regs->msr |= MSR_VEC; |
| 894 | } |
Michael Neuling | f110c0c | 2013-04-09 16:18:55 +1000 | [diff] [blame] | 895 | #endif |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 896 | |
| 897 | return 0; |
| 898 | } |
| 899 | #endif |
| 900 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 901 | #ifdef CONFIG_PPC64 |
Al Viro | ce39596 | 2013-10-13 17:23:53 -0400 | [diff] [blame] | 902 | int copy_siginfo_to_user32(struct compat_siginfo __user *d, const siginfo_t *s) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 903 | { |
| 904 | int err; |
| 905 | |
| 906 | if (!access_ok (VERIFY_WRITE, d, sizeof(*d))) |
| 907 | return -EFAULT; |
| 908 | |
| 909 | /* If you change siginfo_t structure, please be sure |
| 910 | * this code is fixed accordingly. |
| 911 | * It should never copy any pad contained in the structure |
| 912 | * to avoid security leaks, but must copy the generic |
| 913 | * 3 ints plus the relevant union member. |
| 914 | * This routine must convert siginfo from 64bit to 32bit as well |
| 915 | * at the same time. |
| 916 | */ |
| 917 | err = __put_user(s->si_signo, &d->si_signo); |
| 918 | err |= __put_user(s->si_errno, &d->si_errno); |
| 919 | err |= __put_user((short)s->si_code, &d->si_code); |
| 920 | if (s->si_code < 0) |
| 921 | err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad, |
| 922 | SI_PAD_SIZE32); |
| 923 | else switch(s->si_code >> 16) { |
| 924 | case __SI_CHLD >> 16: |
| 925 | err |= __put_user(s->si_pid, &d->si_pid); |
| 926 | err |= __put_user(s->si_uid, &d->si_uid); |
| 927 | err |= __put_user(s->si_utime, &d->si_utime); |
| 928 | err |= __put_user(s->si_stime, &d->si_stime); |
| 929 | err |= __put_user(s->si_status, &d->si_status); |
| 930 | break; |
| 931 | case __SI_FAULT >> 16: |
| 932 | err |= __put_user((unsigned int)(unsigned long)s->si_addr, |
| 933 | &d->si_addr); |
| 934 | break; |
| 935 | case __SI_POLL >> 16: |
| 936 | err |= __put_user(s->si_band, &d->si_band); |
| 937 | err |= __put_user(s->si_fd, &d->si_fd); |
| 938 | break; |
| 939 | case __SI_TIMER >> 16: |
| 940 | err |= __put_user(s->si_tid, &d->si_tid); |
| 941 | err |= __put_user(s->si_overrun, &d->si_overrun); |
| 942 | err |= __put_user(s->si_int, &d->si_int); |
| 943 | break; |
| 944 | case __SI_RT >> 16: /* This is not generated by the kernel as of now. */ |
| 945 | case __SI_MESGQ >> 16: |
| 946 | err |= __put_user(s->si_int, &d->si_int); |
| 947 | /* fallthrough */ |
| 948 | case __SI_KILL >> 16: |
| 949 | default: |
| 950 | err |= __put_user(s->si_pid, &d->si_pid); |
| 951 | err |= __put_user(s->si_uid, &d->si_uid); |
| 952 | break; |
| 953 | } |
| 954 | return err; |
| 955 | } |
| 956 | |
| 957 | #define copy_siginfo_to_user copy_siginfo_to_user32 |
| 958 | |
Roland McGrath | 9c0c44d | 2008-04-20 08:19:24 +1000 | [diff] [blame] | 959 | int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from) |
| 960 | { |
| 961 | memset(to, 0, sizeof *to); |
| 962 | |
| 963 | if (copy_from_user(to, from, 3*sizeof(int)) || |
| 964 | copy_from_user(to->_sifields._pad, |
| 965 | from->_sifields._pad, SI_PAD_SIZE32)) |
| 966 | return -EFAULT; |
| 967 | |
| 968 | return 0; |
| 969 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 970 | #endif /* CONFIG_PPC64 */ |
| 971 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 972 | /* |
| 973 | * Set up a signal frame for a "real-time" signal handler |
| 974 | * (one which gets siginfo). |
| 975 | */ |
Christoph Hellwig | f478f54 | 2007-06-04 15:15:52 +1000 | [diff] [blame] | 976 | int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka, |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 977 | siginfo_t *info, sigset_t *oldset, |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 978 | struct pt_regs *regs) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 979 | { |
| 980 | struct rt_sigframe __user *rt_sf; |
| 981 | struct mcontext __user *frame; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 982 | struct mcontext __user *tm_frame = NULL; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 983 | void __user *addr; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 984 | unsigned long newsp = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 985 | int sigret; |
| 986 | unsigned long tramp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 987 | |
| 988 | /* Set up Signal Frame */ |
| 989 | /* Put a Real Time Context onto stack */ |
Michael Neuling | 2b3f8e8 | 2013-05-26 18:09:41 +0000 | [diff] [blame] | 990 | rt_sf = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*rt_sf), 1); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 991 | addr = rt_sf; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 992 | if (unlikely(rt_sf == NULL)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 993 | goto badframe; |
| 994 | |
| 995 | /* Put the siginfo & fill in most of the ucontext */ |
| 996 | if (copy_siginfo_to_user(&rt_sf->info, info) |
| 997 | || __put_user(0, &rt_sf->uc.uc_flags) |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 998 | || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1]) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 999 | || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext), |
| 1000 | &rt_sf->uc.uc_regs) |
| 1001 | || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset)) |
| 1002 | goto badframe; |
| 1003 | |
| 1004 | /* Save user registers on the stack */ |
| 1005 | frame = &rt_sf->uc.uc_mcontext; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1006 | addr = frame; |
Benjamin Herrenschmidt | a5bba93 | 2006-05-30 13:51:37 +1000 | [diff] [blame] | 1007 | if (vdso32_rt_sigtramp && current->mm->context.vdso_base) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1008 | sigret = 0; |
| 1009 | tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp; |
Benjamin Herrenschmidt | a7f290d | 2005-11-11 21:15:21 +1100 | [diff] [blame] | 1010 | } else { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1011 | sigret = __NR_rt_sigreturn; |
| 1012 | tramp = (unsigned long) frame->tramp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1013 | } |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 1014 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1015 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1016 | tm_frame = &rt_sf->uc_transact.uc_mcontext; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1017 | if (MSR_TM_ACTIVE(regs->msr)) { |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1018 | if (save_tm_user_regs(regs, frame, tm_frame, sigret)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1019 | goto badframe; |
| 1020 | } |
| 1021 | else |
| 1022 | #endif |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1023 | { |
| 1024 | if (save_user_regs(regs, frame, tm_frame, sigret, 1)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1025 | goto badframe; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1026 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1027 | regs->link = tramp; |
| 1028 | |
| 1029 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1030 | if (MSR_TM_ACTIVE(regs->msr)) { |
| 1031 | if (__put_user((unsigned long)&rt_sf->uc_transact, |
| 1032 | &rt_sf->uc.uc_link) |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1033 | || __put_user((unsigned long)tm_frame, &rt_sf->uc_transact.uc_regs)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1034 | goto badframe; |
| 1035 | } |
| 1036 | else |
| 1037 | #endif |
| 1038 | if (__put_user(0, &rt_sf->uc.uc_link)) |
| 1039 | goto badframe; |
| 1040 | |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 1041 | current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 1042 | |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1043 | /* create a stack frame for the caller of the handler */ |
| 1044 | newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1045 | addr = (void __user *)regs->gpr[1]; |
Paul Mackerras | e2b5530 | 2005-10-22 14:46:33 +1000 | [diff] [blame] | 1046 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1047 | goto badframe; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1048 | |
| 1049 | /* Fill registers for signal handler */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1050 | regs->gpr[1] = newsp; |
| 1051 | regs->gpr[3] = sig; |
| 1052 | regs->gpr[4] = (unsigned long) &rt_sf->info; |
| 1053 | regs->gpr[5] = (unsigned long) &rt_sf->uc; |
| 1054 | regs->gpr[6] = (unsigned long) rt_sf; |
| 1055 | regs->nip = (unsigned long) ka->sa.sa_handler; |
Anton Blanchard | e871c6b | 2013-09-23 12:04:43 +1000 | [diff] [blame] | 1056 | /* enter the signal handler in native-endian mode */ |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 1057 | regs->msr &= ~MSR_LE; |
Anton Blanchard | e871c6b | 2013-09-23 12:04:43 +1000 | [diff] [blame] | 1058 | regs->msr |= (MSR_KERNEL & MSR_LE); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1059 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1060 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext |
| 1061 | * just indicates to userland that we were doing a transaction, but we |
| 1062 | * don't want to return in transactional state: |
| 1063 | */ |
| 1064 | regs->msr &= ~MSR_TS_MASK; |
| 1065 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1066 | return 1; |
| 1067 | |
| 1068 | badframe: |
| 1069 | #ifdef DEBUG_SIG |
| 1070 | printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n", |
| 1071 | regs, frame, newsp); |
| 1072 | #endif |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1073 | if (show_unhandled_signals) |
| 1074 | printk_ratelimited(KERN_INFO |
| 1075 | "%s[%d]: bad frame in handle_rt_signal32: " |
| 1076 | "%p nip %08lx lr %08lx\n", |
| 1077 | current->comm, current->pid, |
| 1078 | addr, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1079 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1080 | force_sigsegv(sig, current); |
| 1081 | return 0; |
| 1082 | } |
| 1083 | |
| 1084 | static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig) |
| 1085 | { |
| 1086 | sigset_t set; |
| 1087 | struct mcontext __user *mcp; |
| 1088 | |
| 1089 | if (get_sigset_t(&set, &ucp->uc_sigmask)) |
| 1090 | return -EFAULT; |
| 1091 | #ifdef CONFIG_PPC64 |
| 1092 | { |
| 1093 | u32 cmcp; |
| 1094 | |
| 1095 | if (__get_user(cmcp, &ucp->uc_regs)) |
| 1096 | return -EFAULT; |
| 1097 | mcp = (struct mcontext __user *)(u64)cmcp; |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1098 | /* no need to check access_ok(mcp), since mcp < 4GB */ |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1099 | } |
| 1100 | #else |
| 1101 | if (__get_user(mcp, &ucp->uc_regs)) |
| 1102 | return -EFAULT; |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1103 | if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp))) |
| 1104 | return -EFAULT; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1105 | #endif |
Al Viro | 17440f1 | 2012-04-27 14:09:19 -0400 | [diff] [blame] | 1106 | set_current_blocked(&set); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1107 | if (restore_user_regs(regs, mcp, sig)) |
| 1108 | return -EFAULT; |
| 1109 | |
| 1110 | return 0; |
| 1111 | } |
| 1112 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1113 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1114 | static int do_setcontext_tm(struct ucontext __user *ucp, |
| 1115 | struct ucontext __user *tm_ucp, |
| 1116 | struct pt_regs *regs) |
| 1117 | { |
| 1118 | sigset_t set; |
| 1119 | struct mcontext __user *mcp; |
| 1120 | struct mcontext __user *tm_mcp; |
| 1121 | u32 cmcp; |
| 1122 | u32 tm_cmcp; |
| 1123 | |
| 1124 | if (get_sigset_t(&set, &ucp->uc_sigmask)) |
| 1125 | return -EFAULT; |
| 1126 | |
| 1127 | if (__get_user(cmcp, &ucp->uc_regs) || |
| 1128 | __get_user(tm_cmcp, &tm_ucp->uc_regs)) |
| 1129 | return -EFAULT; |
| 1130 | mcp = (struct mcontext __user *)(u64)cmcp; |
| 1131 | tm_mcp = (struct mcontext __user *)(u64)tm_cmcp; |
| 1132 | /* no need to check access_ok(mcp), since mcp < 4GB */ |
| 1133 | |
| 1134 | set_current_blocked(&set); |
| 1135 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) |
| 1136 | return -EFAULT; |
| 1137 | |
| 1138 | return 0; |
| 1139 | } |
| 1140 | #endif |
| 1141 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1142 | long sys_swapcontext(struct ucontext __user *old_ctx, |
Paul Mackerras | 1bd7933 | 2006-03-08 13:24:22 +1100 | [diff] [blame] | 1143 | struct ucontext __user *new_ctx, |
| 1144 | int ctx_size, int r6, int r7, int r8, struct pt_regs *regs) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1145 | { |
| 1146 | unsigned char tmp; |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1147 | int ctx_has_vsx_region = 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1148 | |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1149 | #ifdef CONFIG_PPC64 |
| 1150 | unsigned long new_msr = 0; |
| 1151 | |
Andreas Schwab | 77eb50a | 2008-11-06 00:49:00 +0000 | [diff] [blame] | 1152 | if (new_ctx) { |
| 1153 | struct mcontext __user *mcp; |
| 1154 | u32 cmcp; |
| 1155 | |
| 1156 | /* |
| 1157 | * Get pointer to the real mcontext. No need for |
| 1158 | * access_ok since we are dealing with compat |
| 1159 | * pointers. |
| 1160 | */ |
| 1161 | if (__get_user(cmcp, &new_ctx->uc_regs)) |
| 1162 | return -EFAULT; |
| 1163 | mcp = (struct mcontext __user *)(u64)cmcp; |
| 1164 | if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR])) |
| 1165 | return -EFAULT; |
| 1166 | } |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1167 | /* |
| 1168 | * Check that the context is not smaller than the original |
| 1169 | * size (with VMX but without VSX) |
| 1170 | */ |
| 1171 | if (ctx_size < UCONTEXTSIZEWITHOUTVSX) |
| 1172 | return -EINVAL; |
| 1173 | /* |
| 1174 | * If the new context state sets the MSR VSX bits but |
| 1175 | * it doesn't provide VSX state. |
| 1176 | */ |
| 1177 | if ((ctx_size < sizeof(struct ucontext)) && |
| 1178 | (new_msr & MSR_VSX)) |
| 1179 | return -EINVAL; |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1180 | /* Does the context have enough room to store VSX data? */ |
| 1181 | if (ctx_size >= sizeof(struct ucontext)) |
| 1182 | ctx_has_vsx_region = 1; |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1183 | #else |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1184 | /* Context size is for future use. Right now, we only make sure |
| 1185 | * we are passed something we understand |
| 1186 | */ |
| 1187 | if (ctx_size < sizeof(struct ucontext)) |
| 1188 | return -EINVAL; |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 1189 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1190 | if (old_ctx != NULL) { |
Paul Mackerras | 1c9bb1a | 2006-12-20 13:57:06 +1100 | [diff] [blame] | 1191 | struct mcontext __user *mctx; |
| 1192 | |
| 1193 | /* |
| 1194 | * old_ctx might not be 16-byte aligned, in which |
| 1195 | * case old_ctx->uc_mcontext won't be either. |
| 1196 | * Because we have the old_ctx->uc_pad2 field |
| 1197 | * before old_ctx->uc_mcontext, we need to round down |
| 1198 | * from &old_ctx->uc_mcontext to a 16-byte boundary. |
| 1199 | */ |
| 1200 | mctx = (struct mcontext __user *) |
| 1201 | ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL); |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1202 | if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size) |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1203 | || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1204 | || put_sigset_t(&old_ctx->uc_sigmask, ¤t->blocked) |
Paul Mackerras | 1c9bb1a | 2006-12-20 13:57:06 +1100 | [diff] [blame] | 1205 | || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1206 | return -EFAULT; |
| 1207 | } |
| 1208 | if (new_ctx == NULL) |
| 1209 | return 0; |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1210 | if (!access_ok(VERIFY_READ, new_ctx, ctx_size) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1211 | || __get_user(tmp, (u8 __user *) new_ctx) |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 1212 | || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1213 | return -EFAULT; |
| 1214 | |
| 1215 | /* |
| 1216 | * If we get a fault copying the context into the kernel's |
| 1217 | * image of the user's registers, we can't just return -EFAULT |
| 1218 | * because the user's registers will be corrupted. For instance |
| 1219 | * the NIP value may have been updated but not some of the |
| 1220 | * other registers. Given that we have done the access_ok |
| 1221 | * and successfully read the first and last bytes of the region |
| 1222 | * above, this should only happen in an out-of-memory situation |
| 1223 | * or if another thread unmaps the region containing the context. |
| 1224 | * We kill the task with a SIGSEGV in this situation. |
| 1225 | */ |
| 1226 | if (do_setcontext(new_ctx, regs, 0)) |
| 1227 | do_exit(SIGSEGV); |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1228 | |
| 1229 | set_thread_flag(TIF_RESTOREALL); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1230 | return 0; |
| 1231 | } |
| 1232 | |
| 1233 | long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, |
| 1234 | struct pt_regs *regs) |
| 1235 | { |
| 1236 | struct rt_sigframe __user *rt_sf; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1237 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1238 | struct ucontext __user *uc_transact; |
| 1239 | unsigned long msr_hi; |
| 1240 | unsigned long tmp; |
| 1241 | int tm_restore = 0; |
| 1242 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1243 | /* Always make any pending restarted system calls return -EINTR */ |
| 1244 | current_thread_info()->restart_block.fn = do_no_restart_syscall; |
| 1245 | |
| 1246 | rt_sf = (struct rt_sigframe __user *) |
| 1247 | (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16); |
| 1248 | if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf))) |
| 1249 | goto bad; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1250 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1251 | if (__get_user(tmp, &rt_sf->uc.uc_link)) |
| 1252 | goto bad; |
| 1253 | uc_transact = (struct ucontext __user *)(uintptr_t)tmp; |
| 1254 | if (uc_transact) { |
| 1255 | u32 cmcp; |
| 1256 | struct mcontext __user *mcp; |
| 1257 | |
| 1258 | if (__get_user(cmcp, &uc_transact->uc_regs)) |
| 1259 | return -EFAULT; |
| 1260 | mcp = (struct mcontext __user *)(u64)cmcp; |
| 1261 | /* The top 32 bits of the MSR are stashed in the transactional |
| 1262 | * ucontext. */ |
| 1263 | if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR])) |
| 1264 | goto bad; |
| 1265 | |
Michael Neuling | 55e4341 | 2013-06-09 21:23:18 +1000 | [diff] [blame] | 1266 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1267 | /* We only recheckpoint on return if we're |
| 1268 | * transaction. |
| 1269 | */ |
| 1270 | tm_restore = 1; |
| 1271 | if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs)) |
| 1272 | goto bad; |
| 1273 | } |
| 1274 | } |
| 1275 | if (!tm_restore) |
| 1276 | /* Fall through, for non-TM restore */ |
| 1277 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1278 | if (do_setcontext(&rt_sf->uc, regs, 1)) |
| 1279 | goto bad; |
| 1280 | |
| 1281 | /* |
| 1282 | * It's not clear whether or why it is desirable to save the |
| 1283 | * sigaltstack setting on signal delivery and restore it on |
| 1284 | * signal return. But other architectures do this and we have |
| 1285 | * always done it up until now so it is probably better not to |
| 1286 | * change it. -- paulus |
| 1287 | */ |
| 1288 | #ifdef CONFIG_PPC64 |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 1289 | if (compat_restore_altstack(&rt_sf->uc.uc_stack)) |
| 1290 | goto bad; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1291 | #else |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 1292 | if (restore_altstack(&rt_sf->uc.uc_stack)) |
| 1293 | goto bad; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1294 | #endif |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1295 | set_thread_flag(TIF_RESTOREALL); |
| 1296 | return 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1297 | |
| 1298 | bad: |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1299 | if (show_unhandled_signals) |
| 1300 | printk_ratelimited(KERN_INFO |
| 1301 | "%s[%d]: bad frame in sys_rt_sigreturn: " |
| 1302 | "%p nip %08lx lr %08lx\n", |
| 1303 | current->comm, current->pid, |
| 1304 | rt_sf, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1305 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1306 | force_sig(SIGSEGV, current); |
| 1307 | return 0; |
| 1308 | } |
| 1309 | |
| 1310 | #ifdef CONFIG_PPC32 |
| 1311 | int sys_debug_setcontext(struct ucontext __user *ctx, |
| 1312 | int ndbg, struct sig_dbg_op __user *dbg, |
| 1313 | int r6, int r7, int r8, |
| 1314 | struct pt_regs *regs) |
| 1315 | { |
| 1316 | struct sig_dbg_op op; |
| 1317 | int i; |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1318 | unsigned char tmp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1319 | unsigned long new_msr = regs->msr; |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1320 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Bharat Bhushan | 51ae8d4 | 2013-07-04 11:45:46 +0530 | [diff] [blame] | 1321 | unsigned long new_dbcr0 = current->thread.debug.dbcr0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1322 | #endif |
| 1323 | |
| 1324 | for (i=0; i<ndbg; i++) { |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1325 | if (copy_from_user(&op, dbg + i, sizeof(op))) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1326 | return -EFAULT; |
| 1327 | switch (op.dbg_type) { |
| 1328 | case SIG_DBG_SINGLE_STEPPING: |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1329 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1330 | if (op.dbg_value) { |
| 1331 | new_msr |= MSR_DE; |
| 1332 | new_dbcr0 |= (DBCR0_IDM | DBCR0_IC); |
| 1333 | } else { |
Dave Kleikamp | 3bffb65 | 2010-02-08 11:51:18 +0000 | [diff] [blame] | 1334 | new_dbcr0 &= ~DBCR0_IC; |
| 1335 | if (!DBCR_ACTIVE_EVENTS(new_dbcr0, |
Bharat Bhushan | 51ae8d4 | 2013-07-04 11:45:46 +0530 | [diff] [blame] | 1336 | current->thread.debug.dbcr1)) { |
Dave Kleikamp | 3bffb65 | 2010-02-08 11:51:18 +0000 | [diff] [blame] | 1337 | new_msr &= ~MSR_DE; |
| 1338 | new_dbcr0 &= ~DBCR0_IDM; |
| 1339 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1340 | } |
| 1341 | #else |
| 1342 | if (op.dbg_value) |
| 1343 | new_msr |= MSR_SE; |
| 1344 | else |
| 1345 | new_msr &= ~MSR_SE; |
| 1346 | #endif |
| 1347 | break; |
| 1348 | case SIG_DBG_BRANCH_TRACING: |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1349 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1350 | return -EINVAL; |
| 1351 | #else |
| 1352 | if (op.dbg_value) |
| 1353 | new_msr |= MSR_BE; |
| 1354 | else |
| 1355 | new_msr &= ~MSR_BE; |
| 1356 | #endif |
| 1357 | break; |
| 1358 | |
| 1359 | default: |
| 1360 | return -EINVAL; |
| 1361 | } |
| 1362 | } |
| 1363 | |
| 1364 | /* We wait until here to actually install the values in the |
| 1365 | registers so if we fail in the above loop, it will not |
| 1366 | affect the contents of these registers. After this point, |
| 1367 | failure is a problem, anyway, and it's very unlikely unless |
| 1368 | the user is really doing something wrong. */ |
| 1369 | regs->msr = new_msr; |
Dave Kleikamp | 172ae2e | 2010-02-08 11:50:57 +0000 | [diff] [blame] | 1370 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
Bharat Bhushan | 51ae8d4 | 2013-07-04 11:45:46 +0530 | [diff] [blame] | 1371 | current->thread.debug.dbcr0 = new_dbcr0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1372 | #endif |
| 1373 | |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 1374 | if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)) |
| 1375 | || __get_user(tmp, (u8 __user *) ctx) |
| 1376 | || __get_user(tmp, (u8 __user *) (ctx + 1) - 1)) |
| 1377 | return -EFAULT; |
| 1378 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1379 | /* |
| 1380 | * If we get a fault copying the context into the kernel's |
| 1381 | * image of the user's registers, we can't just return -EFAULT |
| 1382 | * because the user's registers will be corrupted. For instance |
| 1383 | * the NIP value may have been updated but not some of the |
| 1384 | * other registers. Given that we have done the access_ok |
| 1385 | * and successfully read the first and last bytes of the region |
| 1386 | * above, this should only happen in an out-of-memory situation |
| 1387 | * or if another thread unmaps the region containing the context. |
| 1388 | * We kill the task with a SIGSEGV in this situation. |
| 1389 | */ |
| 1390 | if (do_setcontext(ctx, regs, 1)) { |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1391 | if (show_unhandled_signals) |
| 1392 | printk_ratelimited(KERN_INFO "%s[%d]: bad frame in " |
| 1393 | "sys_debug_setcontext: %p nip %08lx " |
| 1394 | "lr %08lx\n", |
| 1395 | current->comm, current->pid, |
| 1396 | ctx, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1397 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1398 | force_sig(SIGSEGV, current); |
| 1399 | goto out; |
| 1400 | } |
| 1401 | |
| 1402 | /* |
| 1403 | * It's not clear whether or why it is desirable to save the |
| 1404 | * sigaltstack setting on signal delivery and restore it on |
| 1405 | * signal return. But other architectures do this and we have |
| 1406 | * always done it up until now so it is probably better not to |
| 1407 | * change it. -- paulus |
| 1408 | */ |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 1409 | restore_altstack(&ctx->uc_stack); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1410 | |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1411 | set_thread_flag(TIF_RESTOREALL); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1412 | out: |
| 1413 | return 0; |
| 1414 | } |
| 1415 | #endif |
| 1416 | |
| 1417 | /* |
| 1418 | * OK, we're invoking a handler |
| 1419 | */ |
Christoph Hellwig | f478f54 | 2007-06-04 15:15:52 +1000 | [diff] [blame] | 1420 | int handle_signal32(unsigned long sig, struct k_sigaction *ka, |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1421 | siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1422 | { |
| 1423 | struct sigcontext __user *sc; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1424 | struct sigframe __user *frame; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1425 | struct mcontext __user *tm_mctx = NULL; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1426 | unsigned long newsp = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1427 | int sigret; |
| 1428 | unsigned long tramp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1429 | |
| 1430 | /* Set up Signal Frame */ |
Michael Neuling | 2b3f8e8 | 2013-05-26 18:09:41 +0000 | [diff] [blame] | 1431 | frame = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*frame), 1); |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1432 | if (unlikely(frame == NULL)) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1433 | goto badframe; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1434 | sc = (struct sigcontext __user *) &frame->sctx; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1435 | |
| 1436 | #if _NSIG != 64 |
| 1437 | #error "Please adjust handle_signal()" |
| 1438 | #endif |
| 1439 | if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler) |
| 1440 | || __put_user(oldset->sig[0], &sc->oldmask) |
| 1441 | #ifdef CONFIG_PPC64 |
| 1442 | || __put_user((oldset->sig[0] >> 32), &sc->_unused[3]) |
| 1443 | #else |
| 1444 | || __put_user(oldset->sig[1], &sc->_unused[3]) |
| 1445 | #endif |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1446 | || __put_user(to_user_ptr(&frame->mctx), &sc->regs) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1447 | || __put_user(sig, &sc->signal)) |
| 1448 | goto badframe; |
| 1449 | |
Benjamin Herrenschmidt | a5bba93 | 2006-05-30 13:51:37 +1000 | [diff] [blame] | 1450 | if (vdso32_sigtramp && current->mm->context.vdso_base) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1451 | sigret = 0; |
| 1452 | tramp = current->mm->context.vdso_base + vdso32_sigtramp; |
Benjamin Herrenschmidt | a7f290d | 2005-11-11 21:15:21 +1100 | [diff] [blame] | 1453 | } else { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1454 | sigret = __NR_sigreturn; |
| 1455 | tramp = (unsigned long) frame->mctx.tramp; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1456 | } |
| 1457 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1458 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1459 | tm_mctx = &frame->mctx_transact; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1460 | if (MSR_TM_ACTIVE(regs->msr)) { |
| 1461 | if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact, |
| 1462 | sigret)) |
| 1463 | goto badframe; |
| 1464 | } |
| 1465 | else |
| 1466 | #endif |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1467 | { |
| 1468 | if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1)) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1469 | goto badframe; |
Michael Neuling | 1d25f11 | 2013-06-09 21:23:15 +1000 | [diff] [blame] | 1470 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1471 | |
| 1472 | regs->link = tramp; |
| 1473 | |
Paul Mackerras | de79f7b | 2013-09-10 20:20:42 +1000 | [diff] [blame] | 1474 | current->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */ |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 1475 | |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1476 | /* create a stack frame for the caller of the handler */ |
| 1477 | newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1478 | if (put_user(regs->gpr[1], (u32 __user *)newsp)) |
| 1479 | goto badframe; |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 1480 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1481 | regs->gpr[1] = newsp; |
| 1482 | regs->gpr[3] = sig; |
| 1483 | regs->gpr[4] = (unsigned long) sc; |
| 1484 | regs->nip = (unsigned long) ka->sa.sa_handler; |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 1485 | /* enter the signal handler in big-endian mode */ |
| 1486 | regs->msr &= ~MSR_LE; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 1487 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1488 | /* Remove TM bits from thread's MSR. The MSR in the sigcontext |
| 1489 | * just indicates to userland that we were doing a transaction, but we |
| 1490 | * don't want to return in transactional state: |
| 1491 | */ |
| 1492 | regs->msr &= ~MSR_TS_MASK; |
| 1493 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1494 | return 1; |
| 1495 | |
| 1496 | badframe: |
| 1497 | #ifdef DEBUG_SIG |
| 1498 | printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n", |
| 1499 | regs, frame, newsp); |
| 1500 | #endif |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1501 | if (show_unhandled_signals) |
| 1502 | printk_ratelimited(KERN_INFO |
| 1503 | "%s[%d]: bad frame in handle_signal32: " |
| 1504 | "%p nip %08lx lr %08lx\n", |
| 1505 | current->comm, current->pid, |
| 1506 | frame, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1507 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1508 | force_sigsegv(sig, current); |
| 1509 | return 0; |
| 1510 | } |
| 1511 | |
| 1512 | /* |
| 1513 | * Do a signal return; undo the signal stack. |
| 1514 | */ |
| 1515 | long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, |
| 1516 | struct pt_regs *regs) |
| 1517 | { |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1518 | struct sigframe __user *sf; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1519 | struct sigcontext __user *sc; |
| 1520 | struct sigcontext sigctx; |
| 1521 | struct mcontext __user *sr; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1522 | void __user *addr; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1523 | sigset_t set; |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1524 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1525 | struct mcontext __user *mcp, *tm_mcp; |
| 1526 | unsigned long msr_hi; |
| 1527 | #endif |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1528 | |
| 1529 | /* Always make any pending restarted system calls return -EINTR */ |
| 1530 | current_thread_info()->restart_block.fn = do_no_restart_syscall; |
| 1531 | |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1532 | sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE); |
| 1533 | sc = &sf->sctx; |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1534 | addr = sc; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1535 | if (copy_from_user(&sigctx, sc, sizeof(sigctx))) |
| 1536 | goto badframe; |
| 1537 | |
| 1538 | #ifdef CONFIG_PPC64 |
| 1539 | /* |
| 1540 | * Note that PPC32 puts the upper 32 bits of the sigmask in the |
| 1541 | * unused part of the signal stackframe |
| 1542 | */ |
| 1543 | set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32); |
| 1544 | #else |
| 1545 | set.sig[0] = sigctx.oldmask; |
| 1546 | set.sig[1] = sigctx._unused[3]; |
| 1547 | #endif |
Al Viro | 17440f1 | 2012-04-27 14:09:19 -0400 | [diff] [blame] | 1548 | set_current_blocked(&set); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1549 | |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1550 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1551 | mcp = (struct mcontext __user *)&sf->mctx; |
| 1552 | tm_mcp = (struct mcontext __user *)&sf->mctx_transact; |
| 1553 | if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR])) |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1554 | goto badframe; |
Michael Neuling | fee55450 | 2013-06-09 21:23:16 +1000 | [diff] [blame] | 1555 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
| 1556 | if (!cpu_has_feature(CPU_FTR_TM)) |
| 1557 | goto badframe; |
| 1558 | if (restore_tm_user_regs(regs, mcp, tm_mcp)) |
| 1559 | goto badframe; |
| 1560 | } else |
| 1561 | #endif |
| 1562 | { |
| 1563 | sr = (struct mcontext __user *)from_user_ptr(sigctx.regs); |
| 1564 | addr = sr; |
| 1565 | if (!access_ok(VERIFY_READ, sr, sizeof(*sr)) |
| 1566 | || restore_user_regs(regs, sr, 1)) |
| 1567 | goto badframe; |
| 1568 | } |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1569 | |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 1570 | set_thread_flag(TIF_RESTOREALL); |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1571 | return 0; |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1572 | |
| 1573 | badframe: |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 1574 | if (show_unhandled_signals) |
| 1575 | printk_ratelimited(KERN_INFO |
| 1576 | "%s[%d]: bad frame in sys_sigreturn: " |
| 1577 | "%p nip %08lx lr %08lx\n", |
| 1578 | current->comm, current->pid, |
| 1579 | addr, regs->nip, regs->link); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 1580 | |
Stephen Rothwell | 81e7009 | 2005-10-18 11:17:58 +1000 | [diff] [blame] | 1581 | force_sig(SIGSEGV, current); |
| 1582 | return 0; |
| 1583 | } |