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Ram Amraniac1b36e2016-10-10 13:15:32 +03001/* QLogic qedr NIC Driver
2 * Copyright (c) 2015-2016 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#ifndef __QEDR_USER_H__
33#define __QEDR_USER_H__
34
35#include <linux/types.h>
36
37#define QEDR_ABI_VERSION (8)
38
39/* user kernel communication data structures. */
40
41struct qedr_alloc_ucontext_resp {
42 __u64 db_pa;
43 __u32 db_size;
44
45 __u32 max_send_wr;
46 __u32 max_recv_wr;
47 __u32 max_srq_wr;
48 __u32 sges_per_send_wr;
49 __u32 sges_per_recv_wr;
50 __u32 sges_per_srq_wr;
51 __u32 max_cqes;
52};
Ram Amrania7efd772016-10-10 13:15:33 +030053
54struct qedr_alloc_pd_ureq {
55 __u64 rsvd1;
56};
57
58struct qedr_alloc_pd_uresp {
59 __u32 pd_id;
60};
61
62struct qedr_create_cq_ureq {
63 __u64 addr;
64 __u64 len;
65};
66
67struct qedr_create_cq_uresp {
68 __u32 db_offset;
69 __u16 icid;
70};
71
Ram Amranicecbcdd2016-10-10 13:15:34 +030072struct qedr_create_qp_ureq {
73 __u32 qp_handle_hi;
74 __u32 qp_handle_lo;
75
76 /* SQ */
77 /* user space virtual address of SQ buffer */
78 __u64 sq_addr;
79
80 /* length of SQ buffer */
81 __u64 sq_len;
82
83 /* RQ */
84 /* user space virtual address of RQ buffer */
85 __u64 rq_addr;
86
87 /* length of RQ buffer */
88 __u64 rq_len;
89};
90
91struct qedr_create_qp_uresp {
92 __u32 qp_id;
93 __u32 atomic_supported;
94
95 /* SQ */
96 __u32 sq_db_offset;
97 __u16 sq_icid;
98
99 /* RQ */
100 __u32 rq_db_offset;
101 __u16 rq_icid;
102
103 __u32 rq_db2_offset;
104};
105
Ram Amraniac1b36e2016-10-10 13:15:32 +0300106#endif /* __QEDR_USER_H__ */