Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 1 | /* |
| 2 | * MPC8560 ADS Device Tree Source |
| 3 | * |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 4 | * Copyright 2006, 2008 Freescale Semiconductor Inc. |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 12 | /dts-v1/; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 13 | |
| 14 | / { |
| 15 | model = "MPC8560ADS"; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 16 | compatible = "MPC8560ADS", "MPC85xxADS"; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 17 | #address-cells = <1>; |
| 18 | #size-cells = <1>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 19 | |
Kumar Gala | ea082fa | 2007-12-12 01:46:12 -0600 | [diff] [blame] | 20 | aliases { |
| 21 | ethernet0 = &enet0; |
| 22 | ethernet1 = &enet1; |
| 23 | ethernet2 = &enet2; |
| 24 | ethernet3 = &enet3; |
| 25 | serial0 = &serial0; |
| 26 | serial1 = &serial1; |
| 27 | pci0 = &pci0; |
| 28 | }; |
| 29 | |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 30 | cpus { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 31 | #address-cells = <1>; |
| 32 | #size-cells = <0>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 33 | |
| 34 | PowerPC,8560@0 { |
| 35 | device_type = "cpu"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 36 | reg = <0x0>; |
| 37 | d-cache-line-size = <32>; // 32 bytes |
| 38 | i-cache-line-size = <32>; // 32 bytes |
| 39 | d-cache-size = <0x8000>; // L1, 32K |
| 40 | i-cache-size = <0x8000>; // L1, 32K |
| 41 | timebase-frequency = <82500000>; |
| 42 | bus-frequency = <330000000>; |
| 43 | clock-frequency = <825000000>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 44 | }; |
| 45 | }; |
| 46 | |
| 47 | memory { |
| 48 | device_type = "memory"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 49 | reg = <0x0 0x10000000>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 50 | }; |
| 51 | |
| 52 | soc8560@e0000000 { |
| 53 | #address-cells = <1>; |
| 54 | #size-cells = <1>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 55 | device_type = "soc"; |
Kim Phillips | cf0d19f | 2008-07-29 15:29:24 -0500 | [diff] [blame] | 56 | compatible = "simple-bus"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 57 | ranges = <0x0 0xe0000000 0x100000>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 58 | bus-frequency = <330000000>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 59 | |
Kumar Gala | e1a2289 | 2009-04-22 13:17:42 -0500 | [diff] [blame] | 60 | ecm-law@0 { |
| 61 | compatible = "fsl,ecm-law"; |
| 62 | reg = <0x0 0x1000>; |
| 63 | fsl,num-laws = <8>; |
| 64 | }; |
| 65 | |
| 66 | ecm@1000 { |
| 67 | compatible = "fsl,mpc8560-ecm", "fsl,ecm"; |
| 68 | reg = <0x1000 0x1000>; |
| 69 | interrupts = <17 2>; |
| 70 | interrupt-parent = <&mpic>; |
| 71 | }; |
| 72 | |
Dave Jiang | 50cf670 | 2007-05-10 10:03:05 -0700 | [diff] [blame] | 73 | memory-controller@2000 { |
Bradley Hughes | 8a4ab21 | 2010-07-21 12:04:06 +0000 | [diff] [blame] | 74 | compatible = "fsl,mpc8540-memory-controller"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 75 | reg = <0x2000 0x1000>; |
Dave Jiang | 50cf670 | 2007-05-10 10:03:05 -0700 | [diff] [blame] | 76 | interrupt-parent = <&mpic>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 77 | interrupts = <18 2>; |
Dave Jiang | 50cf670 | 2007-05-10 10:03:05 -0700 | [diff] [blame] | 78 | }; |
| 79 | |
Kumar Gala | c054065 | 2008-05-30 13:43:43 -0500 | [diff] [blame] | 80 | L2: l2-cache-controller@20000 { |
Bradley Hughes | 8a4ab21 | 2010-07-21 12:04:06 +0000 | [diff] [blame] | 81 | compatible = "fsl,mpc8540-l2-cache-controller"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 82 | reg = <0x20000 0x1000>; |
| 83 | cache-line-size = <32>; // 32 bytes |
| 84 | cache-size = <0x40000>; // L2, 256K |
Dave Jiang | 50cf670 | 2007-05-10 10:03:05 -0700 | [diff] [blame] | 85 | interrupt-parent = <&mpic>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 86 | interrupts = <16 2>; |
Dave Jiang | 50cf670 | 2007-05-10 10:03:05 -0700 | [diff] [blame] | 87 | }; |
| 88 | |
Kumar Gala | dee8055 | 2008-06-27 13:45:19 -0500 | [diff] [blame] | 89 | dma@21300 { |
| 90 | #address-cells = <1>; |
| 91 | #size-cells = <1>; |
| 92 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; |
| 93 | reg = <0x21300 0x4>; |
| 94 | ranges = <0x0 0x21100 0x200>; |
| 95 | cell-index = <0>; |
| 96 | dma-channel@0 { |
| 97 | compatible = "fsl,mpc8560-dma-channel", |
| 98 | "fsl,eloplus-dma-channel"; |
| 99 | reg = <0x0 0x80>; |
| 100 | cell-index = <0>; |
| 101 | interrupt-parent = <&mpic>; |
| 102 | interrupts = <20 2>; |
| 103 | }; |
| 104 | dma-channel@80 { |
| 105 | compatible = "fsl,mpc8560-dma-channel", |
| 106 | "fsl,eloplus-dma-channel"; |
| 107 | reg = <0x80 0x80>; |
| 108 | cell-index = <1>; |
| 109 | interrupt-parent = <&mpic>; |
| 110 | interrupts = <21 2>; |
| 111 | }; |
| 112 | dma-channel@100 { |
| 113 | compatible = "fsl,mpc8560-dma-channel", |
| 114 | "fsl,eloplus-dma-channel"; |
| 115 | reg = <0x100 0x80>; |
| 116 | cell-index = <2>; |
| 117 | interrupt-parent = <&mpic>; |
| 118 | interrupts = <22 2>; |
| 119 | }; |
| 120 | dma-channel@180 { |
| 121 | compatible = "fsl,mpc8560-dma-channel", |
| 122 | "fsl,eloplus-dma-channel"; |
| 123 | reg = <0x180 0x80>; |
| 124 | cell-index = <3>; |
| 125 | interrupt-parent = <&mpic>; |
| 126 | interrupts = <23 2>; |
| 127 | }; |
| 128 | }; |
| 129 | |
Kumar Gala | e77b28e | 2007-12-12 00:28:35 -0600 | [diff] [blame] | 130 | enet0: ethernet@24000 { |
Anton Vorontsov | 84ba4a5 | 2009-03-19 21:01:48 +0300 | [diff] [blame] | 131 | #address-cells = <1>; |
| 132 | #size-cells = <1>; |
Kumar Gala | e77b28e | 2007-12-12 00:28:35 -0600 | [diff] [blame] | 133 | cell-index = <0>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 134 | device_type = "network"; |
| 135 | model = "TSEC"; |
| 136 | compatible = "gianfar"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 137 | reg = <0x24000 0x1000>; |
Anton Vorontsov | 84ba4a5 | 2009-03-19 21:01:48 +0300 | [diff] [blame] | 138 | ranges = <0x0 0x24000 0x1000>; |
Timur Tabi | eae9826 | 2007-06-22 14:33:15 -0500 | [diff] [blame] | 139 | local-mac-address = [ 00 00 00 00 00 00 ]; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 140 | interrupts = <29 2 30 2 34 2>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 141 | interrupt-parent = <&mpic>; |
Andy Fleming | b31a1d8 | 2008-12-16 15:29:15 -0800 | [diff] [blame] | 142 | tbi-handle = <&tbi0>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 143 | phy-handle = <&phy0>; |
Anton Vorontsov | 84ba4a5 | 2009-03-19 21:01:48 +0300 | [diff] [blame] | 144 | |
| 145 | mdio@520 { |
| 146 | #address-cells = <1>; |
| 147 | #size-cells = <0>; |
| 148 | compatible = "fsl,gianfar-mdio"; |
| 149 | reg = <0x520 0x20>; |
| 150 | |
| 151 | phy0: ethernet-phy@0 { |
| 152 | interrupt-parent = <&mpic>; |
| 153 | interrupts = <5 1>; |
| 154 | reg = <0x0>; |
| 155 | device_type = "ethernet-phy"; |
| 156 | }; |
| 157 | phy1: ethernet-phy@1 { |
| 158 | interrupt-parent = <&mpic>; |
| 159 | interrupts = <5 1>; |
| 160 | reg = <0x1>; |
| 161 | device_type = "ethernet-phy"; |
| 162 | }; |
| 163 | phy2: ethernet-phy@2 { |
| 164 | interrupt-parent = <&mpic>; |
| 165 | interrupts = <7 1>; |
| 166 | reg = <0x2>; |
| 167 | device_type = "ethernet-phy"; |
| 168 | }; |
| 169 | phy3: ethernet-phy@3 { |
| 170 | interrupt-parent = <&mpic>; |
| 171 | interrupts = <7 1>; |
| 172 | reg = <0x3>; |
| 173 | device_type = "ethernet-phy"; |
| 174 | }; |
| 175 | tbi0: tbi-phy@11 { |
| 176 | reg = <0x11>; |
| 177 | device_type = "tbi-phy"; |
| 178 | }; |
| 179 | }; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 180 | }; |
| 181 | |
Kumar Gala | e77b28e | 2007-12-12 00:28:35 -0600 | [diff] [blame] | 182 | enet1: ethernet@25000 { |
Anton Vorontsov | 84ba4a5 | 2009-03-19 21:01:48 +0300 | [diff] [blame] | 183 | #address-cells = <1>; |
| 184 | #size-cells = <1>; |
Kumar Gala | e77b28e | 2007-12-12 00:28:35 -0600 | [diff] [blame] | 185 | cell-index = <1>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 186 | device_type = "network"; |
| 187 | model = "TSEC"; |
| 188 | compatible = "gianfar"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 189 | reg = <0x25000 0x1000>; |
Anton Vorontsov | 84ba4a5 | 2009-03-19 21:01:48 +0300 | [diff] [blame] | 190 | ranges = <0x0 0x25000 0x1000>; |
Timur Tabi | eae9826 | 2007-06-22 14:33:15 -0500 | [diff] [blame] | 191 | local-mac-address = [ 00 00 00 00 00 00 ]; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 192 | interrupts = <35 2 36 2 40 2>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 193 | interrupt-parent = <&mpic>; |
Andy Fleming | b31a1d8 | 2008-12-16 15:29:15 -0800 | [diff] [blame] | 194 | tbi-handle = <&tbi1>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 195 | phy-handle = <&phy1>; |
Anton Vorontsov | 84ba4a5 | 2009-03-19 21:01:48 +0300 | [diff] [blame] | 196 | |
| 197 | mdio@520 { |
| 198 | #address-cells = <1>; |
| 199 | #size-cells = <0>; |
| 200 | compatible = "fsl,gianfar-tbi"; |
| 201 | reg = <0x520 0x20>; |
| 202 | |
| 203 | tbi1: tbi-phy@11 { |
| 204 | reg = <0x11>; |
| 205 | device_type = "tbi-phy"; |
| 206 | }; |
| 207 | }; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 208 | }; |
| 209 | |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 210 | mpic: pic@40000 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 211 | interrupt-controller; |
| 212 | #address-cells = <0>; |
| 213 | #interrupt-cells = <2>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 214 | reg = <0x40000 0x40000>; |
Kumar Gala | acd4b71 | 2008-05-30 12:12:26 -0500 | [diff] [blame] | 215 | compatible = "chrp,open-pic"; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 216 | device_type = "open-pic"; |
| 217 | }; |
| 218 | |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 219 | cpm@919c0 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 220 | #address-cells = <1>; |
| 221 | #size-cells = <1>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 222 | compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 223 | reg = <0x919c0 0x30>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 224 | ranges; |
| 225 | |
| 226 | muram@80000 { |
| 227 | #address-cells = <1>; |
| 228 | #size-cells = <1>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 229 | ranges = <0x0 0x80000 0x10000>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 230 | |
| 231 | data@0 { |
| 232 | compatible = "fsl,cpm-muram-data"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 233 | reg = <0x0 0x4000 0x9000 0x2000>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 234 | }; |
| 235 | }; |
| 236 | |
| 237 | brg@919f0 { |
| 238 | compatible = "fsl,mpc8560-brg", |
| 239 | "fsl,cpm2-brg", |
| 240 | "fsl,cpm-brg"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 241 | reg = <0x919f0 0x10 0x915f0 0x10>; |
| 242 | clock-frequency = <165000000>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 243 | }; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 244 | |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 245 | cpmpic: pic@90c00 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 246 | interrupt-controller; |
| 247 | #address-cells = <0>; |
| 248 | #interrupt-cells = <2>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 249 | interrupts = <46 2>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 250 | interrupt-parent = <&mpic>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 251 | reg = <0x90c00 0x80>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 252 | compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 253 | }; |
| 254 | |
Kumar Gala | ea082fa | 2007-12-12 01:46:12 -0600 | [diff] [blame] | 255 | serial0: serial@91a00 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 256 | device_type = "serial"; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 257 | compatible = "fsl,mpc8560-scc-uart", |
| 258 | "fsl,cpm2-scc-uart"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 259 | reg = <0x91a00 0x20 0x88000 0x100>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 260 | fsl,cpm-brg = <1>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 261 | fsl,cpm-command = <0x800000>; |
| 262 | current-speed = <115200>; |
| 263 | interrupts = <40 8>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 264 | interrupt-parent = <&cpmpic>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 265 | }; |
| 266 | |
Kumar Gala | ea082fa | 2007-12-12 01:46:12 -0600 | [diff] [blame] | 267 | serial1: serial@91a20 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 268 | device_type = "serial"; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 269 | compatible = "fsl,mpc8560-scc-uart", |
| 270 | "fsl,cpm2-scc-uart"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 271 | reg = <0x91a20 0x20 0x88100 0x100>; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 272 | fsl,cpm-brg = <2>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 273 | fsl,cpm-command = <0x4a00000>; |
| 274 | current-speed = <115200>; |
| 275 | interrupts = <41 8>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 276 | interrupt-parent = <&cpmpic>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 277 | }; |
| 278 | |
Kumar Gala | e77b28e | 2007-12-12 00:28:35 -0600 | [diff] [blame] | 279 | enet2: ethernet@91320 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 280 | device_type = "network"; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 281 | compatible = "fsl,mpc8560-fcc-enet", |
| 282 | "fsl,cpm2-fcc-enet"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 283 | reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; |
Timur Tabi | eae9826 | 2007-06-22 14:33:15 -0500 | [diff] [blame] | 284 | local-mac-address = [ 00 00 00 00 00 00 ]; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 285 | fsl,cpm-command = <0x16200300>; |
| 286 | interrupts = <33 8>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 287 | interrupt-parent = <&cpmpic>; |
| 288 | phy-handle = <&phy2>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 289 | }; |
| 290 | |
Kumar Gala | e77b28e | 2007-12-12 00:28:35 -0600 | [diff] [blame] | 291 | enet3: ethernet@91340 { |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 292 | device_type = "network"; |
Scott Wood | 8abc8f5 | 2007-10-08 16:08:51 -0500 | [diff] [blame] | 293 | compatible = "fsl,mpc8560-fcc-enet", |
| 294 | "fsl,cpm2-fcc-enet"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 295 | reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; |
Timur Tabi | eae9826 | 2007-06-22 14:33:15 -0500 | [diff] [blame] | 296 | local-mac-address = [ 00 00 00 00 00 00 ]; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 297 | fsl,cpm-command = <0x1a400300>; |
| 298 | interrupts = <34 8>; |
Kumar Gala | 5209487 | 2007-02-17 16:04:23 -0600 | [diff] [blame] | 299 | interrupt-parent = <&cpmpic>; |
| 300 | phy-handle = <&phy3>; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 301 | }; |
| 302 | }; |
| 303 | }; |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 304 | |
Kumar Gala | ea082fa | 2007-12-12 01:46:12 -0600 | [diff] [blame] | 305 | pci0: pci@e0008000 { |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 306 | #interrupt-cells = <1>; |
| 307 | #size-cells = <2>; |
| 308 | #address-cells = <3>; |
| 309 | compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; |
| 310 | device_type = "pci"; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 311 | reg = <0xe0008000 0x1000>; |
| 312 | clock-frequency = <66666666>; |
| 313 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 314 | interrupt-map = < |
| 315 | |
| 316 | /* IDSEL 0x2 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 317 | 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 |
| 318 | 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 |
| 319 | 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 |
| 320 | 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 321 | |
| 322 | /* IDSEL 0x3 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 323 | 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 |
| 324 | 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 |
| 325 | 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 |
| 326 | 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 327 | |
| 328 | /* IDSEL 0x4 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 329 | 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 |
| 330 | 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 |
| 331 | 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 |
| 332 | 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 333 | |
| 334 | /* IDSEL 0x5 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 335 | 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 |
| 336 | 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 |
| 337 | 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 |
| 338 | 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 339 | |
| 340 | /* IDSEL 12 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 341 | 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 |
| 342 | 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 |
| 343 | 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 |
| 344 | 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 345 | |
| 346 | /* IDSEL 13 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 347 | 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 |
| 348 | 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 |
| 349 | 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 |
| 350 | 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 351 | |
| 352 | /* IDSEL 14*/ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 353 | 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 |
| 354 | 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 |
| 355 | 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 |
| 356 | 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 357 | |
| 358 | /* IDSEL 15 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 359 | 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 |
| 360 | 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 |
| 361 | 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 |
| 362 | 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 363 | |
| 364 | /* IDSEL 18 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 365 | 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 |
| 366 | 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 |
| 367 | 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 |
| 368 | 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 369 | |
| 370 | /* IDSEL 19 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 371 | 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 |
| 372 | 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 |
| 373 | 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 |
| 374 | 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 375 | |
| 376 | /* IDSEL 20 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 377 | 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 |
| 378 | 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 |
| 379 | 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 |
| 380 | 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 381 | |
| 382 | /* IDSEL 21 */ |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 383 | 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 |
| 384 | 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 |
| 385 | 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 |
| 386 | 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 387 | |
| 388 | interrupt-parent = <&mpic>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 389 | interrupts = <24 2>; |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 390 | bus-range = <0 0>; |
Kumar Gala | 32f960e | 2008-04-17 01:28:15 -0500 | [diff] [blame] | 391 | ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 |
| 392 | 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>; |
Kumar Gala | 1b3c5cda | 2007-09-12 18:23:46 -0500 | [diff] [blame] | 393 | }; |
Vitaly Bordug | 902f392 | 2006-09-21 22:31:26 +0400 | [diff] [blame] | 394 | }; |