blob: d9bf96ee299acc88181f003b1eff5dc226f7ced4 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include "radeon_drv.h"
35
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drm_pciids.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020037#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040038#include <linux/module.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020039
40
Jerome Glisse771fe6b2009-06-05 14:42:42 +020041/*
42 * KMS wrapper.
Dave Airlie0de1a572010-03-01 16:32:15 +100043 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
Alex Deucherfdb43522010-03-26 15:24:14 -040045 * - 2.2.0 - add r6xx/r7xx const buffer support
Marek Olšákcae94b02010-02-21 21:24:15 +010046 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
Jerome Glissebc35afd2010-05-12 18:01:13 +020047 * - 2.4.0 - add crtc id query
Alex Deucher148a03b2010-06-03 19:00:03 -040048 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
Dave Airlieab9e1f52010-07-13 11:11:11 +100049 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
Alex Deucher71901cc2010-10-21 13:45:30 -040050 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
Alex Deucher58bbf012011-01-24 17:14:26 -050051 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
Dave Airlie486af182011-03-01 14:32:27 +100052 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
Alex Deucherb8709892011-07-27 04:17:25 +000053 * 2.10.0 - fusion 2D tiling
54 * 2.11.0 - backend map, initial compute support for the CS checker
Marek Olšáke70f2242011-10-25 01:38:45 +020055 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
Marek Olšákdd220a02012-01-27 12:17:59 -050056 * 2.13.0 - virtual memory support, streamout
Jerome Glisse285484e2011-12-16 17:03:42 -050057 * 2.14.0 - add evergreen tiling informations
Tom Stellard609c1e12012-03-20 17:17:55 -040058 * 2.15.0 - add max_pipes query
Jerome Glissed2609872012-06-09 10:57:41 -040059 * 2.16.0 - fix evergreen 2D tiled surface calculation
Alex Deucher7c77bf22012-06-14 22:06:37 +020060 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
Marek Olšák0f457e42012-07-29 16:24:57 +020061 * 2.18.0 - r600-eg: allow "invalid" DB formats
Marek Olšákb51ad122012-08-09 16:34:16 +020062 * 2.19.0 - r600-eg: MSAA textures
Marek Olšák6759a0a2012-08-09 16:34:17 +020063 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
Marek Olšákc116cc92012-08-19 02:22:09 +020064 * 2.21.0 - r600-r700: FMASK and CMASK
Marek Olšák523885d2012-08-24 14:27:36 +020065 * 2.22.0 - r600 only: RESOLVE_BOX allowed
Marek Olšák46fc8782012-09-25 01:45:33 +020066 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
Marek Olšák61051af2012-09-25 03:34:01 +020067 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
Alex Deucher71bfe912012-12-07 20:00:30 -050068 * 2.25.0 - eg+: new info request for num SE and num SH
Jerome Glisse4ac05332012-12-13 12:08:11 -050069 * 2.26.0 - r600-eg: fix htile size computation
Alex Deucher8696e332012-12-13 18:57:07 -050070 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
Jerome Glisse4613ca12012-12-19 12:26:45 -050071 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
Marek Olšákc18b1172013-01-12 04:19:37 +010072 * 2.29.0 - R500 FP16 color clear registers
Jerome Glisse771fe6b2009-06-05 14:42:42 +020073 */
74#define KMS_DRIVER_MAJOR 2
Marek Olšákc18b1172013-01-12 04:19:37 +010075#define KMS_DRIVER_MINOR 29
Jerome Glisse771fe6b2009-06-05 14:42:42 +020076#define KMS_DRIVER_PATCHLEVEL 0
77int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
78int radeon_driver_unload_kms(struct drm_device *dev);
79int radeon_driver_firstopen_kms(struct drm_device *dev);
80void radeon_driver_lastclose_kms(struct drm_device *dev);
81int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
82void radeon_driver_postclose_kms(struct drm_device *dev,
83 struct drm_file *file_priv);
84void radeon_driver_preclose_kms(struct drm_device *dev,
85 struct drm_file *file_priv);
86int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
87int radeon_resume_kms(struct drm_device *dev);
88u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
89int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
90void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
Mario Kleinerf5a80202010-10-23 04:42:17 +020091int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
92 int *max_error,
93 struct timeval *vblank_time,
94 unsigned flags);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020095void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
96int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
97void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
98irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020099int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
100 struct drm_file *file_priv);
101int radeon_gem_object_init(struct drm_gem_object *obj);
102void radeon_gem_object_free(struct drm_gem_object *obj);
Jerome Glisse721604a2012-01-05 22:11:05 -0500103int radeon_gem_object_open(struct drm_gem_object *obj,
104 struct drm_file *file_priv);
105void radeon_gem_object_close(struct drm_gem_object *obj,
106 struct drm_file *file_priv);
Mario Kleinerf5a80202010-10-23 04:42:17 +0200107extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
108 int *vpos, int *hpos);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200109extern struct drm_ioctl_desc radeon_ioctls_kms[];
110extern int radeon_max_kms_ioctl;
111int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
Dave Airlieff72145b2011-02-07 12:16:14 +1000112int radeon_mode_dumb_mmap(struct drm_file *filp,
113 struct drm_device *dev,
114 uint32_t handle, uint64_t *offset_p);
115int radeon_mode_dumb_create(struct drm_file *file_priv,
116 struct drm_device *dev,
117 struct drm_mode_create_dumb *args);
118int radeon_mode_dumb_destroy(struct drm_file *file_priv,
119 struct drm_device *dev,
120 uint32_t handle);
Alex Deucher40f5cf92012-05-10 18:33:13 -0400121struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
122 struct drm_gem_object *obj,
123 int flags);
124struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
125 struct dma_buf *dma_buf);
Dave Airlieff72145b2011-02-07 12:16:14 +1000126
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200127#if defined(CONFIG_DEBUG_FS)
128int radeon_debugfs_init(struct drm_minor *minor);
129void radeon_debugfs_cleanup(struct drm_minor *minor);
130#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200131
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132
Dave Airlie689b9d72005-09-30 17:09:07 +1000133int radeon_no_wb;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200134int radeon_modeset = -1;
135int radeon_dynclks = -1;
136int radeon_r4xx_atom = 0;
137int radeon_agpmode = 0;
138int radeon_vram_limit = 0;
139int radeon_gart_size = 512; /* default gart size */
140int radeon_benchmarking = 0;
Michel Dänzerecc0b322009-07-21 11:23:57 +0200141int radeon_testing = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200142int radeon_connector_table = 0;
Dave Airlie4ce001a2009-08-13 16:32:14 +1000143int radeon_tv = 1;
Alex Deucher805c2212011-06-06 17:39:16 -0400144int radeon_audio = 0;
Alex Deucherf46c0122010-03-31 00:33:27 -0400145int radeon_disp_priority = 0;
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400146int radeon_hw_i2c = 0;
Dave Airlie197bbb32012-06-27 08:35:54 +0100147int radeon_pcie_gen2 = -1;
Alex Deuchera18cee12011-11-01 14:20:30 -0400148int radeon_msi = -1;
Christian König3368ff02012-05-02 15:11:21 +0200149int radeon_lockup_timeout = 10000;
Dave Airlie689b9d72005-09-30 17:09:07 +1000150
Niels de Vos61a2d072008-07-31 00:07:23 -0700151MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
Dave Airlie689b9d72005-09-30 17:09:07 +1000152module_param_named(no_wb, radeon_no_wb, int, 0444);
153
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200154MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
155module_param_named(modeset, radeon_modeset, int, 0400);
156
157MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
158module_param_named(dynclks, radeon_dynclks, int, 0444);
159
160MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
161module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
162
163MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
164module_param_named(vramlimit, radeon_vram_limit, int, 0600);
165
166MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
167module_param_named(agpmode, radeon_agpmode, int, 0444);
168
Jean Delvare27d4d052011-11-30 17:22:55 +0100169MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200170module_param_named(gartsize, radeon_gart_size, int, 0600);
171
172MODULE_PARM_DESC(benchmark, "Run benchmark");
173module_param_named(benchmark, radeon_benchmarking, int, 0444);
174
Michel Dänzerecc0b322009-07-21 11:23:57 +0200175MODULE_PARM_DESC(test, "Run tests");
176module_param_named(test, radeon_testing, int, 0444);
177
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200178MODULE_PARM_DESC(connector_table, "Force connector table");
179module_param_named(connector_table, radeon_connector_table, int, 0444);
Dave Airlie4ce001a2009-08-13 16:32:14 +1000180
181MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
182module_param_named(tv, radeon_tv, int, 0444);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200183
Alex Deucher805c2212011-06-06 17:39:16 -0400184MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200185module_param_named(audio, radeon_audio, int, 0444);
186
Alex Deucherf46c0122010-03-31 00:33:27 -0400187MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
188module_param_named(disp_priority, radeon_disp_priority, int, 0444);
189
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400190MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
191module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
192
Dave Airlie197bbb32012-06-27 08:35:54 +0100193MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
Alex Deucherd42dd572011-01-12 20:05:11 -0500194module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
195
Alex Deuchera18cee12011-11-01 14:20:30 -0400196MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
197module_param_named(msi, radeon_msi, int, 0444);
198
Christian König3368ff02012-05-02 15:11:21 +0200199MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
200module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
201
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700202static int radeon_suspend(struct drm_device *dev, pm_message_t state)
203{
204 drm_radeon_private_t *dev_priv = dev->dev_private;
205
Dave Airlie03efb882009-03-10 18:36:38 +1000206 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
207 return 0;
208
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700209 /* Disable *all* interrupts */
Alex Deucher800b6992009-03-06 11:47:54 -0500210 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700211 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
212 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
213 return 0;
214}
215
216static int radeon_resume(struct drm_device *dev)
217{
218 drm_radeon_private_t *dev_priv = dev->dev_private;
219
Dave Airlie03efb882009-03-10 18:36:38 +1000220 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
221 return 0;
222
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700223 /* Restore interrupt registers */
Alex Deucher800b6992009-03-06 11:47:54 -0500224 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700225 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
226 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
227 return 0;
228}
229
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230static struct pci_device_id pciidlist[] = {
231 radeon_PCI_IDS
232};
233
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200234#if defined(CONFIG_DRM_RADEON_KMS)
235MODULE_DEVICE_TABLE(pci, pciidlist);
236#endif
237
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700238static const struct file_operations radeon_driver_old_fops = {
239 .owner = THIS_MODULE,
240 .open = drm_open,
241 .release = drm_release,
242 .unlocked_ioctl = drm_ioctl,
243 .mmap = drm_mmap,
244 .poll = drm_poll,
245 .fasync = drm_fasync,
246 .read = drm_read,
247#ifdef CONFIG_COMPAT
248 .compat_ioctl = radeon_compat_ioctl,
249#endif
250 .llseek = noop_llseek,
251};
252
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200253static struct drm_driver driver_old = {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000254 .driver_features =
255 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700256 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
Dave Airlie22eae942005-11-10 22:16:34 +1100258 .load = radeon_driver_load,
259 .firstopen = radeon_driver_firstopen,
260 .open = radeon_driver_open,
261 .preclose = radeon_driver_preclose,
262 .postclose = radeon_driver_postclose,
263 .lastclose = radeon_driver_lastclose,
264 .unload = radeon_driver_unload,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700265 .suspend = radeon_suspend,
266 .resume = radeon_resume,
267 .get_vblank_counter = radeon_get_vblank_counter,
268 .enable_vblank = radeon_enable_vblank,
269 .disable_vblank = radeon_disable_vblank,
Dave Airlie60f2ee02008-12-19 10:22:02 +1100270 .master_create = radeon_master_create,
271 .master_destroy = radeon_master_destroy,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272 .irq_preinstall = radeon_driver_irq_preinstall,
273 .irq_postinstall = radeon_driver_irq_postinstall,
274 .irq_uninstall = radeon_driver_irq_uninstall,
275 .irq_handler = radeon_driver_irq_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 .ioctls = radeon_ioctls,
277 .dma_ioctl = radeon_cp_buffers,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700278 .fops = &radeon_driver_old_fops,
Dave Airlie22eae942005-11-10 22:16:34 +1100279 .name = DRIVER_NAME,
280 .desc = DRIVER_DESC,
281 .date = DRIVER_DATE,
282 .major = DRIVER_MAJOR,
283 .minor = DRIVER_MINOR,
284 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285};
286
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200287static struct drm_driver kms_driver;
288
Tommi Rantala30238152012-11-09 09:19:39 +0000289static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000290{
291 struct apertures_struct *ap;
292 bool primary = false;
293
294 ap = alloc_apertures(1);
Tommi Rantala30238152012-11-09 09:19:39 +0000295 if (!ap)
296 return -ENOMEM;
297
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000298 ap->ranges[0].base = pci_resource_start(pdev, 0);
299 ap->ranges[0].size = pci_resource_len(pdev, 0);
300
301#ifdef CONFIG_X86
302 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
303#endif
304 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
305 kfree(ap);
Tommi Rantala30238152012-11-09 09:19:39 +0000306
307 return 0;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000308}
309
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800310static int radeon_pci_probe(struct pci_dev *pdev,
311 const struct pci_device_id *ent)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200312{
Tommi Rantala30238152012-11-09 09:19:39 +0000313 int ret;
314
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000315 /* Get rid of things like offb */
Tommi Rantala30238152012-11-09 09:19:39 +0000316 ret = radeon_kick_out_firmware_fb(pdev);
317 if (ret)
318 return ret;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000319
Jordan Crousedcdb1672010-05-27 13:40:25 -0600320 return drm_get_pci_dev(pdev, ent, &kms_driver);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200321}
322
323static void
324radeon_pci_remove(struct pci_dev *pdev)
325{
326 struct drm_device *dev = pci_get_drvdata(pdev);
327
328 drm_put_dev(dev);
329}
330
331static int
332radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
333{
334 struct drm_device *dev = pci_get_drvdata(pdev);
335 return radeon_suspend_kms(dev, state);
336}
337
338static int
339radeon_pci_resume(struct pci_dev *pdev)
340{
341 struct drm_device *dev = pci_get_drvdata(pdev);
342 return radeon_resume_kms(dev);
343}
344
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700345static const struct file_operations radeon_driver_kms_fops = {
346 .owner = THIS_MODULE,
347 .open = drm_open,
348 .release = drm_release,
349 .unlocked_ioctl = drm_ioctl,
350 .mmap = radeon_mmap,
351 .poll = drm_poll,
352 .fasync = drm_fasync,
353 .read = drm_read,
354#ifdef CONFIG_COMPAT
355 .compat_ioctl = radeon_kms_compat_ioctl,
356#endif
357};
358
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200359static struct drm_driver kms_driver = {
360 .driver_features =
361 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
Alex Deucher40f5cf92012-05-10 18:33:13 -0400362 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
363 DRIVER_PRIME,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200364 .dev_priv_size = 0,
365 .load = radeon_driver_load_kms,
366 .firstopen = radeon_driver_firstopen_kms,
367 .open = radeon_driver_open_kms,
368 .preclose = radeon_driver_preclose_kms,
369 .postclose = radeon_driver_postclose_kms,
370 .lastclose = radeon_driver_lastclose_kms,
371 .unload = radeon_driver_unload_kms,
372 .suspend = radeon_suspend_kms,
373 .resume = radeon_resume_kms,
374 .get_vblank_counter = radeon_get_vblank_counter_kms,
375 .enable_vblank = radeon_enable_vblank_kms,
376 .disable_vblank = radeon_disable_vblank_kms,
Mario Kleinerf5a80202010-10-23 04:42:17 +0200377 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
378 .get_scanout_position = radeon_get_crtc_scanoutpos,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200379#if defined(CONFIG_DEBUG_FS)
380 .debugfs_init = radeon_debugfs_init,
381 .debugfs_cleanup = radeon_debugfs_cleanup,
382#endif
383 .irq_preinstall = radeon_driver_irq_preinstall_kms,
384 .irq_postinstall = radeon_driver_irq_postinstall_kms,
385 .irq_uninstall = radeon_driver_irq_uninstall_kms,
386 .irq_handler = radeon_driver_irq_handler_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200387 .ioctls = radeon_ioctls_kms,
388 .gem_init_object = radeon_gem_object_init,
389 .gem_free_object = radeon_gem_object_free,
Jerome Glisse721604a2012-01-05 22:11:05 -0500390 .gem_open_object = radeon_gem_object_open,
391 .gem_close_object = radeon_gem_object_close,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200392 .dma_ioctl = radeon_dma_ioctl_kms,
Dave Airlieff72145b2011-02-07 12:16:14 +1000393 .dumb_create = radeon_mode_dumb_create,
394 .dumb_map_offset = radeon_mode_dumb_mmap,
395 .dumb_destroy = radeon_mode_dumb_destroy,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700396 .fops = &radeon_driver_kms_fops,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400397
398 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
399 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
400 .gem_prime_export = radeon_gem_prime_export,
401 .gem_prime_import = radeon_gem_prime_import,
402
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200403 .name = DRIVER_NAME,
404 .desc = DRIVER_DESC,
405 .date = DRIVER_DATE,
406 .major = KMS_DRIVER_MAJOR,
407 .minor = KMS_DRIVER_MINOR,
408 .patchlevel = KMS_DRIVER_PATCHLEVEL,
409};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200410
411static struct drm_driver *driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000412static struct pci_driver *pdriver;
413
414static struct pci_driver radeon_pci_driver = {
415 .name = DRIVER_NAME,
416 .id_table = pciidlist,
417};
418
419static struct pci_driver radeon_kms_pci_driver = {
420 .name = DRIVER_NAME,
421 .id_table = pciidlist,
422 .probe = radeon_pci_probe,
423 .remove = radeon_pci_remove,
424 .suspend = radeon_pci_suspend,
425 .resume = radeon_pci_resume,
426};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200427
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428static int __init radeon_init(void)
429{
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200430 driver = &driver_old;
Dave Airlie8410ea32010-12-15 03:16:38 +1000431 pdriver = &radeon_pci_driver;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200432 driver->num_ioctls = radeon_max_ioctl;
Dave Airliede050652009-08-03 12:05:34 +1000433#ifdef CONFIG_VGA_CONSOLE
434 if (vgacon_text_force() && radeon_modeset == -1) {
435 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
436 driver = &driver_old;
Dave Airlie8410ea32010-12-15 03:16:38 +1000437 pdriver = &radeon_pci_driver;
Dave Airliede050652009-08-03 12:05:34 +1000438 driver->driver_features &= ~DRIVER_MODESET;
439 radeon_modeset = 0;
440 }
441#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200442 /* if enabled by default */
443 if (radeon_modeset == -1) {
Dave Airliea0cdc642009-09-08 11:09:50 +1000444#ifdef CONFIG_DRM_RADEON_KMS
445 DRM_INFO("radeon defaulting to kernel modesetting.\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200446 radeon_modeset = 1;
Dave Airliea0cdc642009-09-08 11:09:50 +1000447#else
448 DRM_INFO("radeon defaulting to userspace modesetting.\n");
449 radeon_modeset = 0;
450#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200451 }
452 if (radeon_modeset == 1) {
453 DRM_INFO("radeon kernel modesetting enabled.\n");
454 driver = &kms_driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000455 pdriver = &radeon_kms_pci_driver;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200456 driver->driver_features |= DRIVER_MODESET;
457 driver->num_ioctls = radeon_max_kms_ioctl;
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000458 radeon_register_atpx_handler();
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200459 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200460 /* if the vga console setting is enabled still
461 * let modprobe override it */
Dave Airlie8410ea32010-12-15 03:16:38 +1000462 return drm_pci_init(driver, pdriver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463}
464
465static void __exit radeon_exit(void)
466{
Dave Airlie8410ea32010-12-15 03:16:38 +1000467 drm_pci_exit(driver, pdriver);
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000468 radeon_unregister_atpx_handler();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469}
470
Jerome Glisse176f6132009-06-22 18:16:13 +0200471module_init(radeon_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472module_exit(radeon_exit);
473
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000474MODULE_AUTHOR(DRIVER_AUTHOR);
475MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476MODULE_LICENSE("GPL and additional rights");