Keith Packard | a4fc5ed | 2009-04-07 16:16:42 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2009 Keith Packard |
| 3 | * |
| 4 | * Permission to use, copy, modify, distribute, and sell this software and its |
| 5 | * documentation for any purpose is hereby granted without fee, provided that |
| 6 | * the above copyright notice appear in all copies and that both that copyright |
| 7 | * notice and this permission notice appear in supporting documentation, and |
| 8 | * that the name of the copyright holders not be used in advertising or |
| 9 | * publicity pertaining to distribution of the software without specific, |
| 10 | * written prior permission. The copyright holders make no representations |
| 11 | * about the suitability of this software for any purpose. It is provided "as |
| 12 | * is" without express or implied warranty. |
| 13 | * |
| 14 | * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, |
| 15 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO |
| 16 | * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR |
| 17 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, |
| 18 | * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 19 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE |
| 20 | * OF THIS SOFTWARE. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/delay.h> |
Keith Packard | a4fc5ed | 2009-04-07 16:16:42 -0700 | [diff] [blame] | 26 | #include <linux/init.h> |
| 27 | #include <linux/errno.h> |
| 28 | #include <linux/sched.h> |
| 29 | #include <linux/i2c.h> |
Jani Nikula | 96106c9 | 2016-09-16 13:06:36 +0300 | [diff] [blame] | 30 | #include <linux/seq_file.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 31 | #include <drm/drm_dp_helper.h> |
| 32 | #include <drm/drmP.h> |
Keith Packard | a4fc5ed | 2009-04-07 16:16:42 -0700 | [diff] [blame] | 33 | |
Daniel Vetter | e15c8f4 | 2016-08-12 22:48:52 +0200 | [diff] [blame] | 34 | #include "drm_crtc_helper_internal.h" |
| 35 | |
Daniel Vetter | 28164fd | 2012-11-01 14:45:18 +0100 | [diff] [blame] | 36 | /** |
| 37 | * DOC: dp helpers |
| 38 | * |
| 39 | * These functions contain some common logic and helpers at various abstraction |
| 40 | * levels to deal with Display Port sink devices and related things like DP aux |
| 41 | * channel transfers, EDID reading over DP aux channels, decoding certain DPCD |
| 42 | * blocks, ... |
| 43 | */ |
| 44 | |
Daniel Vetter | 1ffdff1 | 2012-10-18 10:15:24 +0200 | [diff] [blame] | 45 | /* Helpers for DP link training */ |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 46 | static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) |
Daniel Vetter | 1ffdff1 | 2012-10-18 10:15:24 +0200 | [diff] [blame] | 47 | { |
| 48 | return link_status[r - DP_LANE0_1_STATUS]; |
| 49 | } |
| 50 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 51 | static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], |
Daniel Vetter | 1ffdff1 | 2012-10-18 10:15:24 +0200 | [diff] [blame] | 52 | int lane) |
| 53 | { |
| 54 | int i = DP_LANE0_1_STATUS + (lane >> 1); |
| 55 | int s = (lane & 1) * 4; |
| 56 | u8 l = dp_link_status(link_status, i); |
| 57 | return (l >> s) & 0xf; |
| 58 | } |
| 59 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 60 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
Daniel Vetter | 1ffdff1 | 2012-10-18 10:15:24 +0200 | [diff] [blame] | 61 | int lane_count) |
| 62 | { |
| 63 | u8 lane_align; |
| 64 | u8 lane_status; |
| 65 | int lane; |
| 66 | |
| 67 | lane_align = dp_link_status(link_status, |
| 68 | DP_LANE_ALIGN_STATUS_UPDATED); |
| 69 | if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0) |
| 70 | return false; |
| 71 | for (lane = 0; lane < lane_count; lane++) { |
| 72 | lane_status = dp_get_lane_status(link_status, lane); |
| 73 | if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS) |
| 74 | return false; |
| 75 | } |
| 76 | return true; |
| 77 | } |
| 78 | EXPORT_SYMBOL(drm_dp_channel_eq_ok); |
| 79 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 80 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
Daniel Vetter | 1ffdff1 | 2012-10-18 10:15:24 +0200 | [diff] [blame] | 81 | int lane_count) |
| 82 | { |
| 83 | int lane; |
| 84 | u8 lane_status; |
| 85 | |
| 86 | for (lane = 0; lane < lane_count; lane++) { |
| 87 | lane_status = dp_get_lane_status(link_status, lane); |
| 88 | if ((lane_status & DP_LANE_CR_DONE) == 0) |
| 89 | return false; |
| 90 | } |
| 91 | return true; |
| 92 | } |
| 93 | EXPORT_SYMBOL(drm_dp_clock_recovery_ok); |
Daniel Vetter | 0f037bd | 2012-10-18 10:15:27 +0200 | [diff] [blame] | 94 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 95 | u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], |
Daniel Vetter | 0f037bd | 2012-10-18 10:15:27 +0200 | [diff] [blame] | 96 | int lane) |
| 97 | { |
| 98 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
| 99 | int s = ((lane & 1) ? |
| 100 | DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : |
| 101 | DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT); |
| 102 | u8 l = dp_link_status(link_status, i); |
| 103 | |
| 104 | return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT; |
| 105 | } |
| 106 | EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); |
| 107 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 108 | u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], |
Daniel Vetter | 0f037bd | 2012-10-18 10:15:27 +0200 | [diff] [blame] | 109 | int lane) |
| 110 | { |
| 111 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
| 112 | int s = ((lane & 1) ? |
| 113 | DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT : |
| 114 | DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT); |
| 115 | u8 l = dp_link_status(link_status, i); |
| 116 | |
| 117 | return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT; |
| 118 | } |
| 119 | EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); |
| 120 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 121 | void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
Daniel Vetter | 1a644cd | 2012-10-18 15:32:40 +0200 | [diff] [blame] | 122 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
| 123 | udelay(100); |
| 124 | else |
| 125 | mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); |
| 126 | } |
| 127 | EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); |
| 128 | |
Jani Nikula | 0aec288 | 2013-09-27 19:01:01 +0300 | [diff] [blame] | 129 | void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
Daniel Vetter | 1a644cd | 2012-10-18 15:32:40 +0200 | [diff] [blame] | 130 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
| 131 | udelay(400); |
| 132 | else |
| 133 | mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); |
| 134 | } |
| 135 | EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); |
Daniel Vetter | 3b5c662 | 2012-10-18 10:15:31 +0200 | [diff] [blame] | 136 | |
| 137 | u8 drm_dp_link_rate_to_bw_code(int link_rate) |
| 138 | { |
| 139 | switch (link_rate) { |
| 140 | case 162000: |
| 141 | default: |
| 142 | return DP_LINK_BW_1_62; |
| 143 | case 270000: |
| 144 | return DP_LINK_BW_2_7; |
| 145 | case 540000: |
| 146 | return DP_LINK_BW_5_4; |
| 147 | } |
| 148 | } |
| 149 | EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); |
| 150 | |
| 151 | int drm_dp_bw_code_to_link_rate(u8 link_bw) |
| 152 | { |
| 153 | switch (link_bw) { |
| 154 | case DP_LINK_BW_1_62: |
| 155 | default: |
| 156 | return 162000; |
| 157 | case DP_LINK_BW_2_7: |
| 158 | return 270000; |
| 159 | case DP_LINK_BW_5_4: |
| 160 | return 540000; |
| 161 | } |
| 162 | } |
| 163 | EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 164 | |
Ville Syrjälä | 79a2b16 | 2015-08-26 22:55:05 +0300 | [diff] [blame] | 165 | #define AUX_RETRY_INTERVAL 500 /* us */ |
| 166 | |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 167 | /** |
| 168 | * DOC: dp helpers |
| 169 | * |
| 170 | * The DisplayPort AUX channel is an abstraction to allow generic, driver- |
| 171 | * independent access to AUX functionality. Drivers can take advantage of |
| 172 | * this by filling in the fields of the drm_dp_aux structure. |
| 173 | * |
| 174 | * Transactions are described using a hardware-independent drm_dp_aux_msg |
| 175 | * structure, which is passed into a driver's .transfer() implementation. |
| 176 | * Both native and I2C-over-AUX transactions are supported. |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 177 | */ |
| 178 | |
| 179 | static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, |
| 180 | unsigned int offset, void *buffer, size_t size) |
| 181 | { |
| 182 | struct drm_dp_aux_msg msg; |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 183 | unsigned int retry, native_reply; |
| 184 | int err = 0, ret = 0; |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 185 | |
| 186 | memset(&msg, 0, sizeof(msg)); |
| 187 | msg.address = offset; |
| 188 | msg.request = request; |
| 189 | msg.buffer = buffer; |
| 190 | msg.size = size; |
| 191 | |
Rob Clark | 7779c5e | 2016-02-25 16:15:05 -0500 | [diff] [blame] | 192 | mutex_lock(&aux->hw_mutex); |
| 193 | |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 194 | /* |
| 195 | * The specification doesn't give any recommendation on how often to |
Dave Airlie | 19a93f0 | 2014-11-26 13:13:09 +1000 | [diff] [blame] | 196 | * retry native transactions. We used to retry 7 times like for |
| 197 | * aux i2c transactions but real world devices this wasn't |
| 198 | * sufficient, bump to 32 which makes Dell 4k monitors happier. |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 199 | */ |
Dave Airlie | 19a93f0 | 2014-11-26 13:13:09 +1000 | [diff] [blame] | 200 | for (retry = 0; retry < 32; retry++) { |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 201 | if (ret != 0 && ret != -ETIMEDOUT) { |
Lyude | e1083ff | 2016-04-13 10:58:30 -0400 | [diff] [blame] | 202 | usleep_range(AUX_RETRY_INTERVAL, |
| 203 | AUX_RETRY_INTERVAL + 100); |
| 204 | } |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 205 | |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 206 | ret = aux->transfer(aux, &msg); |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 207 | |
Ville Syrjälä | a1f5524 | 2016-07-28 17:54:42 +0300 | [diff] [blame] | 208 | if (ret >= 0) { |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 209 | native_reply = msg.reply & DP_AUX_NATIVE_REPLY_MASK; |
| 210 | if (native_reply == DP_AUX_NATIVE_REPLY_ACK) { |
| 211 | if (ret == size) |
| 212 | goto unlock; |
| 213 | |
| 214 | ret = -EPROTO; |
| 215 | } else |
| 216 | ret = -EIO; |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 217 | } |
| 218 | |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 219 | /* |
| 220 | * We want the error we return to be the error we received on |
| 221 | * the first transaction, since we may get a different error the |
| 222 | * next time we retry |
| 223 | */ |
| 224 | if (!err) |
| 225 | err = ret; |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 226 | } |
| 227 | |
Lyude | 29f21e0 | 2016-08-05 20:30:33 -0400 | [diff] [blame] | 228 | DRM_DEBUG_KMS("Too many retries, giving up. First error: %d\n", err); |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 229 | ret = err; |
Rob Clark | 7779c5e | 2016-02-25 16:15:05 -0500 | [diff] [blame] | 230 | |
| 231 | unlock: |
| 232 | mutex_unlock(&aux->hw_mutex); |
Lyude | 82922da | 2016-04-13 10:58:31 -0400 | [diff] [blame] | 233 | return ret; |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 234 | } |
| 235 | |
| 236 | /** |
| 237 | * drm_dp_dpcd_read() - read a series of bytes from the DPCD |
| 238 | * @aux: DisplayPort AUX channel |
| 239 | * @offset: address of the (first) register to read |
| 240 | * @buffer: buffer to store the register values |
| 241 | * @size: number of bytes in @buffer |
| 242 | * |
| 243 | * Returns the number of bytes transferred on success, or a negative error |
| 244 | * code on failure. -EIO is returned if the request was NAKed by the sink or |
| 245 | * if the retry count was exceeded. If not all bytes were transferred, this |
| 246 | * function returns -EPROTO. Errors from the underlying AUX channel transfer |
| 247 | * function, with the exception of -EBUSY (which causes the transaction to |
| 248 | * be retried), are propagated to the caller. |
| 249 | */ |
| 250 | ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, |
| 251 | void *buffer, size_t size) |
| 252 | { |
Lyude | f808f63 | 2016-04-15 10:25:35 -0400 | [diff] [blame] | 253 | int ret; |
| 254 | |
| 255 | /* |
| 256 | * HP ZR24w corrupts the first DPCD access after entering power save |
| 257 | * mode. Eg. on a read, the entire buffer will be filled with the same |
| 258 | * byte. Do a throw away read to avoid corrupting anything we care |
| 259 | * about. Afterwards things will work correctly until the monitor |
| 260 | * gets woken up and subsequently re-enters power save mode. |
| 261 | * |
| 262 | * The user pressing any button on the monitor is enough to wake it |
| 263 | * up, so there is no particularly good place to do the workaround. |
| 264 | * We just have to do it before any DPCD access and hope that the |
| 265 | * monitor doesn't power down exactly after the throw away read. |
| 266 | */ |
| 267 | ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, DP_DPCD_REV, buffer, |
| 268 | 1); |
| 269 | if (ret != 1) |
| 270 | return ret; |
| 271 | |
Thierry Reding | c197db7 | 2013-11-28 11:31:00 +0100 | [diff] [blame] | 272 | return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer, |
| 273 | size); |
| 274 | } |
| 275 | EXPORT_SYMBOL(drm_dp_dpcd_read); |
| 276 | |
| 277 | /** |
| 278 | * drm_dp_dpcd_write() - write a series of bytes to the DPCD |
| 279 | * @aux: DisplayPort AUX channel |
| 280 | * @offset: address of the (first) register to write |
| 281 | * @buffer: buffer containing the values to write |
| 282 | * @size: number of bytes in @buffer |
| 283 | * |
| 284 | * Returns the number of bytes transferred on success, or a negative error |
| 285 | * code on failure. -EIO is returned if the request was NAKed by the sink or |
| 286 | * if the retry count was exceeded. If not all bytes were transferred, this |
| 287 | * function returns -EPROTO. Errors from the underlying AUX channel transfer |
| 288 | * function, with the exception of -EBUSY (which causes the transaction to |
| 289 | * be retried), are propagated to the caller. |
| 290 | */ |
| 291 | ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, |
| 292 | void *buffer, size_t size) |
| 293 | { |
| 294 | return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, |
| 295 | size); |
| 296 | } |
| 297 | EXPORT_SYMBOL(drm_dp_dpcd_write); |
Thierry Reding | 8d4adc6 | 2013-11-22 16:37:57 +0100 | [diff] [blame] | 298 | |
| 299 | /** |
| 300 | * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207) |
| 301 | * @aux: DisplayPort AUX channel |
| 302 | * @status: buffer to store the link status in (must be at least 6 bytes) |
| 303 | * |
| 304 | * Returns the number of bytes transferred on success or a negative error |
| 305 | * code on failure. |
| 306 | */ |
| 307 | int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, |
| 308 | u8 status[DP_LINK_STATUS_SIZE]) |
| 309 | { |
| 310 | return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status, |
| 311 | DP_LINK_STATUS_SIZE); |
| 312 | } |
| 313 | EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); |
Thierry Reding | 516c0f7 | 2013-12-09 11:47:55 +0100 | [diff] [blame] | 314 | |
| 315 | /** |
| 316 | * drm_dp_link_probe() - probe a DisplayPort link for capabilities |
| 317 | * @aux: DisplayPort AUX channel |
| 318 | * @link: pointer to structure in which to return link capabilities |
| 319 | * |
| 320 | * The structure filled in by this function can usually be passed directly |
| 321 | * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and |
| 322 | * configure the link based on the link's capabilities. |
| 323 | * |
| 324 | * Returns 0 on success or a negative error code on failure. |
| 325 | */ |
| 326 | int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) |
| 327 | { |
| 328 | u8 values[3]; |
| 329 | int err; |
| 330 | |
| 331 | memset(link, 0, sizeof(*link)); |
| 332 | |
| 333 | err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values)); |
| 334 | if (err < 0) |
| 335 | return err; |
| 336 | |
| 337 | link->revision = values[0]; |
| 338 | link->rate = drm_dp_bw_code_to_link_rate(values[1]); |
| 339 | link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; |
| 340 | |
| 341 | if (values[2] & DP_ENHANCED_FRAME_CAP) |
| 342 | link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; |
| 343 | |
| 344 | return 0; |
| 345 | } |
| 346 | EXPORT_SYMBOL(drm_dp_link_probe); |
| 347 | |
| 348 | /** |
| 349 | * drm_dp_link_power_up() - power up a DisplayPort link |
| 350 | * @aux: DisplayPort AUX channel |
| 351 | * @link: pointer to a structure containing the link configuration |
| 352 | * |
| 353 | * Returns 0 on success or a negative error code on failure. |
| 354 | */ |
| 355 | int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link) |
| 356 | { |
| 357 | u8 value; |
| 358 | int err; |
| 359 | |
| 360 | /* DP_SET_POWER register is only available on DPCD v1.1 and later */ |
| 361 | if (link->revision < 0x11) |
| 362 | return 0; |
| 363 | |
| 364 | err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); |
| 365 | if (err < 0) |
| 366 | return err; |
| 367 | |
| 368 | value &= ~DP_SET_POWER_MASK; |
| 369 | value |= DP_SET_POWER_D0; |
| 370 | |
| 371 | err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); |
| 372 | if (err < 0) |
| 373 | return err; |
| 374 | |
| 375 | /* |
| 376 | * According to the DP 1.1 specification, a "Sink Device must exit the |
| 377 | * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink |
| 378 | * Control Field" (register 0x600). |
| 379 | */ |
| 380 | usleep_range(1000, 2000); |
| 381 | |
| 382 | return 0; |
| 383 | } |
| 384 | EXPORT_SYMBOL(drm_dp_link_power_up); |
| 385 | |
| 386 | /** |
Rob Clark | d816f07 | 2014-12-02 10:43:07 -0500 | [diff] [blame] | 387 | * drm_dp_link_power_down() - power down a DisplayPort link |
| 388 | * @aux: DisplayPort AUX channel |
| 389 | * @link: pointer to a structure containing the link configuration |
| 390 | * |
| 391 | * Returns 0 on success or a negative error code on failure. |
| 392 | */ |
| 393 | int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link) |
| 394 | { |
| 395 | u8 value; |
| 396 | int err; |
| 397 | |
| 398 | /* DP_SET_POWER register is only available on DPCD v1.1 and later */ |
| 399 | if (link->revision < 0x11) |
| 400 | return 0; |
| 401 | |
| 402 | err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); |
| 403 | if (err < 0) |
| 404 | return err; |
| 405 | |
| 406 | value &= ~DP_SET_POWER_MASK; |
| 407 | value |= DP_SET_POWER_D3; |
| 408 | |
| 409 | err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); |
| 410 | if (err < 0) |
| 411 | return err; |
| 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | EXPORT_SYMBOL(drm_dp_link_power_down); |
| 416 | |
| 417 | /** |
Thierry Reding | 516c0f7 | 2013-12-09 11:47:55 +0100 | [diff] [blame] | 418 | * drm_dp_link_configure() - configure a DisplayPort link |
| 419 | * @aux: DisplayPort AUX channel |
| 420 | * @link: pointer to a structure containing the link configuration |
| 421 | * |
| 422 | * Returns 0 on success or a negative error code on failure. |
| 423 | */ |
| 424 | int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link) |
| 425 | { |
| 426 | u8 values[2]; |
| 427 | int err; |
| 428 | |
| 429 | values[0] = drm_dp_link_rate_to_bw_code(link->rate); |
| 430 | values[1] = link->num_lanes; |
| 431 | |
| 432 | if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) |
| 433 | values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; |
| 434 | |
| 435 | err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); |
| 436 | if (err < 0) |
| 437 | return err; |
| 438 | |
| 439 | return 0; |
| 440 | } |
| 441 | EXPORT_SYMBOL(drm_dp_link_configure); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 442 | |
Mika Kahola | 1c29bd3 | 2016-09-09 14:10:49 +0300 | [diff] [blame] | 443 | /** |
| 444 | * drm_dp_downstream_max_clock() - extract branch device max |
| 445 | * pixel rate for legacy VGA |
| 446 | * converter or max TMDS clock |
| 447 | * rate for others |
| 448 | * @dpcd: DisplayPort configuration data |
| 449 | * @port_cap: port capabilities |
| 450 | * |
| 451 | * Returns max clock in kHz on success or 0 if max clock not defined |
| 452 | */ |
| 453 | int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE], |
| 454 | const u8 port_cap[4]) |
| 455 | { |
| 456 | int type = port_cap[0] & DP_DS_PORT_TYPE_MASK; |
| 457 | bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] & |
| 458 | DP_DETAILED_CAP_INFO_AVAILABLE; |
| 459 | |
| 460 | if (!detailed_cap_info) |
| 461 | return 0; |
| 462 | |
| 463 | switch (type) { |
| 464 | case DP_DS_PORT_TYPE_VGA: |
| 465 | return port_cap[1] * 8 * 1000; |
| 466 | case DP_DS_PORT_TYPE_DVI: |
| 467 | case DP_DS_PORT_TYPE_HDMI: |
| 468 | case DP_DS_PORT_TYPE_DP_DUALMODE: |
| 469 | return port_cap[1] * 2500; |
| 470 | default: |
| 471 | return 0; |
| 472 | } |
| 473 | } |
| 474 | EXPORT_SYMBOL(drm_dp_downstream_max_clock); |
| 475 | |
Mika Kahola | 7529d6a | 2016-09-09 14:10:50 +0300 | [diff] [blame] | 476 | /** |
| 477 | * drm_dp_downstream_max_bpc() - extract branch device max |
| 478 | * bits per component |
| 479 | * @dpcd: DisplayPort configuration data |
| 480 | * @port_cap: port capabilities |
| 481 | * |
| 482 | * Returns max bpc on success or 0 if max bpc not defined |
| 483 | */ |
| 484 | int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], |
| 485 | const u8 port_cap[4]) |
| 486 | { |
| 487 | int type = port_cap[0] & DP_DS_PORT_TYPE_MASK; |
| 488 | bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] & |
| 489 | DP_DETAILED_CAP_INFO_AVAILABLE; |
| 490 | int bpc; |
| 491 | |
| 492 | if (!detailed_cap_info) |
| 493 | return 0; |
| 494 | |
| 495 | switch (type) { |
| 496 | case DP_DS_PORT_TYPE_VGA: |
| 497 | case DP_DS_PORT_TYPE_DVI: |
| 498 | case DP_DS_PORT_TYPE_HDMI: |
| 499 | case DP_DS_PORT_TYPE_DP_DUALMODE: |
| 500 | bpc = port_cap[2] & DP_DS_MAX_BPC_MASK; |
| 501 | |
| 502 | switch (bpc) { |
| 503 | case DP_DS_8BPC: |
| 504 | return 8; |
| 505 | case DP_DS_10BPC: |
| 506 | return 10; |
| 507 | case DP_DS_12BPC: |
| 508 | return 12; |
| 509 | case DP_DS_16BPC: |
| 510 | return 16; |
| 511 | } |
| 512 | default: |
| 513 | return 0; |
| 514 | } |
| 515 | } |
| 516 | EXPORT_SYMBOL(drm_dp_downstream_max_bpc); |
| 517 | |
Mika Kahola | 266d783 | 2016-09-09 14:10:51 +0300 | [diff] [blame] | 518 | /** |
| 519 | * drm_dp_downstream_id() - identify branch device |
| 520 | * @aux: DisplayPort AUX channel |
Mika Kahola | 3442d9e | 2016-09-16 13:39:15 +0300 | [diff] [blame] | 521 | * @id: DisplayPort branch device id |
Mika Kahola | 266d783 | 2016-09-09 14:10:51 +0300 | [diff] [blame] | 522 | * |
| 523 | * Returns branch device id on success or NULL on failure |
| 524 | */ |
| 525 | int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6]) |
| 526 | { |
| 527 | return drm_dp_dpcd_read(aux, DP_BRANCH_ID, id, 6); |
| 528 | } |
| 529 | EXPORT_SYMBOL(drm_dp_downstream_id); |
| 530 | |
Mika Kahola | 80209e5 | 2016-09-09 14:10:57 +0300 | [diff] [blame] | 531 | /** |
| 532 | * drm_dp_downstream_debug() - debug DP branch devices |
| 533 | * @m: pointer for debugfs file |
| 534 | * @dpcd: DisplayPort configuration data |
| 535 | * @port_cap: port capabilities |
| 536 | * @aux: DisplayPort AUX channel |
| 537 | * |
| 538 | */ |
| 539 | void drm_dp_downstream_debug(struct seq_file *m, |
| 540 | const u8 dpcd[DP_RECEIVER_CAP_SIZE], |
| 541 | const u8 port_cap[4], struct drm_dp_aux *aux) |
| 542 | { |
| 543 | bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] & |
| 544 | DP_DETAILED_CAP_INFO_AVAILABLE; |
| 545 | int clk; |
| 546 | int bpc; |
Chris Wilson | 967003b | 2017-07-20 18:45:32 +0100 | [diff] [blame] | 547 | char id[7]; |
Mika Kahola | 80209e5 | 2016-09-09 14:10:57 +0300 | [diff] [blame] | 548 | int len; |
| 549 | uint8_t rev[2]; |
| 550 | int type = port_cap[0] & DP_DS_PORT_TYPE_MASK; |
| 551 | bool branch_device = dpcd[DP_DOWNSTREAMPORT_PRESENT] & |
| 552 | DP_DWN_STRM_PORT_PRESENT; |
| 553 | |
| 554 | seq_printf(m, "\tDP branch device present: %s\n", |
| 555 | branch_device ? "yes" : "no"); |
| 556 | |
| 557 | if (!branch_device) |
| 558 | return; |
| 559 | |
| 560 | switch (type) { |
| 561 | case DP_DS_PORT_TYPE_DP: |
| 562 | seq_puts(m, "\t\tType: DisplayPort\n"); |
| 563 | break; |
| 564 | case DP_DS_PORT_TYPE_VGA: |
| 565 | seq_puts(m, "\t\tType: VGA\n"); |
| 566 | break; |
| 567 | case DP_DS_PORT_TYPE_DVI: |
| 568 | seq_puts(m, "\t\tType: DVI\n"); |
| 569 | break; |
| 570 | case DP_DS_PORT_TYPE_HDMI: |
| 571 | seq_puts(m, "\t\tType: HDMI\n"); |
| 572 | break; |
| 573 | case DP_DS_PORT_TYPE_NON_EDID: |
| 574 | seq_puts(m, "\t\tType: others without EDID support\n"); |
| 575 | break; |
| 576 | case DP_DS_PORT_TYPE_DP_DUALMODE: |
| 577 | seq_puts(m, "\t\tType: DP++\n"); |
| 578 | break; |
| 579 | case DP_DS_PORT_TYPE_WIRELESS: |
| 580 | seq_puts(m, "\t\tType: Wireless\n"); |
| 581 | break; |
| 582 | default: |
| 583 | seq_puts(m, "\t\tType: N/A\n"); |
| 584 | } |
| 585 | |
Chris Wilson | 967003b | 2017-07-20 18:45:32 +0100 | [diff] [blame] | 586 | memset(id, 0, sizeof(id)); |
Mika Kahola | 80209e5 | 2016-09-09 14:10:57 +0300 | [diff] [blame] | 587 | drm_dp_downstream_id(aux, id); |
| 588 | seq_printf(m, "\t\tID: %s\n", id); |
| 589 | |
| 590 | len = drm_dp_dpcd_read(aux, DP_BRANCH_HW_REV, &rev[0], 1); |
| 591 | if (len > 0) |
| 592 | seq_printf(m, "\t\tHW: %d.%d\n", |
| 593 | (rev[0] & 0xf0) >> 4, rev[0] & 0xf); |
| 594 | |
Chris Wilson | c11a93f | 2017-07-20 18:45:31 +0100 | [diff] [blame] | 595 | len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, rev, 2); |
Mika Kahola | 80209e5 | 2016-09-09 14:10:57 +0300 | [diff] [blame] | 596 | if (len > 0) |
| 597 | seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]); |
| 598 | |
| 599 | if (detailed_cap_info) { |
| 600 | clk = drm_dp_downstream_max_clock(dpcd, port_cap); |
| 601 | |
| 602 | if (clk > 0) { |
| 603 | if (type == DP_DS_PORT_TYPE_VGA) |
| 604 | seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk); |
| 605 | else |
| 606 | seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk); |
| 607 | } |
| 608 | |
| 609 | bpc = drm_dp_downstream_max_bpc(dpcd, port_cap); |
| 610 | |
| 611 | if (bpc > 0) |
| 612 | seq_printf(m, "\t\tMax bpc: %d\n", bpc); |
| 613 | } |
| 614 | } |
| 615 | EXPORT_SYMBOL(drm_dp_downstream_debug); |
| 616 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 617 | /* |
| 618 | * I2C-over-AUX implementation |
| 619 | */ |
| 620 | |
| 621 | static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter) |
| 622 | { |
| 623 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | |
| 624 | I2C_FUNC_SMBUS_READ_BLOCK_DATA | |
| 625 | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | |
| 626 | I2C_FUNC_10BIT_ADDR; |
| 627 | } |
| 628 | |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 629 | static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg) |
| 630 | { |
| 631 | /* |
| 632 | * In case of i2c defer or short i2c ack reply to a write, |
| 633 | * we need to switch to WRITE_STATUS_UPDATE to drain the |
| 634 | * rest of the message |
| 635 | */ |
| 636 | if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { |
| 637 | msg->request &= DP_AUX_I2C_MOT; |
| 638 | msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; |
| 639 | } |
| 640 | } |
| 641 | |
Ville Syrjälä | 4efa83c | 2015-09-01 20:12:54 +0300 | [diff] [blame] | 642 | #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */ |
| 643 | #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */ |
| 644 | #define AUX_STOP_LEN 4 |
| 645 | #define AUX_CMD_LEN 4 |
| 646 | #define AUX_ADDRESS_LEN 20 |
| 647 | #define AUX_REPLY_PAD_LEN 4 |
| 648 | #define AUX_LENGTH_LEN 8 |
| 649 | |
| 650 | /* |
| 651 | * Calculate the duration of the AUX request/reply in usec. Gives the |
| 652 | * "best" case estimate, ie. successful while as short as possible. |
| 653 | */ |
| 654 | static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg) |
| 655 | { |
| 656 | int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + |
| 657 | AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN; |
| 658 | |
| 659 | if ((msg->request & DP_AUX_I2C_READ) == 0) |
| 660 | len += msg->size * 8; |
| 661 | |
| 662 | return len; |
| 663 | } |
| 664 | |
| 665 | static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg) |
| 666 | { |
| 667 | int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + |
| 668 | AUX_CMD_LEN + AUX_REPLY_PAD_LEN; |
| 669 | |
| 670 | /* |
| 671 | * For read we expect what was asked. For writes there will |
| 672 | * be 0 or 1 data bytes. Assume 0 for the "best" case. |
| 673 | */ |
| 674 | if (msg->request & DP_AUX_I2C_READ) |
| 675 | len += msg->size * 8; |
| 676 | |
| 677 | return len; |
| 678 | } |
| 679 | |
| 680 | #define I2C_START_LEN 1 |
| 681 | #define I2C_STOP_LEN 1 |
| 682 | #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */ |
| 683 | #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */ |
| 684 | |
| 685 | /* |
| 686 | * Calculate the length of the i2c transfer in usec, assuming |
| 687 | * the i2c bus speed is as specified. Gives the the "worst" |
| 688 | * case estimate, ie. successful while as long as possible. |
| 689 | * Doesn't account the the "MOT" bit, and instead assumes each |
| 690 | * message includes a START, ADDRESS and STOP. Neither does it |
| 691 | * account for additional random variables such as clock stretching. |
| 692 | */ |
| 693 | static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg, |
| 694 | int i2c_speed_khz) |
| 695 | { |
| 696 | /* AUX bitrate is 1MHz, i2c bitrate as specified */ |
| 697 | return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN + |
| 698 | msg->size * I2C_DATA_LEN + |
| 699 | I2C_STOP_LEN) * 1000, i2c_speed_khz); |
| 700 | } |
| 701 | |
| 702 | /* |
| 703 | * Deterine how many retries should be attempted to successfully transfer |
| 704 | * the specified message, based on the estimated durations of the |
| 705 | * i2c and AUX transfers. |
| 706 | */ |
| 707 | static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg, |
| 708 | int i2c_speed_khz) |
| 709 | { |
| 710 | int aux_time_us = drm_dp_aux_req_duration(msg) + |
| 711 | drm_dp_aux_reply_duration(msg); |
| 712 | int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz); |
| 713 | |
| 714 | return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL); |
| 715 | } |
| 716 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 717 | /* |
Ville Syrjälä | f36203b | 2015-08-26 22:55:07 +0300 | [diff] [blame] | 718 | * FIXME currently assumes 10 kHz as some real world devices seem |
| 719 | * to require it. We should query/set the speed via DPCD if supported. |
| 720 | */ |
| 721 | static int dp_aux_i2c_speed_khz __read_mostly = 10; |
| 722 | module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644); |
| 723 | MODULE_PARM_DESC(dp_aux_i2c_speed_khz, |
| 724 | "Assumed speed of the i2c bus in kHz, (1-400, default 10)"); |
| 725 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 726 | /* |
| 727 | * Transfer a single I2C-over-AUX message and handle various error conditions, |
Alex Deucher | 732d50b | 2014-04-07 10:33:45 -0400 | [diff] [blame] | 728 | * retrying the transaction as appropriate. It is assumed that the |
Daniel Vetter | 6806cdf | 2017-01-25 07:26:43 +0100 | [diff] [blame] | 729 | * &drm_dp_aux.transfer function does not modify anything in the msg other than the |
Alex Deucher | 732d50b | 2014-04-07 10:33:45 -0400 | [diff] [blame] | 730 | * reply field. |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 731 | * |
| 732 | * Returns bytes transferred on success, or a negative error code on failure. |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 733 | */ |
| 734 | static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) |
| 735 | { |
Todd Previte | 396aa44 | 2015-04-18 00:04:18 -0700 | [diff] [blame] | 736 | unsigned int retry, defer_i2c; |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 737 | int ret; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 738 | /* |
| 739 | * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device |
| 740 | * is required to retry at least seven times upon receiving AUX_DEFER |
| 741 | * before giving up the AUX transaction. |
Ville Syrjälä | 4efa83c | 2015-09-01 20:12:54 +0300 | [diff] [blame] | 742 | * |
| 743 | * We also try to account for the i2c bus speed. |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 744 | */ |
Ville Syrjälä | f36203b | 2015-08-26 22:55:07 +0300 | [diff] [blame] | 745 | int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz)); |
Ville Syrjälä | 4efa83c | 2015-09-01 20:12:54 +0300 | [diff] [blame] | 746 | |
| 747 | for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) { |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 748 | ret = aux->transfer(aux, msg); |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 749 | if (ret < 0) { |
| 750 | if (ret == -EBUSY) |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 751 | continue; |
| 752 | |
Lyude | 9622c38 | 2016-08-05 20:30:39 -0400 | [diff] [blame] | 753 | /* |
| 754 | * While timeouts can be errors, they're usually normal |
| 755 | * behavior (for instance, when a driver tries to |
| 756 | * communicate with a non-existant DisplayPort device). |
| 757 | * Avoid spamming the kernel log with timeout errors. |
| 758 | */ |
| 759 | if (ret == -ETIMEDOUT) |
| 760 | DRM_DEBUG_KMS_RATELIMITED("transaction timed out\n"); |
| 761 | else |
| 762 | DRM_DEBUG_KMS("transaction failed: %d\n", ret); |
| 763 | |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 764 | return ret; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 765 | } |
| 766 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 767 | |
| 768 | switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { |
| 769 | case DP_AUX_NATIVE_REPLY_ACK: |
| 770 | /* |
| 771 | * For I2C-over-AUX transactions this isn't enough, we |
| 772 | * need to check for the I2C ACK reply. |
| 773 | */ |
| 774 | break; |
| 775 | |
| 776 | case DP_AUX_NATIVE_REPLY_NACK: |
Ville Syrjälä | fb8c5e4 | 2015-03-19 13:38:57 +0200 | [diff] [blame] | 777 | DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 778 | return -EREMOTEIO; |
| 779 | |
| 780 | case DP_AUX_NATIVE_REPLY_DEFER: |
Todd Previte | 747552b9 | 2015-04-15 08:38:47 -0700 | [diff] [blame] | 781 | DRM_DEBUG_KMS("native defer\n"); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 782 | /* |
| 783 | * We could check for I2C bit rate capabilities and if |
| 784 | * available adjust this interval. We could also be |
| 785 | * more careful with DP-to-legacy adapters where a |
| 786 | * long legacy cable may force very low I2C bit rates. |
| 787 | * |
| 788 | * For now just defer for long enough to hopefully be |
| 789 | * safe for all use-cases. |
| 790 | */ |
Ville Syrjälä | 79a2b16 | 2015-08-26 22:55:05 +0300 | [diff] [blame] | 791 | usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 792 | continue; |
| 793 | |
| 794 | default: |
| 795 | DRM_ERROR("invalid native reply %#04x\n", msg->reply); |
| 796 | return -EREMOTEIO; |
| 797 | } |
| 798 | |
| 799 | switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { |
| 800 | case DP_AUX_I2C_REPLY_ACK: |
| 801 | /* |
| 802 | * Both native ACK and I2C ACK replies received. We |
| 803 | * can assume the transfer was successful. |
| 804 | */ |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 805 | if (ret != msg->size) |
| 806 | drm_dp_i2c_msg_write_status_update(msg); |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 807 | return ret; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 808 | |
| 809 | case DP_AUX_I2C_REPLY_NACK: |
Ville Syrjälä | fb8c5e4 | 2015-03-19 13:38:57 +0200 | [diff] [blame] | 810 | DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size); |
Todd Previte | e9cf619 | 2014-11-04 15:17:35 -0700 | [diff] [blame] | 811 | aux->i2c_nack_count++; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 812 | return -EREMOTEIO; |
| 813 | |
| 814 | case DP_AUX_I2C_REPLY_DEFER: |
| 815 | DRM_DEBUG_KMS("I2C defer\n"); |
Todd Previte | 396aa44 | 2015-04-18 00:04:18 -0700 | [diff] [blame] | 816 | /* DP Compliance Test 4.2.2.5 Requirement: |
| 817 | * Must have at least 7 retries for I2C defers on the |
| 818 | * transaction to pass this test |
| 819 | */ |
Todd Previte | e9cf619 | 2014-11-04 15:17:35 -0700 | [diff] [blame] | 820 | aux->i2c_defer_count++; |
Todd Previte | 396aa44 | 2015-04-18 00:04:18 -0700 | [diff] [blame] | 821 | if (defer_i2c < 7) |
| 822 | defer_i2c++; |
Ville Syrjälä | 79a2b16 | 2015-08-26 22:55:05 +0300 | [diff] [blame] | 823 | usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 824 | drm_dp_i2c_msg_write_status_update(msg); |
Daniel Vetter | 646db26 | 2015-09-22 11:02:18 +0200 | [diff] [blame] | 825 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 826 | continue; |
| 827 | |
| 828 | default: |
| 829 | DRM_ERROR("invalid I2C reply %#04x\n", msg->reply); |
| 830 | return -EREMOTEIO; |
| 831 | } |
| 832 | } |
| 833 | |
Alex Deucher | 743b1e3 | 2014-03-21 10:34:06 -0400 | [diff] [blame] | 834 | DRM_DEBUG_KMS("too many retries, giving up\n"); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 835 | return -EREMOTEIO; |
| 836 | } |
| 837 | |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 838 | static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg, |
| 839 | const struct i2c_msg *i2c_msg) |
| 840 | { |
| 841 | msg->request = (i2c_msg->flags & I2C_M_RD) ? |
| 842 | DP_AUX_I2C_READ : DP_AUX_I2C_WRITE; |
| 843 | msg->request |= DP_AUX_I2C_MOT; |
| 844 | } |
| 845 | |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 846 | /* |
| 847 | * Keep retrying drm_dp_i2c_do_msg until all data has been transferred. |
| 848 | * |
| 849 | * Returns an error code on failure, or a recommended transfer size on success. |
| 850 | */ |
| 851 | static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg) |
| 852 | { |
| 853 | int err, ret = orig_msg->size; |
| 854 | struct drm_dp_aux_msg msg = *orig_msg; |
| 855 | |
| 856 | while (msg.size > 0) { |
| 857 | err = drm_dp_i2c_do_msg(aux, &msg); |
| 858 | if (err <= 0) |
| 859 | return err == 0 ? -EPROTO : err; |
| 860 | |
| 861 | if (err < msg.size && err < ret) { |
| 862 | DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n", |
| 863 | msg.size, err); |
| 864 | ret = err; |
| 865 | } |
| 866 | |
| 867 | msg.size -= err; |
| 868 | msg.buffer += err; |
| 869 | } |
| 870 | |
| 871 | return ret; |
| 872 | } |
| 873 | |
| 874 | /* |
| 875 | * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX |
| 876 | * packets to be as large as possible. If not, the I2C transactions never |
| 877 | * succeed. Hence the default is maximum. |
| 878 | */ |
| 879 | static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES; |
| 880 | module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644); |
| 881 | MODULE_PARM_DESC(dp_aux_i2c_transfer_size, |
| 882 | "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)"); |
| 883 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 884 | static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, |
| 885 | int num) |
| 886 | { |
| 887 | struct drm_dp_aux *aux = adapter->algo_data; |
| 888 | unsigned int i, j; |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 889 | unsigned transfer_size; |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 890 | struct drm_dp_aux_msg msg; |
| 891 | int err = 0; |
| 892 | |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 893 | dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES); |
| 894 | |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 895 | memset(&msg, 0, sizeof(msg)); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 896 | |
| 897 | for (i = 0; i < num; i++) { |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 898 | msg.address = msgs[i].addr; |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 899 | drm_dp_i2c_msg_set_request(&msg, &msgs[i]); |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 900 | /* Send a bare address packet to start the transaction. |
| 901 | * Zero sized messages specify an address only (bare |
| 902 | * address) transaction. |
| 903 | */ |
| 904 | msg.buffer = NULL; |
| 905 | msg.size = 0; |
| 906 | err = drm_dp_i2c_do_msg(aux, &msg); |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 907 | |
| 908 | /* |
| 909 | * Reset msg.request in case in case it got |
| 910 | * changed into a WRITE_STATUS_UPDATE. |
| 911 | */ |
| 912 | drm_dp_i2c_msg_set_request(&msg, &msgs[i]); |
| 913 | |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 914 | if (err < 0) |
| 915 | break; |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 916 | /* We want each transaction to be as large as possible, but |
| 917 | * we'll go to smaller sizes if the hardware gives us a |
| 918 | * short reply. |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 919 | */ |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 920 | transfer_size = dp_aux_i2c_transfer_size; |
| 921 | for (j = 0; j < msgs[i].len; j += msg.size) { |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 922 | msg.buffer = msgs[i].buf + j; |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 923 | msg.size = min(transfer_size, msgs[i].len - j); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 924 | |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 925 | err = drm_dp_i2c_drain_msg(aux, &msg); |
Ville Syrjälä | 68ec2a2 | 2015-08-27 17:23:30 +0300 | [diff] [blame] | 926 | |
| 927 | /* |
| 928 | * Reset msg.request in case in case it got |
| 929 | * changed into a WRITE_STATUS_UPDATE. |
| 930 | */ |
| 931 | drm_dp_i2c_msg_set_request(&msg, &msgs[i]); |
| 932 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 933 | if (err < 0) |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 934 | break; |
Simon Farnsworth | 1d002fa | 2015-02-10 18:38:08 +0000 | [diff] [blame] | 935 | transfer_size = err; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 936 | } |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 937 | if (err < 0) |
| 938 | break; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 939 | } |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 940 | if (err >= 0) |
| 941 | err = num; |
| 942 | /* Send a bare address packet to close out the transaction. |
| 943 | * Zero sized messages specify an address only (bare |
| 944 | * address) transaction. |
| 945 | */ |
| 946 | msg.request &= ~DP_AUX_I2C_MOT; |
| 947 | msg.buffer = NULL; |
| 948 | msg.size = 0; |
| 949 | (void)drm_dp_i2c_do_msg(aux, &msg); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 950 | |
Alex Deucher | ccdb516 | 2014-04-07 10:33:44 -0400 | [diff] [blame] | 951 | return err; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 952 | } |
| 953 | |
| 954 | static const struct i2c_algorithm drm_dp_i2c_algo = { |
| 955 | .functionality = drm_dp_i2c_functionality, |
| 956 | .master_xfer = drm_dp_i2c_xfer, |
| 957 | }; |
| 958 | |
Chris Wilson | 0c2f6f1 | 2016-06-17 09:33:17 +0100 | [diff] [blame] | 959 | static struct drm_dp_aux *i2c_to_aux(struct i2c_adapter *i2c) |
| 960 | { |
| 961 | return container_of(i2c, struct drm_dp_aux, ddc); |
| 962 | } |
| 963 | |
| 964 | static void lock_bus(struct i2c_adapter *i2c, unsigned int flags) |
| 965 | { |
| 966 | mutex_lock(&i2c_to_aux(i2c)->hw_mutex); |
| 967 | } |
| 968 | |
| 969 | static int trylock_bus(struct i2c_adapter *i2c, unsigned int flags) |
| 970 | { |
| 971 | return mutex_trylock(&i2c_to_aux(i2c)->hw_mutex); |
| 972 | } |
| 973 | |
| 974 | static void unlock_bus(struct i2c_adapter *i2c, unsigned int flags) |
| 975 | { |
| 976 | mutex_unlock(&i2c_to_aux(i2c)->hw_mutex); |
| 977 | } |
| 978 | |
Peter Rosin | d1ed798 | 2016-08-25 23:07:01 +0200 | [diff] [blame] | 979 | static const struct i2c_lock_operations drm_dp_i2c_lock_ops = { |
| 980 | .lock_bus = lock_bus, |
| 981 | .trylock_bus = trylock_bus, |
| 982 | .unlock_bus = unlock_bus, |
| 983 | }; |
| 984 | |
Tomeu Vizoso | 79c1da7 | 2017-03-03 14:39:34 +0100 | [diff] [blame] | 985 | static int drm_dp_aux_get_crc(struct drm_dp_aux *aux, u8 *crc) |
| 986 | { |
| 987 | u8 buf, count; |
| 988 | int ret; |
| 989 | |
| 990 | ret = drm_dp_dpcd_readb(aux, DP_TEST_SINK, &buf); |
| 991 | if (ret < 0) |
| 992 | return ret; |
| 993 | |
| 994 | WARN_ON(!(buf & DP_TEST_SINK_START)); |
| 995 | |
| 996 | ret = drm_dp_dpcd_readb(aux, DP_TEST_SINK_MISC, &buf); |
| 997 | if (ret < 0) |
| 998 | return ret; |
| 999 | |
| 1000 | count = buf & DP_TEST_COUNT_MASK; |
| 1001 | if (count == aux->crc_count) |
| 1002 | return -EAGAIN; /* No CRC yet */ |
| 1003 | |
| 1004 | aux->crc_count = count; |
| 1005 | |
| 1006 | /* |
| 1007 | * At DP_TEST_CRC_R_CR, there's 6 bytes containing CRC data, 2 bytes |
| 1008 | * per component (RGB or CrYCb). |
| 1009 | */ |
| 1010 | ret = drm_dp_dpcd_read(aux, DP_TEST_CRC_R_CR, crc, 6); |
| 1011 | if (ret < 0) |
| 1012 | return ret; |
| 1013 | |
| 1014 | return 0; |
| 1015 | } |
| 1016 | |
| 1017 | static void drm_dp_aux_crc_work(struct work_struct *work) |
| 1018 | { |
| 1019 | struct drm_dp_aux *aux = container_of(work, struct drm_dp_aux, |
| 1020 | crc_work); |
| 1021 | struct drm_crtc *crtc; |
| 1022 | u8 crc_bytes[6]; |
| 1023 | uint32_t crcs[3]; |
| 1024 | int ret; |
| 1025 | |
| 1026 | if (WARN_ON(!aux->crtc)) |
| 1027 | return; |
| 1028 | |
| 1029 | crtc = aux->crtc; |
| 1030 | while (crtc->crc.opened) { |
| 1031 | drm_crtc_wait_one_vblank(crtc); |
| 1032 | if (!crtc->crc.opened) |
| 1033 | break; |
| 1034 | |
| 1035 | ret = drm_dp_aux_get_crc(aux, crc_bytes); |
| 1036 | if (ret == -EAGAIN) { |
| 1037 | usleep_range(1000, 2000); |
| 1038 | ret = drm_dp_aux_get_crc(aux, crc_bytes); |
| 1039 | } |
| 1040 | |
| 1041 | if (ret == -EAGAIN) { |
| 1042 | DRM_DEBUG_KMS("Get CRC failed after retrying: %d\n", |
| 1043 | ret); |
| 1044 | continue; |
| 1045 | } else if (ret) { |
| 1046 | DRM_DEBUG_KMS("Failed to get a CRC: %d\n", ret); |
| 1047 | continue; |
| 1048 | } |
| 1049 | |
| 1050 | crcs[0] = crc_bytes[0] | crc_bytes[1] << 8; |
| 1051 | crcs[1] = crc_bytes[2] | crc_bytes[3] << 8; |
| 1052 | crcs[2] = crc_bytes[4] | crc_bytes[5] << 8; |
| 1053 | drm_crtc_add_crc_entry(crtc, false, 0, crcs); |
| 1054 | } |
| 1055 | } |
| 1056 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1057 | /** |
Chris Wilson | acd8f41 | 2016-06-17 09:33:18 +0100 | [diff] [blame] | 1058 | * drm_dp_aux_init() - minimally initialise an aux channel |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1059 | * @aux: DisplayPort AUX channel |
| 1060 | * |
Chris Wilson | acd8f41 | 2016-06-17 09:33:18 +0100 | [diff] [blame] | 1061 | * If you need to use the drm_dp_aux's i2c adapter prior to registering it |
| 1062 | * with the outside world, call drm_dp_aux_init() first. You must still |
| 1063 | * call drm_dp_aux_register() once the connector has been registered to |
| 1064 | * allow userspace access to the auxiliary DP channel. |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1065 | */ |
Chris Wilson | acd8f41 | 2016-06-17 09:33:18 +0100 | [diff] [blame] | 1066 | void drm_dp_aux_init(struct drm_dp_aux *aux) |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1067 | { |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 1068 | mutex_init(&aux->hw_mutex); |
Tomeu Vizoso | 79c1da7 | 2017-03-03 14:39:34 +0100 | [diff] [blame] | 1069 | INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 1070 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1071 | aux->ddc.algo = &drm_dp_i2c_algo; |
| 1072 | aux->ddc.algo_data = aux; |
| 1073 | aux->ddc.retries = 3; |
| 1074 | |
Peter Rosin | d1ed798 | 2016-08-25 23:07:01 +0200 | [diff] [blame] | 1075 | aux->ddc.lock_ops = &drm_dp_i2c_lock_ops; |
Chris Wilson | acd8f41 | 2016-06-17 09:33:18 +0100 | [diff] [blame] | 1076 | } |
| 1077 | EXPORT_SYMBOL(drm_dp_aux_init); |
| 1078 | |
| 1079 | /** |
| 1080 | * drm_dp_aux_register() - initialise and register aux channel |
| 1081 | * @aux: DisplayPort AUX channel |
| 1082 | * |
| 1083 | * Automatically calls drm_dp_aux_init() if this hasn't been done yet. |
| 1084 | * |
| 1085 | * Returns 0 on success or a negative error code on failure. |
| 1086 | */ |
| 1087 | int drm_dp_aux_register(struct drm_dp_aux *aux) |
| 1088 | { |
| 1089 | int ret; |
| 1090 | |
| 1091 | if (!aux->ddc.algo) |
| 1092 | drm_dp_aux_init(aux); |
Chris Wilson | 0c2f6f1 | 2016-06-17 09:33:17 +0100 | [diff] [blame] | 1093 | |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1094 | aux->ddc.class = I2C_CLASS_DDC; |
| 1095 | aux->ddc.owner = THIS_MODULE; |
| 1096 | aux->ddc.dev.parent = aux->dev; |
| 1097 | aux->ddc.dev.of_node = aux->dev->of_node; |
| 1098 | |
Jani Nikula | 9dc4056 | 2014-03-14 16:51:12 +0200 | [diff] [blame] | 1099 | strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), |
| 1100 | sizeof(aux->ddc.name)); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1101 | |
Rafael Antognolli | e94cb37 | 2016-01-21 15:10:19 -0800 | [diff] [blame] | 1102 | ret = drm_dp_aux_register_devnode(aux); |
| 1103 | if (ret) |
| 1104 | return ret; |
| 1105 | |
| 1106 | ret = i2c_add_adapter(&aux->ddc); |
| 1107 | if (ret) { |
| 1108 | drm_dp_aux_unregister_devnode(aux); |
| 1109 | return ret; |
| 1110 | } |
| 1111 | |
| 1112 | return 0; |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1113 | } |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 1114 | EXPORT_SYMBOL(drm_dp_aux_register); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1115 | |
| 1116 | /** |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 1117 | * drm_dp_aux_unregister() - unregister an AUX adapter |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1118 | * @aux: DisplayPort AUX channel |
| 1119 | */ |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 1120 | void drm_dp_aux_unregister(struct drm_dp_aux *aux) |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1121 | { |
Rafael Antognolli | e94cb37 | 2016-01-21 15:10:19 -0800 | [diff] [blame] | 1122 | drm_dp_aux_unregister_devnode(aux); |
Thierry Reding | 8875968 | 2013-12-12 09:57:53 +0100 | [diff] [blame] | 1123 | i2c_del_adapter(&aux->ddc); |
| 1124 | } |
Dave Airlie | 4f71d0c | 2014-06-04 16:02:28 +1000 | [diff] [blame] | 1125 | EXPORT_SYMBOL(drm_dp_aux_unregister); |
Ville Syrjälä | 6608804 | 2016-05-18 11:57:29 +0300 | [diff] [blame] | 1126 | |
| 1127 | #define PSR_SETUP_TIME(x) [DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x) |
| 1128 | |
| 1129 | /** |
| 1130 | * drm_dp_psr_setup_time() - PSR setup in time usec |
| 1131 | * @psr_cap: PSR capabilities from DPCD |
| 1132 | * |
| 1133 | * Returns: |
| 1134 | * PSR setup time for the panel in microseconds, negative |
| 1135 | * error code on failure. |
| 1136 | */ |
| 1137 | int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]) |
| 1138 | { |
| 1139 | static const u16 psr_setup_time_us[] = { |
| 1140 | PSR_SETUP_TIME(330), |
| 1141 | PSR_SETUP_TIME(275), |
| 1142 | PSR_SETUP_TIME(165), |
| 1143 | PSR_SETUP_TIME(110), |
| 1144 | PSR_SETUP_TIME(55), |
| 1145 | PSR_SETUP_TIME(0), |
| 1146 | }; |
| 1147 | int i; |
| 1148 | |
| 1149 | i = (psr_cap[1] & DP_PSR_SETUP_TIME_MASK) >> DP_PSR_SETUP_TIME_SHIFT; |
| 1150 | if (i >= ARRAY_SIZE(psr_setup_time_us)) |
| 1151 | return -EINVAL; |
| 1152 | |
| 1153 | return psr_setup_time_us[i]; |
| 1154 | } |
| 1155 | EXPORT_SYMBOL(drm_dp_psr_setup_time); |
| 1156 | |
| 1157 | #undef PSR_SETUP_TIME |
Tomeu Vizoso | 79c1da7 | 2017-03-03 14:39:34 +0100 | [diff] [blame] | 1158 | |
| 1159 | /** |
| 1160 | * drm_dp_start_crc() - start capture of frame CRCs |
| 1161 | * @aux: DisplayPort AUX channel |
Tomeu Vizoso | 0621ce1 | 2017-03-07 21:35:11 +0100 | [diff] [blame] | 1162 | * @crtc: CRTC displaying the frames whose CRCs are to be captured |
Tomeu Vizoso | 79c1da7 | 2017-03-03 14:39:34 +0100 | [diff] [blame] | 1163 | * |
| 1164 | * Returns 0 on success or a negative error code on failure. |
| 1165 | */ |
| 1166 | int drm_dp_start_crc(struct drm_dp_aux *aux, struct drm_crtc *crtc) |
| 1167 | { |
| 1168 | u8 buf; |
| 1169 | int ret; |
| 1170 | |
| 1171 | ret = drm_dp_dpcd_readb(aux, DP_TEST_SINK, &buf); |
| 1172 | if (ret < 0) |
| 1173 | return ret; |
| 1174 | |
| 1175 | ret = drm_dp_dpcd_writeb(aux, DP_TEST_SINK, buf | DP_TEST_SINK_START); |
| 1176 | if (ret < 0) |
| 1177 | return ret; |
| 1178 | |
| 1179 | aux->crc_count = 0; |
| 1180 | aux->crtc = crtc; |
| 1181 | schedule_work(&aux->crc_work); |
| 1182 | |
| 1183 | return 0; |
| 1184 | } |
| 1185 | EXPORT_SYMBOL(drm_dp_start_crc); |
| 1186 | |
| 1187 | /** |
| 1188 | * drm_dp_stop_crc() - stop capture of frame CRCs |
| 1189 | * @aux: DisplayPort AUX channel |
| 1190 | * |
| 1191 | * Returns 0 on success or a negative error code on failure. |
| 1192 | */ |
| 1193 | int drm_dp_stop_crc(struct drm_dp_aux *aux) |
| 1194 | { |
| 1195 | u8 buf; |
| 1196 | int ret; |
| 1197 | |
| 1198 | ret = drm_dp_dpcd_readb(aux, DP_TEST_SINK, &buf); |
| 1199 | if (ret < 0) |
| 1200 | return ret; |
| 1201 | |
| 1202 | ret = drm_dp_dpcd_writeb(aux, DP_TEST_SINK, buf & ~DP_TEST_SINK_START); |
| 1203 | if (ret < 0) |
| 1204 | return ret; |
| 1205 | |
| 1206 | flush_work(&aux->crc_work); |
| 1207 | aux->crtc = NULL; |
| 1208 | |
| 1209 | return 0; |
| 1210 | } |
| 1211 | EXPORT_SYMBOL(drm_dp_stop_crc); |
Jani Nikula | 118b90f | 2017-05-18 14:10:22 +0300 | [diff] [blame] | 1212 | |
Jani Nikula | 76fa998 | 2017-05-18 14:10:24 +0300 | [diff] [blame] | 1213 | struct dpcd_quirk { |
| 1214 | u8 oui[3]; |
| 1215 | bool is_branch; |
| 1216 | u32 quirks; |
| 1217 | }; |
| 1218 | |
| 1219 | #define OUI(first, second, third) { (first), (second), (third) } |
| 1220 | |
| 1221 | static const struct dpcd_quirk dpcd_quirk_list[] = { |
| 1222 | /* Analogix 7737 needs reduced M and N at HBR2 link rates */ |
| 1223 | { OUI(0x00, 0x22, 0xb9), true, BIT(DP_DPCD_QUIRK_LIMITED_M_N) }, |
| 1224 | }; |
| 1225 | |
| 1226 | #undef OUI |
| 1227 | |
| 1228 | /* |
| 1229 | * Get a bit mask of DPCD quirks for the sink/branch device identified by |
| 1230 | * ident. The quirk data is shared but it's up to the drivers to act on the |
| 1231 | * data. |
| 1232 | * |
| 1233 | * For now, only the OUI (first three bytes) is used, but this may be extended |
| 1234 | * to device identification string and hardware/firmware revisions later. |
| 1235 | */ |
| 1236 | static u32 |
| 1237 | drm_dp_get_quirks(const struct drm_dp_dpcd_ident *ident, bool is_branch) |
| 1238 | { |
| 1239 | const struct dpcd_quirk *quirk; |
| 1240 | u32 quirks = 0; |
| 1241 | int i; |
| 1242 | |
| 1243 | for (i = 0; i < ARRAY_SIZE(dpcd_quirk_list); i++) { |
| 1244 | quirk = &dpcd_quirk_list[i]; |
| 1245 | |
| 1246 | if (quirk->is_branch != is_branch) |
| 1247 | continue; |
| 1248 | |
| 1249 | if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0) |
| 1250 | continue; |
| 1251 | |
| 1252 | quirks |= quirk->quirks; |
| 1253 | } |
| 1254 | |
| 1255 | return quirks; |
| 1256 | } |
| 1257 | |
Jani Nikula | 118b90f | 2017-05-18 14:10:22 +0300 | [diff] [blame] | 1258 | /** |
| 1259 | * drm_dp_read_desc - read sink/branch descriptor from DPCD |
| 1260 | * @aux: DisplayPort AUX channel |
| 1261 | * @desc: Device decriptor to fill from DPCD |
| 1262 | * @is_branch: true for branch devices, false for sink devices |
| 1263 | * |
| 1264 | * Read DPCD 0x400 (sink) or 0x500 (branch) into @desc. Also debug log the |
| 1265 | * identification. |
| 1266 | * |
| 1267 | * Returns 0 on success or a negative error code on failure. |
| 1268 | */ |
| 1269 | int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, |
| 1270 | bool is_branch) |
| 1271 | { |
| 1272 | struct drm_dp_dpcd_ident *ident = &desc->ident; |
| 1273 | unsigned int offset = is_branch ? DP_BRANCH_OUI : DP_SINK_OUI; |
| 1274 | int ret, dev_id_len; |
| 1275 | |
| 1276 | ret = drm_dp_dpcd_read(aux, offset, ident, sizeof(*ident)); |
| 1277 | if (ret < 0) |
| 1278 | return ret; |
| 1279 | |
Jani Nikula | 76fa998 | 2017-05-18 14:10:24 +0300 | [diff] [blame] | 1280 | desc->quirks = drm_dp_get_quirks(ident, is_branch); |
| 1281 | |
Jani Nikula | 118b90f | 2017-05-18 14:10:22 +0300 | [diff] [blame] | 1282 | dev_id_len = strnlen(ident->device_id, sizeof(ident->device_id)); |
| 1283 | |
Jani Nikula | 76fa998 | 2017-05-18 14:10:24 +0300 | [diff] [blame] | 1284 | DRM_DEBUG_KMS("DP %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n", |
Jani Nikula | 118b90f | 2017-05-18 14:10:22 +0300 | [diff] [blame] | 1285 | is_branch ? "branch" : "sink", |
| 1286 | (int)sizeof(ident->oui), ident->oui, |
| 1287 | dev_id_len, ident->device_id, |
| 1288 | ident->hw_rev >> 4, ident->hw_rev & 0xf, |
Jani Nikula | 76fa998 | 2017-05-18 14:10:24 +0300 | [diff] [blame] | 1289 | ident->sw_major_rev, ident->sw_minor_rev, |
| 1290 | desc->quirks); |
Jani Nikula | 118b90f | 2017-05-18 14:10:22 +0300 | [diff] [blame] | 1291 | |
| 1292 | return 0; |
| 1293 | } |
| 1294 | EXPORT_SYMBOL(drm_dp_read_desc); |