Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* OmniVision OV6630/OV6130 Camera Chip Support Code |
| 2 | * |
| 3 | * Copyright (c) 1999-2004 Mark McClelland <mark@alpha.dyndns.org> |
| 4 | * http://alpha.dyndns.org/ov511/ |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. NO WARRANTY OF ANY KIND is expressed or implied. |
| 10 | */ |
| 11 | |
| 12 | #define DEBUG |
| 13 | |
| 14 | #include <linux/slab.h> |
| 15 | #include "ovcamchip_priv.h" |
| 16 | |
| 17 | /* Registers */ |
| 18 | #define REG_GAIN 0x00 /* gain [5:0] */ |
| 19 | #define REG_BLUE 0x01 /* blue gain */ |
| 20 | #define REG_RED 0x02 /* red gain */ |
| 21 | #define REG_SAT 0x03 /* saturation [7:3] */ |
| 22 | #define REG_CNT 0x05 /* Y contrast [3:0] */ |
| 23 | #define REG_BRT 0x06 /* Y brightness */ |
| 24 | #define REG_SHARP 0x07 /* sharpness */ |
| 25 | #define REG_WB_BLUE 0x0C /* WB blue ratio [5:0] */ |
| 26 | #define REG_WB_RED 0x0D /* WB red ratio [5:0] */ |
| 27 | #define REG_EXP 0x10 /* exposure */ |
| 28 | |
| 29 | /* Window parameters */ |
| 30 | #define HWSBASE 0x38 |
| 31 | #define HWEBASE 0x3A |
| 32 | #define VWSBASE 0x05 |
| 33 | #define VWEBASE 0x06 |
| 34 | |
| 35 | struct ov6x30 { |
| 36 | int auto_brt; |
| 37 | int auto_exp; |
| 38 | int backlight; |
| 39 | int bandfilt; |
| 40 | int mirror; |
| 41 | }; |
| 42 | |
| 43 | static struct ovcamchip_regvals regvals_init_6x30[] = { |
| 44 | { 0x12, 0x80 }, /* reset */ |
| 45 | { 0x00, 0x1f }, /* Gain */ |
| 46 | { 0x01, 0x99 }, /* Blue gain */ |
| 47 | { 0x02, 0x7c }, /* Red gain */ |
| 48 | { 0x03, 0xc0 }, /* Saturation */ |
| 49 | { 0x05, 0x0a }, /* Contrast */ |
| 50 | { 0x06, 0x95 }, /* Brightness */ |
| 51 | { 0x07, 0x2d }, /* Sharpness */ |
| 52 | { 0x0c, 0x20 }, |
| 53 | { 0x0d, 0x20 }, |
| 54 | { 0x0e, 0x20 }, |
| 55 | { 0x0f, 0x05 }, |
| 56 | { 0x10, 0x9a }, /* "exposure check" */ |
| 57 | { 0x11, 0x00 }, /* Pixel clock = fastest */ |
| 58 | { 0x12, 0x24 }, /* Enable AGC and AWB */ |
| 59 | { 0x13, 0x21 }, |
| 60 | { 0x14, 0x80 }, |
| 61 | { 0x15, 0x01 }, |
| 62 | { 0x16, 0x03 }, |
| 63 | { 0x17, 0x38 }, |
| 64 | { 0x18, 0xea }, |
| 65 | { 0x19, 0x04 }, |
| 66 | { 0x1a, 0x93 }, |
| 67 | { 0x1b, 0x00 }, |
| 68 | { 0x1e, 0xc4 }, |
| 69 | { 0x1f, 0x04 }, |
| 70 | { 0x20, 0x20 }, |
| 71 | { 0x21, 0x10 }, |
| 72 | { 0x22, 0x88 }, |
| 73 | { 0x23, 0xc0 }, /* Crystal circuit power level */ |
| 74 | { 0x25, 0x9a }, /* Increase AEC black pixel ratio */ |
| 75 | { 0x26, 0xb2 }, /* BLC enable */ |
| 76 | { 0x27, 0xa2 }, |
| 77 | { 0x28, 0x00 }, |
| 78 | { 0x29, 0x00 }, |
| 79 | { 0x2a, 0x84 }, /* (keep) */ |
| 80 | { 0x2b, 0xa8 }, /* (keep) */ |
| 81 | { 0x2c, 0xa0 }, |
| 82 | { 0x2d, 0x95 }, /* Enable auto-brightness */ |
| 83 | { 0x2e, 0x88 }, |
| 84 | { 0x33, 0x26 }, |
| 85 | { 0x34, 0x03 }, |
| 86 | { 0x36, 0x8f }, |
| 87 | { 0x37, 0x80 }, |
| 88 | { 0x38, 0x83 }, |
| 89 | { 0x39, 0x80 }, |
| 90 | { 0x3a, 0x0f }, |
| 91 | { 0x3b, 0x3c }, |
| 92 | { 0x3c, 0x1a }, |
| 93 | { 0x3d, 0x80 }, |
| 94 | { 0x3e, 0x80 }, |
| 95 | { 0x3f, 0x0e }, |
| 96 | { 0x40, 0x00 }, /* White bal */ |
| 97 | { 0x41, 0x00 }, /* White bal */ |
| 98 | { 0x42, 0x80 }, |
| 99 | { 0x43, 0x3f }, /* White bal */ |
| 100 | { 0x44, 0x80 }, |
| 101 | { 0x45, 0x20 }, |
| 102 | { 0x46, 0x20 }, |
| 103 | { 0x47, 0x80 }, |
| 104 | { 0x48, 0x7f }, |
| 105 | { 0x49, 0x00 }, |
| 106 | { 0x4a, 0x00 }, |
| 107 | { 0x4b, 0x80 }, |
| 108 | { 0x4c, 0xd0 }, |
| 109 | { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */ |
| 110 | { 0x4e, 0x40 }, |
| 111 | { 0x4f, 0x07 }, /* UV average mode, color killer: strongest */ |
| 112 | { 0x50, 0xff }, |
| 113 | { 0x54, 0x23 }, /* Max AGC gain: 18dB */ |
| 114 | { 0x55, 0xff }, |
| 115 | { 0x56, 0x12 }, |
| 116 | { 0x57, 0x81 }, /* (default) */ |
| 117 | { 0x58, 0x75 }, |
| 118 | { 0x59, 0x01 }, /* AGC dark current compensation: +1 */ |
| 119 | { 0x5a, 0x2c }, |
| 120 | { 0x5b, 0x0f }, /* AWB chrominance levels */ |
| 121 | { 0x5c, 0x10 }, |
| 122 | { 0x3d, 0x80 }, |
| 123 | { 0x27, 0xa6 }, |
| 124 | /* Toggle AWB off and on */ |
| 125 | { 0x12, 0x20 }, |
| 126 | { 0x12, 0x24 }, |
| 127 | |
| 128 | { 0xff, 0xff }, /* END MARKER */ |
| 129 | }; |
| 130 | |
| 131 | /* This initializes the OV6x30 camera chip and relevant variables. */ |
| 132 | static int ov6x30_init(struct i2c_client *c) |
| 133 | { |
| 134 | struct ovcamchip *ov = i2c_get_clientdata(c); |
| 135 | struct ov6x30 *s; |
| 136 | int rc; |
| 137 | |
| 138 | DDEBUG(4, &c->dev, "entered"); |
| 139 | |
| 140 | rc = ov_write_regvals(c, regvals_init_6x30); |
| 141 | if (rc < 0) |
| 142 | return rc; |
| 143 | |
Panagiotis Issaris | 7408187 | 2006-01-11 19:40:56 -0200 | [diff] [blame] | 144 | ov->spriv = s = kzalloc(sizeof *s, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | if (!s) |
| 146 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | |
| 148 | s->auto_brt = 1; |
| 149 | s->auto_exp = 1; |
| 150 | |
| 151 | return rc; |
| 152 | } |
| 153 | |
| 154 | static int ov6x30_free(struct i2c_client *c) |
| 155 | { |
| 156 | struct ovcamchip *ov = i2c_get_clientdata(c); |
| 157 | |
| 158 | kfree(ov->spriv); |
| 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | static int ov6x30_set_control(struct i2c_client *c, |
| 163 | struct ovcamchip_control *ctl) |
| 164 | { |
| 165 | struct ovcamchip *ov = i2c_get_clientdata(c); |
| 166 | struct ov6x30 *s = ov->spriv; |
| 167 | int rc; |
| 168 | int v = ctl->value; |
| 169 | |
| 170 | switch (ctl->id) { |
| 171 | case OVCAMCHIP_CID_CONT: |
| 172 | rc = ov_write_mask(c, REG_CNT, v >> 12, 0x0f); |
| 173 | break; |
| 174 | case OVCAMCHIP_CID_BRIGHT: |
| 175 | rc = ov_write(c, REG_BRT, v >> 8); |
| 176 | break; |
| 177 | case OVCAMCHIP_CID_SAT: |
| 178 | rc = ov_write(c, REG_SAT, v >> 8); |
| 179 | break; |
| 180 | case OVCAMCHIP_CID_HUE: |
| 181 | rc = ov_write(c, REG_RED, 0xFF - (v >> 8)); |
| 182 | if (rc < 0) |
| 183 | goto out; |
| 184 | |
| 185 | rc = ov_write(c, REG_BLUE, v >> 8); |
| 186 | break; |
| 187 | case OVCAMCHIP_CID_EXP: |
| 188 | rc = ov_write(c, REG_EXP, v); |
| 189 | break; |
| 190 | case OVCAMCHIP_CID_FREQ: |
| 191 | { |
| 192 | int sixty = (v == 60); |
| 193 | |
| 194 | rc = ov_write(c, 0x2b, sixty?0xa8:0x28); |
| 195 | if (rc < 0) |
| 196 | goto out; |
| 197 | |
| 198 | rc = ov_write(c, 0x2a, sixty?0x84:0xa4); |
| 199 | break; |
| 200 | } |
| 201 | case OVCAMCHIP_CID_BANDFILT: |
| 202 | rc = ov_write_mask(c, 0x2d, v?0x04:0x00, 0x04); |
| 203 | s->bandfilt = v; |
| 204 | break; |
| 205 | case OVCAMCHIP_CID_AUTOBRIGHT: |
| 206 | rc = ov_write_mask(c, 0x2d, v?0x10:0x00, 0x10); |
| 207 | s->auto_brt = v; |
| 208 | break; |
| 209 | case OVCAMCHIP_CID_AUTOEXP: |
| 210 | rc = ov_write_mask(c, 0x28, v?0x00:0x10, 0x10); |
| 211 | s->auto_exp = v; |
| 212 | break; |
| 213 | case OVCAMCHIP_CID_BACKLIGHT: |
| 214 | { |
| 215 | rc = ov_write_mask(c, 0x4e, v?0x80:0x60, 0xe0); |
| 216 | if (rc < 0) |
| 217 | goto out; |
| 218 | |
| 219 | rc = ov_write_mask(c, 0x29, v?0x08:0x00, 0x08); |
| 220 | if (rc < 0) |
| 221 | goto out; |
| 222 | |
| 223 | rc = ov_write_mask(c, 0x28, v?0x02:0x00, 0x02); |
| 224 | s->backlight = v; |
| 225 | break; |
| 226 | } |
| 227 | case OVCAMCHIP_CID_MIRROR: |
| 228 | rc = ov_write_mask(c, 0x12, v?0x40:0x00, 0x40); |
| 229 | s->mirror = v; |
| 230 | break; |
| 231 | default: |
| 232 | DDEBUG(2, &c->dev, "control not supported: %d", ctl->id); |
| 233 | return -EPERM; |
| 234 | } |
| 235 | |
| 236 | out: |
| 237 | DDEBUG(3, &c->dev, "id=%d, arg=%d, rc=%d", ctl->id, v, rc); |
| 238 | return rc; |
| 239 | } |
| 240 | |
| 241 | static int ov6x30_get_control(struct i2c_client *c, |
| 242 | struct ovcamchip_control *ctl) |
| 243 | { |
| 244 | struct ovcamchip *ov = i2c_get_clientdata(c); |
| 245 | struct ov6x30 *s = ov->spriv; |
| 246 | int rc = 0; |
| 247 | unsigned char val = 0; |
| 248 | |
| 249 | switch (ctl->id) { |
| 250 | case OVCAMCHIP_CID_CONT: |
| 251 | rc = ov_read(c, REG_CNT, &val); |
| 252 | ctl->value = (val & 0x0f) << 12; |
| 253 | break; |
| 254 | case OVCAMCHIP_CID_BRIGHT: |
| 255 | rc = ov_read(c, REG_BRT, &val); |
| 256 | ctl->value = val << 8; |
| 257 | break; |
| 258 | case OVCAMCHIP_CID_SAT: |
| 259 | rc = ov_read(c, REG_SAT, &val); |
| 260 | ctl->value = val << 8; |
| 261 | break; |
| 262 | case OVCAMCHIP_CID_HUE: |
| 263 | rc = ov_read(c, REG_BLUE, &val); |
| 264 | ctl->value = val << 8; |
| 265 | break; |
| 266 | case OVCAMCHIP_CID_EXP: |
| 267 | rc = ov_read(c, REG_EXP, &val); |
| 268 | ctl->value = val; |
| 269 | break; |
| 270 | case OVCAMCHIP_CID_BANDFILT: |
| 271 | ctl->value = s->bandfilt; |
| 272 | break; |
| 273 | case OVCAMCHIP_CID_AUTOBRIGHT: |
| 274 | ctl->value = s->auto_brt; |
| 275 | break; |
| 276 | case OVCAMCHIP_CID_AUTOEXP: |
| 277 | ctl->value = s->auto_exp; |
| 278 | break; |
| 279 | case OVCAMCHIP_CID_BACKLIGHT: |
| 280 | ctl->value = s->backlight; |
| 281 | break; |
| 282 | case OVCAMCHIP_CID_MIRROR: |
| 283 | ctl->value = s->mirror; |
| 284 | break; |
| 285 | default: |
| 286 | DDEBUG(2, &c->dev, "control not supported: %d", ctl->id); |
| 287 | return -EPERM; |
| 288 | } |
| 289 | |
| 290 | DDEBUG(3, &c->dev, "id=%d, arg=%d, rc=%d", ctl->id, ctl->value, rc); |
| 291 | return rc; |
| 292 | } |
| 293 | |
| 294 | static int ov6x30_mode_init(struct i2c_client *c, struct ovcamchip_window *win) |
| 295 | { |
| 296 | /******** QCIF-specific regs ********/ |
| 297 | |
| 298 | ov_write_mask(c, 0x14, win->quarter?0x20:0x00, 0x20); |
| 299 | |
| 300 | /******** Palette-specific regs ********/ |
| 301 | |
| 302 | if (win->format == VIDEO_PALETTE_GREY) { |
Jean Delvare | c7a4653 | 2005-08-11 23:41:56 +0200 | [diff] [blame] | 303 | if (c->adapter->id == I2C_HW_SMBUS_OV518) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | /* Do nothing - we're already in 8-bit mode */ |
| 305 | } else { |
| 306 | ov_write_mask(c, 0x13, 0x20, 0x20); |
| 307 | } |
| 308 | } else { |
| 309 | /* The OV518 needs special treatment. Although both the OV518 |
| 310 | * and the OV6630 support a 16-bit video bus, only the 8 bit Y |
| 311 | * bus is actually used. The UV bus is tied to ground. |
| 312 | * Therefore, the OV6630 needs to be in 8-bit multiplexed |
| 313 | * output mode */ |
| 314 | |
Jean Delvare | c7a4653 | 2005-08-11 23:41:56 +0200 | [diff] [blame] | 315 | if (c->adapter->id == I2C_HW_SMBUS_OV518) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | /* Do nothing - we want to stay in 8-bit mode */ |
| 317 | /* Warning: Messing with reg 0x13 breaks OV518 color */ |
| 318 | } else { |
| 319 | ov_write_mask(c, 0x13, 0x00, 0x20); |
| 320 | } |
| 321 | } |
| 322 | |
| 323 | /******** Clock programming ********/ |
| 324 | |
| 325 | ov_write(c, 0x11, win->clockdiv); |
| 326 | |
| 327 | return 0; |
| 328 | } |
| 329 | |
| 330 | static int ov6x30_set_window(struct i2c_client *c, struct ovcamchip_window *win) |
| 331 | { |
| 332 | int ret, hwscale, vwscale; |
| 333 | |
| 334 | ret = ov6x30_mode_init(c, win); |
| 335 | if (ret < 0) |
| 336 | return ret; |
| 337 | |
| 338 | if (win->quarter) { |
| 339 | hwscale = 0; |
| 340 | vwscale = 0; |
| 341 | } else { |
| 342 | hwscale = 1; |
| 343 | vwscale = 1; /* The datasheet says 0; it's wrong */ |
| 344 | } |
| 345 | |
| 346 | ov_write(c, 0x17, HWSBASE + (win->x >> hwscale)); |
| 347 | ov_write(c, 0x18, HWEBASE + ((win->x + win->width) >> hwscale)); |
| 348 | ov_write(c, 0x19, VWSBASE + (win->y >> vwscale)); |
| 349 | ov_write(c, 0x1a, VWEBASE + ((win->y + win->height) >> vwscale)); |
| 350 | |
| 351 | return 0; |
| 352 | } |
| 353 | |
| 354 | static int ov6x30_command(struct i2c_client *c, unsigned int cmd, void *arg) |
| 355 | { |
| 356 | switch (cmd) { |
| 357 | case OVCAMCHIP_CMD_S_CTRL: |
| 358 | return ov6x30_set_control(c, arg); |
| 359 | case OVCAMCHIP_CMD_G_CTRL: |
| 360 | return ov6x30_get_control(c, arg); |
| 361 | case OVCAMCHIP_CMD_S_MODE: |
| 362 | return ov6x30_set_window(c, arg); |
| 363 | default: |
| 364 | DDEBUG(2, &c->dev, "command not supported: %d", cmd); |
| 365 | return -ENOIOCTLCMD; |
| 366 | } |
| 367 | } |
| 368 | |
| 369 | struct ovcamchip_ops ov6x30_ops = { |
| 370 | .init = ov6x30_init, |
| 371 | .free = ov6x30_free, |
| 372 | .command = ov6x30_command, |
| 373 | }; |