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LeafOS / LeafOS-Devices / android_kernel_samsung_gta4xl / bf528a3a9bd11b6ae39684b18c9c0678f23924fd / . / arch / powerpc / include / asm / tlbflush.h
blob: abbe3419d1dd244e57d543a58f4a25bb55502da4 [file] [log] [blame]
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]1#ifndef _ASM_POWERPC_TLBFLUSH_H
2#define _ASM_POWERPC_TLBFLUSH_H
Benjamin Herrenschmidte701d262007-10-30 09:46:06 +1100[diff] [blame]3
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]4/*
5 * TLB flushing:
6 *
7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
8 * - flush_tlb_page(vma, vmaddr) flushes one page
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]9 * - local_flush_tlb_mm(mm) flushes the specified mm context on
10 * the local processor
11 * - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]12 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
13 * - flush_tlb_range(vma, start, end) flushes a range of pages
14 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version
19 * 2 of the License, or (at your option) any later version.
20 */
21#ifdef __KERNEL__
22
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]23#ifdef CONFIG_PPC_MMU_NOHASH
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]24/*
25 * TLB flushing for software loaded TLB chips
26 *
27 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
28 * flush_tlb_kernel_range are best implemented as tlbia vs
29 * specific tlbie's
30 */
31
Benjamin Herrenschmidte701d262007-10-30 09:46:06 +1100[diff] [blame]32#include <linux/mm.h>
33
Benjamin Herrenschmidt2ca8cf72008-12-18 19:13:29 +0000[diff] [blame]34#define MMU_NO_CONTEXT ((unsigned int)-1)
35
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]36extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
37 unsigned long end);
38extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
Benjamin Herrenschmidt1a37a3f2008-12-14 19:44:24 +0000[diff] [blame]39
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]40extern void local_flush_tlb_mm(struct mm_struct *mm);
41extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]42
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]43#ifdef CONFIG_SMP
44extern void flush_tlb_mm(struct mm_struct *mm);
45extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
46#else
47#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
48#define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
49#endif
50#define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
Kumar Galadf3b8612008-11-19 05:53:24 +0000[diff] [blame]51
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]52#elif defined(CONFIG_PPC_STD_MMU_32)
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]53
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]54/*
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]55 * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]56 */
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]57extern void flush_tlb_mm(struct mm_struct *mm);
58extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
59extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
60extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
61 unsigned long end);
62extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]63static inline void local_flush_tlb_page(struct vm_area_struct *vma,
64 unsigned long vmaddr)
Kumar Galadf3b8612008-11-19 05:53:24 +0000[diff] [blame]65{
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]66 flush_tlb_page(vma, vmaddr);
67}
68static inline void local_flush_tlb_mm(struct mm_struct *mm)
69{
70 flush_tlb_mm(mm);
Kumar Galadf3b8612008-11-19 05:53:24 +0000[diff] [blame]71}
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]72
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]73#elif defined(CONFIG_PPC_STD_MMU_64)
74
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]75/*
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]76 * TLB flushing for 64-bit hash-MMU CPUs
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]77 */
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]78
79#include <linux/percpu.h>
80#include <asm/page.h>
81
82#define PPC64_TLB_BATCH_NR 192
83
84struct ppc64_tlb_batch {
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000[diff] [blame]85 int active;
86 unsigned long index;
87 struct mm_struct *mm;
88 real_pte_t pte[PPC64_TLB_BATCH_NR];
89 unsigned long vaddr[PPC64_TLB_BATCH_NR];
90 unsigned int psize;
Paul Mackerras1189be62007-10-11 20:37:10 +1000[diff] [blame]91 int ssize;
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]92};
93DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
94
95extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
96
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000[diff] [blame]97extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
98 pte_t *ptep, unsigned long pte, int huge);
99
100#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
101
102static inline void arch_enter_lazy_mmu_mode(void)
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]103{
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000[diff] [blame]104 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
105
106 batch->active = 1;
107}
108
109static inline void arch_leave_lazy_mmu_mode(void)
110{
111 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]112
113 if (batch->index)
114 __flush_tlb_pending(batch);
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000[diff] [blame]115 batch->active = 0;
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]116}
117
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000[diff] [blame]118#define arch_flush_lazy_mmu_mode() do {} while (0)
119
120
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100[diff] [blame]121extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
Paul Mackerras1189be62007-10-11 20:37:10 +1000[diff] [blame]122 int ssize, int local);
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100[diff] [blame]123extern void flush_hash_range(unsigned long number, int local);
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]124
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]125
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]126static inline void local_flush_tlb_mm(struct mm_struct *mm)
127{
128}
129
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]130static inline void flush_tlb_mm(struct mm_struct *mm)
131{
132}
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]133
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]134static inline void local_flush_tlb_page(struct vm_area_struct *vma,
135 unsigned long vmaddr)
Kumar Galadf3b8612008-11-19 05:53:24 +0000[diff] [blame]136{
137}
138
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]139static inline void flush_tlb_page(struct vm_area_struct *vma,
140 unsigned long vmaddr)
141{
142}
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]143
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]144static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
145 unsigned long vmaddr)
146{
147}
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]148
David Gibson62102302007-04-24 13:09:12 +1000[diff] [blame]149static inline void flush_tlb_range(struct vm_area_struct *vma,
150 unsigned long start, unsigned long end)
151{
152}
153
154static inline void flush_tlb_kernel_range(unsigned long start,
155 unsigned long end)
156{
157}
158
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000[diff] [blame]159/* Private function for use by PCI IO mapping code */
160extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
161 unsigned long end);
162
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +0000[diff] [blame]163#else
164#error Unsupported MMU type
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]165#endif
166
Stephen Rothwell19702822005-11-04 16:58:59 +1100[diff] [blame]167#endif /*__KERNEL__ */
168#endif /* _ASM_POWERPC_TLBFLUSH_H */