Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _S390_TLB_H |
| 2 | #define _S390_TLB_H |
| 3 | |
| 4 | /* |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 5 | * TLB flushing on s390 is complicated. The following requirement |
| 6 | * from the principles of operation is the most arduous: |
| 7 | * |
| 8 | * "A valid table entry must not be changed while it is attached |
| 9 | * to any CPU and may be used for translation by that CPU except to |
| 10 | * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY, |
| 11 | * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page |
| 12 | * table entry, or (3) make a change by means of a COMPARE AND SWAP |
| 13 | * AND PURGE instruction that purges the TLB." |
| 14 | * |
| 15 | * The modification of a pte of an active mm struct therefore is |
| 16 | * a two step process: i) invalidate the pte, ii) store the new pte. |
| 17 | * This is true for the page protection bit as well. |
| 18 | * The only possible optimization is to flush at the beginning of |
| 19 | * a tlb_gather_mmu cycle if the mm_struct is currently not in use. |
| 20 | * |
| 21 | * Pages used for the page tables is a different story. FIXME: more |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | */ |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 23 | |
| 24 | #include <linux/mm.h> |
Heiko Carstens | c84ca00 | 2011-01-31 11:30:06 +0100 | [diff] [blame] | 25 | #include <linux/pagemap.h> |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 26 | #include <linux/swap.h> |
| 27 | #include <asm/processor.h> |
| 28 | #include <asm/pgalloc.h> |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 29 | #include <asm/tlbflush.h> |
| 30 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 31 | struct mmu_gather { |
| 32 | struct mm_struct *mm; |
Martin Schwidefsky | 36409f6 | 2011-06-06 14:14:41 +0200 | [diff] [blame] | 33 | struct mmu_table_batch *batch; |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 34 | unsigned int fullmm; |
Guenter Roeck | 215b28a | 2013-08-16 20:50:55 -0700 | [diff] [blame] | 35 | unsigned long start, end; |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 36 | }; |
| 37 | |
Martin Schwidefsky | 36409f6 | 2011-06-06 14:14:41 +0200 | [diff] [blame] | 38 | struct mmu_table_batch { |
| 39 | struct rcu_head rcu; |
| 40 | unsigned int nr; |
| 41 | void *tables[0]; |
| 42 | }; |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 43 | |
Martin Schwidefsky | 36409f6 | 2011-06-06 14:14:41 +0200 | [diff] [blame] | 44 | #define MAX_TABLE_BATCH \ |
| 45 | ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *)) |
| 46 | |
| 47 | extern void tlb_table_flush(struct mmu_gather *tlb); |
| 48 | extern void tlb_remove_table(struct mmu_gather *tlb, void *table); |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 49 | |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 50 | static inline void tlb_gather_mmu(struct mmu_gather *tlb, |
| 51 | struct mm_struct *mm, |
Linus Torvalds | 2b04725 | 2013-08-15 11:42:25 -0700 | [diff] [blame] | 52 | unsigned long start, |
| 53 | unsigned long end) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 54 | { |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 55 | tlb->mm = mm; |
Linus Torvalds | 2b04725 | 2013-08-15 11:42:25 -0700 | [diff] [blame] | 56 | tlb->start = start; |
| 57 | tlb->end = end; |
| 58 | tlb->fullmm = !(start | (end+1)); |
Martin Schwidefsky | 36409f6 | 2011-06-06 14:14:41 +0200 | [diff] [blame] | 59 | tlb->batch = NULL; |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 60 | } |
| 61 | |
Linus Torvalds | 1cf35d4 | 2014-04-25 16:05:40 -0700 | [diff] [blame] | 62 | static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 63 | { |
Martin Schwidefsky | 5c474a1 | 2013-08-16 13:31:40 +0200 | [diff] [blame] | 64 | __tlb_flush_mm_lazy(tlb->mm); |
Linus Torvalds | 1cf35d4 | 2014-04-25 16:05:40 -0700 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | static inline void tlb_flush_mmu_free(struct mmu_gather *tlb) |
| 68 | { |
Martin Schwidefsky | 36409f6 | 2011-06-06 14:14:41 +0200 | [diff] [blame] | 69 | tlb_table_flush(tlb); |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 70 | } |
| 71 | |
Linus Torvalds | 1cf35d4 | 2014-04-25 16:05:40 -0700 | [diff] [blame] | 72 | |
| 73 | static inline void tlb_flush_mmu(struct mmu_gather *tlb) |
| 74 | { |
| 75 | tlb_flush_mmu_tlbonly(tlb); |
| 76 | tlb_flush_mmu_free(tlb); |
| 77 | } |
| 78 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 79 | static inline void tlb_finish_mmu(struct mmu_gather *tlb, |
| 80 | unsigned long start, unsigned long end) |
| 81 | { |
Martin Schwidefsky | 5c474a1 | 2013-08-16 13:31:40 +0200 | [diff] [blame] | 82 | tlb_flush_mmu(tlb); |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 83 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | |
| 85 | /* |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 86 | * Release the page cache reference for a pte removed by |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 87 | * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 88 | * has already been freed, so just do free_page_and_swap_cache. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | */ |
Aneesh Kumar K.V | e9d55e1 | 2016-07-26 15:24:09 -0700 | [diff] [blame] | 90 | static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page) |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 91 | { |
| 92 | free_page_and_swap_cache(page); |
Aneesh Kumar K.V | e9d55e1 | 2016-07-26 15:24:09 -0700 | [diff] [blame] | 93 | return false; /* avoid calling tlb_flush_mmu */ |
Peter Zijlstra | 68f0392 | 2011-05-24 17:11:51 -0700 | [diff] [blame] | 94 | } |
| 95 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 96 | static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) |
| 97 | { |
| 98 | free_page_and_swap_cache(page); |
| 99 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 101 | static inline bool __tlb_remove_page_size(struct mmu_gather *tlb, |
| 102 | struct page *page, int page_size) |
| 103 | { |
| 104 | return __tlb_remove_page(tlb, page); |
| 105 | } |
| 106 | |
Aneesh Kumar K.V | e77b085 | 2016-07-26 15:24:12 -0700 | [diff] [blame] | 107 | static inline void tlb_remove_page_size(struct mmu_gather *tlb, |
| 108 | struct page *page, int page_size) |
| 109 | { |
| 110 | return tlb_remove_page(tlb, page); |
| 111 | } |
| 112 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 113 | /* |
| 114 | * pte_free_tlb frees a pte table and clears the CRSTE for the |
| 115 | * page table from the tlb. |
| 116 | */ |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 117 | static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, |
| 118 | unsigned long address) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 119 | { |
Martin Schwidefsky | 527e30b | 2014-04-30 16:04:25 +0200 | [diff] [blame] | 120 | page_table_free_rcu(tlb, (unsigned long *) pte, address); |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 121 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 123 | /* |
| 124 | * pmd_free_tlb frees a pmd table and clears the CRSTE for the |
| 125 | * segment table entry from the tlb. |
Martin Schwidefsky | 6252d70 | 2008-02-09 18:24:37 +0100 | [diff] [blame] | 126 | * If the mm uses a two level page table the single pmd is freed |
| 127 | * as the pgd. pmd_free_tlb checks the asce_limit against 2GB |
| 128 | * to avoid the double free of the pmd in this case. |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 129 | */ |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 130 | static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, |
| 131 | unsigned long address) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 132 | { |
Martin Schwidefsky | 6252d70 | 2008-02-09 18:24:37 +0100 | [diff] [blame] | 133 | if (tlb->mm->context.asce_limit <= (1UL << 31)) |
| 134 | return; |
Martin Schwidefsky | 9de45f7 | 2014-12-04 11:07:19 +0100 | [diff] [blame] | 135 | pgtable_pmd_page_dtor(virt_to_page(pmd)); |
Martin Schwidefsky | 02a8f3a | 2014-04-03 13:54:59 +0200 | [diff] [blame] | 136 | tlb_remove_table(tlb, pmd); |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 137 | } |
| 138 | |
Martin Schwidefsky | 5a216a2 | 2008-02-09 18:24:36 +0100 | [diff] [blame] | 139 | /* |
| 140 | * pud_free_tlb frees a pud table and clears the CRSTE for the |
| 141 | * region third table entry from the tlb. |
Martin Schwidefsky | 6252d70 | 2008-02-09 18:24:37 +0100 | [diff] [blame] | 142 | * If the mm uses a three level page table the single pud is freed |
| 143 | * as the pgd. pud_free_tlb checks the asce_limit against 4TB |
| 144 | * to avoid the double free of the pud in this case. |
Martin Schwidefsky | 5a216a2 | 2008-02-09 18:24:36 +0100 | [diff] [blame] | 145 | */ |
Benjamin Herrenschmidt | 9e1b32c | 2009-07-22 15:44:28 +1000 | [diff] [blame] | 146 | static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud, |
| 147 | unsigned long address) |
Martin Schwidefsky | 5a216a2 | 2008-02-09 18:24:36 +0100 | [diff] [blame] | 148 | { |
Martin Schwidefsky | 6252d70 | 2008-02-09 18:24:37 +0100 | [diff] [blame] | 149 | if (tlb->mm->context.asce_limit <= (1UL << 42)) |
| 150 | return; |
Martin Schwidefsky | 02a8f3a | 2014-04-03 13:54:59 +0200 | [diff] [blame] | 151 | tlb_remove_table(tlb, pud); |
Martin Schwidefsky | 5a216a2 | 2008-02-09 18:24:36 +0100 | [diff] [blame] | 152 | } |
Martin Schwidefsky | 190a1d7 | 2007-10-22 12:52:48 +0200 | [diff] [blame] | 153 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 154 | #define tlb_start_vma(tlb, vma) do { } while (0) |
| 155 | #define tlb_end_vma(tlb, vma) do { } while (0) |
| 156 | #define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0) |
Gerald Schaefer | 1ae1c1d | 2012-10-08 16:30:24 -0700 | [diff] [blame] | 157 | #define tlb_remove_pmd_tlb_entry(tlb, pmdp, addr) do { } while (0) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 158 | #define tlb_migrate_finish(mm) do { } while (0) |
Aneesh Kumar K.V | b528e4b | 2016-12-12 16:42:37 -0800 | [diff] [blame] | 159 | #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ |
| 160 | tlb_remove_tlb_entry(tlb, ptep, address) |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 161 | |
Aneesh Kumar K.V | 07e3266 | 2016-12-12 16:42:40 -0800 | [diff] [blame] | 162 | #define tlb_remove_check_page_size_change tlb_remove_check_page_size_change |
| 163 | static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb, |
| 164 | unsigned int page_size) |
| 165 | { |
| 166 | } |
| 167 | |
Martin Schwidefsky | ba8a922 | 2007-10-22 12:52:44 +0200 | [diff] [blame] | 168 | #endif /* _S390_TLB_H */ |