Robert P. J. Day | 96532ba | 2008-02-03 15:06:26 +0200 | [diff] [blame] | 1 | #ifndef _LINUX_DMA_MAPPING_H |
| 2 | #define _LINUX_DMA_MAPPING_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 4 | #include <linux/sizes.h> |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 5 | #include <linux/string.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <linux/device.h> |
| 7 | #include <linux/err.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 8 | #include <linux/dma-debug.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 9 | #include <linux/dma-direction.h> |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 10 | #include <linux/scatterlist.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 11 | #include <linux/kmemcheck.h> |
| 12 | #include <linux/bug.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 14 | /** |
| 15 | * List of possible attributes associated with a DMA mapping. The semantics |
| 16 | * of each attribute should be defined in Documentation/DMA-attributes.txt. |
| 17 | * |
| 18 | * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute |
| 19 | * forces all pending DMA writes to complete. |
| 20 | */ |
| 21 | #define DMA_ATTR_WRITE_BARRIER (1UL << 0) |
| 22 | /* |
| 23 | * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping |
| 24 | * may be weakly ordered, that is that reads and writes may pass each other. |
| 25 | */ |
| 26 | #define DMA_ATTR_WEAK_ORDERING (1UL << 1) |
| 27 | /* |
| 28 | * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be |
| 29 | * buffered to improve performance. |
| 30 | */ |
| 31 | #define DMA_ATTR_WRITE_COMBINE (1UL << 2) |
| 32 | /* |
| 33 | * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either |
| 34 | * consistent or non-consistent memory as it sees fit. |
| 35 | */ |
| 36 | #define DMA_ATTR_NON_CONSISTENT (1UL << 3) |
| 37 | /* |
| 38 | * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel |
| 39 | * virtual mapping for the allocated buffer. |
| 40 | */ |
| 41 | #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) |
| 42 | /* |
| 43 | * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of |
| 44 | * the CPU cache for the given buffer assuming that it has been already |
| 45 | * transferred to 'device' domain. |
| 46 | */ |
| 47 | #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) |
| 48 | /* |
| 49 | * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer |
| 50 | * in physical memory. |
| 51 | */ |
| 52 | #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) |
| 53 | /* |
| 54 | * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem |
| 55 | * that it's probably not worth the time to try to allocate memory to in a way |
| 56 | * that gives better TLB efficiency. |
| 57 | */ |
| 58 | #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) |
Mauricio Faria de Oliveira | a9a62c9 | 2016-10-11 13:54:14 -0700 | [diff] [blame] | 59 | /* |
| 60 | * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress |
| 61 | * allocation failure reports (similarly to __GFP_NOWARN). |
| 62 | */ |
| 63 | #define DMA_ATTR_NO_WARN (1UL << 8) |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 64 | |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 65 | /* |
Mitchel Humpherys | b2fb366 | 2017-01-06 18:58:11 +0530 | [diff] [blame] | 66 | * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully |
| 67 | * accessible at an elevated privilege level (and ideally inaccessible or |
| 68 | * at least read-only at lesser-privileged levels). |
| 69 | */ |
| 70 | #define DMA_ATTR_PRIVILEGED (1UL << 9) |
| 71 | |
| 72 | /* |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 73 | * A dma_addr_t can hold any valid DMA or bus address for the platform. |
| 74 | * It can be given to a device to use as a DMA source or target. A CPU cannot |
| 75 | * reference a dma_addr_t directly because there may be translation between |
| 76 | * its physical address space and the bus address space. |
| 77 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 78 | struct dma_map_ops { |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 79 | void* (*alloc)(struct device *dev, size_t size, |
| 80 | dma_addr_t *dma_handle, gfp_t gfp, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 81 | unsigned long attrs); |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 82 | void (*free)(struct device *dev, size_t size, |
| 83 | void *vaddr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 84 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 85 | int (*mmap)(struct device *, struct vm_area_struct *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 86 | void *, dma_addr_t, size_t, |
| 87 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 88 | |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 89 | int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 90 | dma_addr_t, size_t, unsigned long attrs); |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 91 | |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 92 | dma_addr_t (*map_page)(struct device *dev, struct page *page, |
| 93 | unsigned long offset, size_t size, |
| 94 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 95 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 96 | void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, |
| 97 | size_t size, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 98 | unsigned long attrs); |
Ricardo Ribalda Delgado | 04abab6 | 2015-02-11 13:53:15 +0100 | [diff] [blame] | 99 | /* |
| 100 | * map_sg returns 0 on error and a value > 0 on success. |
| 101 | * It should never return a value < 0. |
| 102 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 103 | int (*map_sg)(struct device *dev, struct scatterlist *sg, |
| 104 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 105 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 106 | void (*unmap_sg)(struct device *dev, |
| 107 | struct scatterlist *sg, int nents, |
| 108 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 109 | unsigned long attrs); |
Niklas Söderlund | ba409b3 | 2016-08-10 13:22:14 +0200 | [diff] [blame] | 110 | dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, |
| 111 | size_t size, enum dma_data_direction dir, |
| 112 | unsigned long attrs); |
| 113 | void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, |
| 114 | size_t size, enum dma_data_direction dir, |
| 115 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 116 | void (*sync_single_for_cpu)(struct device *dev, |
| 117 | dma_addr_t dma_handle, size_t size, |
| 118 | enum dma_data_direction dir); |
| 119 | void (*sync_single_for_device)(struct device *dev, |
| 120 | dma_addr_t dma_handle, size_t size, |
| 121 | enum dma_data_direction dir); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 122 | void (*sync_sg_for_cpu)(struct device *dev, |
| 123 | struct scatterlist *sg, int nents, |
| 124 | enum dma_data_direction dir); |
| 125 | void (*sync_sg_for_device)(struct device *dev, |
| 126 | struct scatterlist *sg, int nents, |
| 127 | enum dma_data_direction dir); |
| 128 | int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); |
| 129 | int (*dma_supported)(struct device *dev, u64 mask); |
FUJITA Tomonori | f726f30e | 2009-08-04 19:08:24 +0000 | [diff] [blame] | 130 | int (*set_dma_mask)(struct device *dev, u64 mask); |
Milton Miller | 3a8f755 | 2011-06-24 09:05:23 +0000 | [diff] [blame] | 131 | #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK |
| 132 | u64 (*get_required_mask)(struct device *dev); |
| 133 | #endif |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 134 | int is_phys; |
| 135 | }; |
| 136 | |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 137 | extern const struct dma_map_ops dma_noop_ops; |
Bart Van Assche | 551199a | 2017-01-20 13:04:07 -0800 | [diff] [blame] | 138 | extern const struct dma_map_ops dma_virt_ops; |
Christian Borntraeger | a8463d4 | 2016-02-02 21:46:32 -0800 | [diff] [blame] | 139 | |
Andrew Morton | 8f286c3 | 2007-10-18 03:05:07 -0700 | [diff] [blame] | 140 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
Borislav Petkov | 34c6538 | 2007-10-18 03:05:06 -0700 | [diff] [blame] | 141 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 142 | #define DMA_MASK_NONE 0x0ULL |
| 143 | |
Rolf Eike Beer | d6bd3a3 | 2006-09-29 01:59:48 -0700 | [diff] [blame] | 144 | static inline int valid_dma_direction(int dma_direction) |
| 145 | { |
| 146 | return ((dma_direction == DMA_BIDIRECTIONAL) || |
| 147 | (dma_direction == DMA_TO_DEVICE) || |
| 148 | (dma_direction == DMA_FROM_DEVICE)); |
| 149 | } |
| 150 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 151 | static inline int is_device_dma_capable(struct device *dev) |
| 152 | { |
| 153 | return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; |
| 154 | } |
| 155 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 156 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
| 157 | /* |
| 158 | * These three functions are only for dma allocator. |
| 159 | * Don't use them in device drivers. |
| 160 | */ |
| 161 | int dma_alloc_from_coherent(struct device *dev, ssize_t size, |
| 162 | dma_addr_t *dma_handle, void **ret); |
| 163 | int dma_release_from_coherent(struct device *dev, int order, void *vaddr); |
| 164 | |
| 165 | int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma, |
| 166 | void *cpu_addr, size_t size, int *ret); |
| 167 | #else |
| 168 | #define dma_alloc_from_coherent(dev, size, handle, ret) (0) |
| 169 | #define dma_release_from_coherent(dev, order, vaddr) (0) |
| 170 | #define dma_mmap_from_coherent(dev, vma, vaddr, order, ret) (0) |
| 171 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
| 172 | |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 173 | #ifdef CONFIG_HAS_DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | #include <asm/dma-mapping.h> |
Bart Van Assche | 815dd18 | 2017-01-20 13:04:04 -0800 | [diff] [blame] | 175 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
| 176 | { |
| 177 | if (dev && dev->dma_ops) |
| 178 | return dev->dma_ops; |
| 179 | return get_arch_dma_ops(dev ? dev->bus : NULL); |
| 180 | } |
| 181 | |
Bart Van Assche | ca6e8e1 | 2017-01-20 13:04:03 -0800 | [diff] [blame] | 182 | static inline void set_dma_ops(struct device *dev, |
| 183 | const struct dma_map_ops *dma_ops) |
| 184 | { |
| 185 | dev->dma_ops = dma_ops; |
| 186 | } |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 187 | #else |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 188 | /* |
| 189 | * Define the dma api to allow compilation but not linking of |
| 190 | * dma dependent code. Code that depends on the dma-mapping |
| 191 | * API needs to set 'depends on HAS_DMA' in its Kconfig |
| 192 | */ |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 193 | extern const struct dma_map_ops bad_dma_ops; |
| 194 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 195 | { |
| 196 | return &bad_dma_ops; |
| 197 | } |
| 198 | #endif |
| 199 | |
| 200 | static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, |
| 201 | size_t size, |
| 202 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 203 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 204 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 205 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 206 | dma_addr_t addr; |
| 207 | |
| 208 | kmemcheck_mark_initialized(ptr, size); |
| 209 | BUG_ON(!valid_dma_direction(dir)); |
| 210 | addr = ops->map_page(dev, virt_to_page(ptr), |
Geliang Tang | 8e99469 | 2016-01-20 15:02:12 -0800 | [diff] [blame] | 211 | offset_in_page(ptr), size, |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 212 | dir, attrs); |
| 213 | debug_dma_map_page(dev, virt_to_page(ptr), |
Geliang Tang | 8e99469 | 2016-01-20 15:02:12 -0800 | [diff] [blame] | 214 | offset_in_page(ptr), size, |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 215 | dir, addr, true); |
| 216 | return addr; |
| 217 | } |
| 218 | |
| 219 | static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, |
| 220 | size_t size, |
| 221 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 222 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 223 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 224 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 225 | |
| 226 | BUG_ON(!valid_dma_direction(dir)); |
| 227 | if (ops->unmap_page) |
| 228 | ops->unmap_page(dev, addr, size, dir, attrs); |
| 229 | debug_dma_unmap_page(dev, addr, size, dir, true); |
| 230 | } |
| 231 | |
| 232 | /* |
| 233 | * dma_maps_sg_attrs returns 0 on error and > 0 on success. |
| 234 | * It should never return a value < 0. |
| 235 | */ |
| 236 | static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 237 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 238 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 239 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 240 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 241 | int i, ents; |
| 242 | struct scatterlist *s; |
| 243 | |
| 244 | for_each_sg(sg, s, nents, i) |
| 245 | kmemcheck_mark_initialized(sg_virt(s), s->length); |
| 246 | BUG_ON(!valid_dma_direction(dir)); |
| 247 | ents = ops->map_sg(dev, sg, nents, dir, attrs); |
| 248 | BUG_ON(ents < 0); |
| 249 | debug_dma_map_sg(dev, sg, nents, ents, dir); |
| 250 | |
| 251 | return ents; |
| 252 | } |
| 253 | |
| 254 | static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 255 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 256 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 257 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 258 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 259 | |
| 260 | BUG_ON(!valid_dma_direction(dir)); |
| 261 | debug_dma_unmap_sg(dev, sg, nents, dir); |
| 262 | if (ops->unmap_sg) |
| 263 | ops->unmap_sg(dev, sg, nents, dir, attrs); |
| 264 | } |
| 265 | |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 266 | static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
| 267 | struct page *page, |
| 268 | size_t offset, size_t size, |
| 269 | enum dma_data_direction dir, |
| 270 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 271 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 272 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 273 | dma_addr_t addr; |
| 274 | |
| 275 | kmemcheck_mark_initialized(page_address(page) + offset, size); |
| 276 | BUG_ON(!valid_dma_direction(dir)); |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 277 | addr = ops->map_page(dev, page, offset, size, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 278 | debug_dma_map_page(dev, page, offset, size, dir, addr, false); |
| 279 | |
| 280 | return addr; |
| 281 | } |
| 282 | |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 283 | static inline void dma_unmap_page_attrs(struct device *dev, |
| 284 | dma_addr_t addr, size_t size, |
| 285 | enum dma_data_direction dir, |
| 286 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 287 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 288 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 289 | |
| 290 | BUG_ON(!valid_dma_direction(dir)); |
| 291 | if (ops->unmap_page) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 292 | ops->unmap_page(dev, addr, size, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 293 | debug_dma_unmap_page(dev, addr, size, dir, false); |
| 294 | } |
| 295 | |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 296 | static inline dma_addr_t dma_map_resource(struct device *dev, |
| 297 | phys_addr_t phys_addr, |
| 298 | size_t size, |
| 299 | enum dma_data_direction dir, |
| 300 | unsigned long attrs) |
| 301 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 302 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 303 | dma_addr_t addr; |
| 304 | |
| 305 | BUG_ON(!valid_dma_direction(dir)); |
| 306 | |
| 307 | /* Don't allow RAM to be mapped */ |
Niklas Söderlund | 3757dc4 | 2016-09-29 12:02:40 +0200 | [diff] [blame] | 308 | BUG_ON(pfn_valid(PHYS_PFN(phys_addr))); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 309 | |
| 310 | addr = phys_addr; |
| 311 | if (ops->map_resource) |
| 312 | addr = ops->map_resource(dev, phys_addr, size, dir, attrs); |
| 313 | |
| 314 | debug_dma_map_resource(dev, phys_addr, size, dir, addr); |
| 315 | |
| 316 | return addr; |
| 317 | } |
| 318 | |
| 319 | static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
| 320 | size_t size, enum dma_data_direction dir, |
| 321 | unsigned long attrs) |
| 322 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 323 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 324 | |
| 325 | BUG_ON(!valid_dma_direction(dir)); |
| 326 | if (ops->unmap_resource) |
| 327 | ops->unmap_resource(dev, addr, size, dir, attrs); |
| 328 | debug_dma_unmap_resource(dev, addr, size, dir); |
| 329 | } |
| 330 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 331 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
| 332 | size_t size, |
| 333 | enum dma_data_direction dir) |
| 334 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 335 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 336 | |
| 337 | BUG_ON(!valid_dma_direction(dir)); |
| 338 | if (ops->sync_single_for_cpu) |
| 339 | ops->sync_single_for_cpu(dev, addr, size, dir); |
| 340 | debug_dma_sync_single_for_cpu(dev, addr, size, dir); |
| 341 | } |
| 342 | |
| 343 | static inline void dma_sync_single_for_device(struct device *dev, |
| 344 | dma_addr_t addr, size_t size, |
| 345 | enum dma_data_direction dir) |
| 346 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 347 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 348 | |
| 349 | BUG_ON(!valid_dma_direction(dir)); |
| 350 | if (ops->sync_single_for_device) |
| 351 | ops->sync_single_for_device(dev, addr, size, dir); |
| 352 | debug_dma_sync_single_for_device(dev, addr, size, dir); |
| 353 | } |
| 354 | |
| 355 | static inline void dma_sync_single_range_for_cpu(struct device *dev, |
| 356 | dma_addr_t addr, |
| 357 | unsigned long offset, |
| 358 | size_t size, |
| 359 | enum dma_data_direction dir) |
| 360 | { |
| 361 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 362 | |
| 363 | BUG_ON(!valid_dma_direction(dir)); |
| 364 | if (ops->sync_single_for_cpu) |
| 365 | ops->sync_single_for_cpu(dev, addr + offset, size, dir); |
| 366 | debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir); |
| 367 | } |
| 368 | |
| 369 | static inline void dma_sync_single_range_for_device(struct device *dev, |
| 370 | dma_addr_t addr, |
| 371 | unsigned long offset, |
| 372 | size_t size, |
| 373 | enum dma_data_direction dir) |
| 374 | { |
| 375 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 376 | |
| 377 | BUG_ON(!valid_dma_direction(dir)); |
| 378 | if (ops->sync_single_for_device) |
| 379 | ops->sync_single_for_device(dev, addr + offset, size, dir); |
| 380 | debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir); |
| 381 | } |
| 382 | |
| 383 | static inline void |
| 384 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
| 385 | int nelems, enum dma_data_direction dir) |
| 386 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 387 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 388 | |
| 389 | BUG_ON(!valid_dma_direction(dir)); |
| 390 | if (ops->sync_sg_for_cpu) |
| 391 | ops->sync_sg_for_cpu(dev, sg, nelems, dir); |
| 392 | debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); |
| 393 | } |
| 394 | |
| 395 | static inline void |
| 396 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
| 397 | int nelems, enum dma_data_direction dir) |
| 398 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 399 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 400 | |
| 401 | BUG_ON(!valid_dma_direction(dir)); |
| 402 | if (ops->sync_sg_for_device) |
| 403 | ops->sync_sg_for_device(dev, sg, nelems, dir); |
| 404 | debug_dma_sync_sg_for_device(dev, sg, nelems, dir); |
| 405 | |
| 406 | } |
| 407 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 408 | #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) |
| 409 | #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) |
| 410 | #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) |
| 411 | #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 412 | #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) |
| 413 | #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 414 | |
| 415 | extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
| 416 | void *cpu_addr, dma_addr_t dma_addr, size_t size); |
| 417 | |
| 418 | void *dma_common_contiguous_remap(struct page *page, size_t size, |
| 419 | unsigned long vm_flags, |
| 420 | pgprot_t prot, const void *caller); |
| 421 | |
| 422 | void *dma_common_pages_remap(struct page **pages, size_t size, |
| 423 | unsigned long vm_flags, pgprot_t prot, |
| 424 | const void *caller); |
| 425 | void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); |
| 426 | |
| 427 | /** |
| 428 | * dma_mmap_attrs - map a coherent DMA allocation into user space |
| 429 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 430 | * @vma: vm_area_struct describing requested user mapping |
| 431 | * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs |
| 432 | * @handle: device-view address returned from dma_alloc_attrs |
| 433 | * @size: size of memory originally requested in dma_alloc_attrs |
| 434 | * @attrs: attributes of mapping properties requested in dma_alloc_attrs |
| 435 | * |
| 436 | * Map a coherent DMA buffer previously allocated by dma_alloc_attrs |
| 437 | * into user space. The coherent DMA buffer must not be freed by the |
| 438 | * driver until the user space mapping has been released. |
| 439 | */ |
| 440 | static inline int |
| 441 | dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 442 | dma_addr_t dma_addr, size_t size, unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 443 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 444 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 445 | BUG_ON(!ops); |
| 446 | if (ops->mmap) |
| 447 | return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); |
| 448 | return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size); |
| 449 | } |
| 450 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 451 | #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 452 | |
| 453 | int |
| 454 | dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, |
| 455 | void *cpu_addr, dma_addr_t dma_addr, size_t size); |
| 456 | |
| 457 | static inline int |
| 458 | dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 459 | dma_addr_t dma_addr, size_t size, |
| 460 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 461 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 462 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 463 | BUG_ON(!ops); |
| 464 | if (ops->get_sgtable) |
| 465 | return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, |
| 466 | attrs); |
| 467 | return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size); |
| 468 | } |
| 469 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 470 | #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 471 | |
| 472 | #ifndef arch_dma_alloc_attrs |
| 473 | #define arch_dma_alloc_attrs(dev, flag) (true) |
| 474 | #endif |
| 475 | |
| 476 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, |
| 477 | dma_addr_t *dma_handle, gfp_t flag, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 478 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 479 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 480 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 481 | void *cpu_addr; |
| 482 | |
| 483 | BUG_ON(!ops); |
| 484 | |
| 485 | if (dma_alloc_from_coherent(dev, size, dma_handle, &cpu_addr)) |
| 486 | return cpu_addr; |
| 487 | |
| 488 | if (!arch_dma_alloc_attrs(&dev, &flag)) |
| 489 | return NULL; |
| 490 | if (!ops->alloc) |
| 491 | return NULL; |
| 492 | |
| 493 | cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); |
| 494 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); |
| 495 | return cpu_addr; |
| 496 | } |
| 497 | |
| 498 | static inline void dma_free_attrs(struct device *dev, size_t size, |
| 499 | void *cpu_addr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 500 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 501 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 502 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 503 | |
| 504 | BUG_ON(!ops); |
| 505 | WARN_ON(irqs_disabled()); |
| 506 | |
| 507 | if (dma_release_from_coherent(dev, get_order(size), cpu_addr)) |
| 508 | return; |
| 509 | |
Zhen Lei | d6b7eae | 2016-03-09 14:08:38 -0800 | [diff] [blame] | 510 | if (!ops->free || !cpu_addr) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 511 | return; |
| 512 | |
| 513 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); |
| 514 | ops->free(dev, size, cpu_addr, dma_handle, attrs); |
| 515 | } |
| 516 | |
| 517 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
| 518 | dma_addr_t *dma_handle, gfp_t flag) |
| 519 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 520 | return dma_alloc_attrs(dev, size, dma_handle, flag, 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 521 | } |
| 522 | |
| 523 | static inline void dma_free_coherent(struct device *dev, size_t size, |
| 524 | void *cpu_addr, dma_addr_t dma_handle) |
| 525 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 526 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 527 | } |
| 528 | |
| 529 | static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, |
| 530 | dma_addr_t *dma_handle, gfp_t gfp) |
| 531 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 532 | return dma_alloc_attrs(dev, size, dma_handle, gfp, |
| 533 | DMA_ATTR_NON_CONSISTENT); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 534 | } |
| 535 | |
| 536 | static inline void dma_free_noncoherent(struct device *dev, size_t size, |
| 537 | void *cpu_addr, dma_addr_t dma_handle) |
| 538 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 539 | dma_free_attrs(dev, size, cpu_addr, dma_handle, |
| 540 | DMA_ATTR_NON_CONSISTENT); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 541 | } |
| 542 | |
| 543 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| 544 | { |
| 545 | debug_dma_mapping_error(dev, dma_addr); |
| 546 | |
| 547 | if (get_dma_ops(dev)->mapping_error) |
| 548 | return get_dma_ops(dev)->mapping_error(dev, dma_addr); |
| 549 | |
| 550 | #ifdef DMA_ERROR_CODE |
| 551 | return dma_addr == DMA_ERROR_CODE; |
| 552 | #else |
| 553 | return 0; |
| 554 | #endif |
| 555 | } |
| 556 | |
| 557 | #ifndef HAVE_ARCH_DMA_SUPPORTED |
| 558 | static inline int dma_supported(struct device *dev, u64 mask) |
| 559 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 560 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 561 | |
| 562 | if (!ops) |
| 563 | return 0; |
| 564 | if (!ops->dma_supported) |
| 565 | return 1; |
| 566 | return ops->dma_supported(dev, mask); |
| 567 | } |
| 568 | #endif |
| 569 | |
| 570 | #ifndef HAVE_ARCH_DMA_SET_MASK |
| 571 | static inline int dma_set_mask(struct device *dev, u64 mask) |
| 572 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 573 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 574 | |
| 575 | if (ops->set_dma_mask) |
| 576 | return ops->set_dma_mask(dev, mask); |
| 577 | |
| 578 | if (!dev->dma_mask || !dma_supported(dev, mask)) |
| 579 | return -EIO; |
| 580 | *dev->dma_mask = mask; |
| 581 | return 0; |
| 582 | } |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 583 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 585 | static inline u64 dma_get_mask(struct device *dev) |
| 586 | { |
FUJITA Tomonori | 07a2c01 | 2008-09-19 02:02:05 +0900 | [diff] [blame] | 587 | if (dev && dev->dma_mask && *dev->dma_mask) |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 588 | return *dev->dma_mask; |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 589 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 590 | } |
| 591 | |
Rob Herring | 58af4a2 | 2012-03-20 14:33:01 -0500 | [diff] [blame] | 592 | #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 593 | int dma_set_coherent_mask(struct device *dev, u64 mask); |
| 594 | #else |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 595 | static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
| 596 | { |
| 597 | if (!dma_supported(dev, mask)) |
| 598 | return -EIO; |
| 599 | dev->coherent_dma_mask = mask; |
| 600 | return 0; |
| 601 | } |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 602 | #endif |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 603 | |
Russell King | 4aa806b | 2013-06-26 13:49:44 +0100 | [diff] [blame] | 604 | /* |
| 605 | * Set both the DMA mask and the coherent DMA mask to the same thing. |
| 606 | * Note that we don't check the return value from dma_set_coherent_mask() |
| 607 | * as the DMA API guarantees that the coherent DMA mask can be set to |
| 608 | * the same or smaller than the streaming DMA mask. |
| 609 | */ |
| 610 | static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) |
| 611 | { |
| 612 | int rc = dma_set_mask(dev, mask); |
| 613 | if (rc == 0) |
| 614 | dma_set_coherent_mask(dev, mask); |
| 615 | return rc; |
| 616 | } |
| 617 | |
Russell King | fa6a8d6 | 2013-06-27 12:21:45 +0100 | [diff] [blame] | 618 | /* |
| 619 | * Similar to the above, except it deals with the case where the device |
| 620 | * does not have dev->dma_mask appropriately setup. |
| 621 | */ |
| 622 | static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) |
| 623 | { |
| 624 | dev->dma_mask = &dev->coherent_dma_mask; |
| 625 | return dma_set_mask_and_coherent(dev, mask); |
| 626 | } |
| 627 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | extern u64 dma_get_required_mask(struct device *dev); |
| 629 | |
Will Deacon | a3a60f8 | 2014-08-27 15:49:10 +0100 | [diff] [blame] | 630 | #ifndef arch_setup_dma_ops |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 631 | static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 632 | u64 size, const struct iommu_ops *iommu, |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 633 | bool coherent) { } |
| 634 | #endif |
| 635 | |
| 636 | #ifndef arch_teardown_dma_ops |
| 637 | static inline void arch_teardown_dma_ops(struct device *dev) { } |
Santosh Shilimkar | 591c1ee | 2014-04-24 11:30:04 -0400 | [diff] [blame] | 638 | #endif |
| 639 | |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 640 | static inline unsigned int dma_get_max_seg_size(struct device *dev) |
| 641 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 642 | if (dev->dma_parms && dev->dma_parms->max_segment_size) |
| 643 | return dev->dma_parms->max_segment_size; |
| 644 | return SZ_64K; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 645 | } |
| 646 | |
| 647 | static inline unsigned int dma_set_max_seg_size(struct device *dev, |
| 648 | unsigned int size) |
| 649 | { |
| 650 | if (dev->dma_parms) { |
| 651 | dev->dma_parms->max_segment_size = size; |
| 652 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 653 | } |
| 654 | return -EIO; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 655 | } |
| 656 | |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 657 | static inline unsigned long dma_get_seg_boundary(struct device *dev) |
| 658 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 659 | if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) |
| 660 | return dev->dma_parms->segment_boundary_mask; |
| 661 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 662 | } |
| 663 | |
| 664 | static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) |
| 665 | { |
| 666 | if (dev->dma_parms) { |
| 667 | dev->dma_parms->segment_boundary_mask = mask; |
| 668 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 669 | } |
| 670 | return -EIO; |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 671 | } |
| 672 | |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 673 | #ifndef dma_max_pfn |
| 674 | static inline unsigned long dma_max_pfn(struct device *dev) |
| 675 | { |
| 676 | return *dev->dma_mask >> PAGE_SHIFT; |
| 677 | } |
| 678 | #endif |
| 679 | |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 680 | static inline void *dma_zalloc_coherent(struct device *dev, size_t size, |
| 681 | dma_addr_t *dma_handle, gfp_t flag) |
| 682 | { |
Joe Perches | ede23fa | 2013-08-26 22:45:23 -0700 | [diff] [blame] | 683 | void *ret = dma_alloc_coherent(dev, size, dma_handle, |
| 684 | flag | __GFP_ZERO); |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 685 | return ret; |
| 686 | } |
| 687 | |
Heiko Carstens | e259f19 | 2010-08-13 09:39:18 +0200 | [diff] [blame] | 688 | #ifdef CONFIG_HAS_DMA |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 689 | static inline int dma_get_cache_alignment(void) |
| 690 | { |
| 691 | #ifdef ARCH_DMA_MINALIGN |
| 692 | return ARCH_DMA_MINALIGN; |
| 693 | #endif |
| 694 | return 1; |
| 695 | } |
Heiko Carstens | e259f19 | 2010-08-13 09:39:18 +0200 | [diff] [blame] | 696 | #endif |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 697 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | /* flags for the coherent memory api */ |
| 699 | #define DMA_MEMORY_MAP 0x01 |
| 700 | #define DMA_MEMORY_IO 0x02 |
| 701 | #define DMA_MEMORY_INCLUDES_CHILDREN 0x04 |
| 702 | #define DMA_MEMORY_EXCLUSIVE 0x08 |
| 703 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 704 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
| 705 | int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
| 706 | dma_addr_t device_addr, size_t size, int flags); |
| 707 | void dma_release_declared_memory(struct device *dev); |
| 708 | void *dma_mark_declared_memory_occupied(struct device *dev, |
| 709 | dma_addr_t device_addr, size_t size); |
| 710 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | static inline int |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 712 | dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 713 | dma_addr_t device_addr, size_t size, int flags) |
| 714 | { |
| 715 | return 0; |
| 716 | } |
| 717 | |
| 718 | static inline void |
| 719 | dma_release_declared_memory(struct device *dev) |
| 720 | { |
| 721 | } |
| 722 | |
| 723 | static inline void * |
| 724 | dma_mark_declared_memory_occupied(struct device *dev, |
| 725 | dma_addr_t device_addr, size_t size) |
| 726 | { |
| 727 | return ERR_PTR(-EBUSY); |
| 728 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 729 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 731 | /* |
| 732 | * Managed DMA API |
| 733 | */ |
| 734 | extern void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 735 | dma_addr_t *dma_handle, gfp_t gfp); |
| 736 | extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
| 737 | dma_addr_t dma_handle); |
| 738 | extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, |
| 739 | dma_addr_t *dma_handle, gfp_t gfp); |
| 740 | extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, |
| 741 | dma_addr_t dma_handle); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 742 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 743 | extern int dmam_declare_coherent_memory(struct device *dev, |
| 744 | phys_addr_t phys_addr, |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 745 | dma_addr_t device_addr, size_t size, |
| 746 | int flags); |
| 747 | extern void dmam_release_declared_memory(struct device *dev); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 748 | #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 749 | static inline int dmam_declare_coherent_memory(struct device *dev, |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 750 | phys_addr_t phys_addr, dma_addr_t device_addr, |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 751 | size_t size, gfp_t gfp) |
| 752 | { |
| 753 | return 0; |
| 754 | } |
| 755 | |
| 756 | static inline void dmam_release_declared_memory(struct device *dev) |
| 757 | { |
| 758 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 759 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 760 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 761 | static inline void *dma_alloc_wc(struct device *dev, size_t size, |
| 762 | dma_addr_t *dma_addr, gfp_t gfp) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 763 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 764 | return dma_alloc_attrs(dev, size, dma_addr, gfp, |
| 765 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 766 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 767 | #ifndef dma_alloc_writecombine |
| 768 | #define dma_alloc_writecombine dma_alloc_wc |
| 769 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 770 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 771 | static inline void dma_free_wc(struct device *dev, size_t size, |
| 772 | void *cpu_addr, dma_addr_t dma_addr) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 773 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 774 | return dma_free_attrs(dev, size, cpu_addr, dma_addr, |
| 775 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 776 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 777 | #ifndef dma_free_writecombine |
| 778 | #define dma_free_writecombine dma_free_wc |
| 779 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 780 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 781 | static inline int dma_mmap_wc(struct device *dev, |
| 782 | struct vm_area_struct *vma, |
| 783 | void *cpu_addr, dma_addr_t dma_addr, |
| 784 | size_t size) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 785 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 786 | return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, |
| 787 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 788 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 789 | #ifndef dma_mmap_writecombine |
| 790 | #define dma_mmap_writecombine dma_mmap_wc |
| 791 | #endif |
Arthur Kepner | 74bc7ce | 2008-04-29 01:00:30 -0700 | [diff] [blame] | 792 | |
Andrey Smirnov | 2481366 | 2016-09-28 15:22:33 -0700 | [diff] [blame] | 793 | #if defined(CONFIG_NEED_DMA_MAP_STATE) || defined(CONFIG_DMA_API_DEBUG) |
FUJITA Tomonori | 0acedc1 | 2010-03-10 15:23:31 -0800 | [diff] [blame] | 794 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME |
| 795 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME |
| 796 | #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) |
| 797 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) |
| 798 | #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) |
| 799 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) |
| 800 | #else |
| 801 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) |
| 802 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) |
| 803 | #define dma_unmap_addr(PTR, ADDR_NAME) (0) |
| 804 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 805 | #define dma_unmap_len(PTR, LEN_NAME) (0) |
| 806 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 807 | #endif |
| 808 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 809 | #endif |