blob: 987dcf33415c420f70dc08852da45bd654a21ea2 [file] [log] [blame]
Russell Kingf6b0fa02011-02-06 15:48:39 +00001#include <linux/linkage.h>
Russell King941aefa2011-02-11 11:32:19 +00002#include <linux/threads.h>
Russell Kingf6b0fa02011-02-06 15:48:39 +00003#include <asm/asm-offsets.h>
4#include <asm/assembler.h>
5#include <asm/glue-cache.h>
6#include <asm/glue-proc.h>
Russell Kingf6b0fa02011-02-06 15:48:39 +00007 .text
8
9/*
Russell Kingabda1bd2011-09-01 11:52:33 +010010 * Save CPU state for a suspend. This saves the CPU general purpose
11 * registers, and allocates space on the kernel stack to save the CPU
12 * specific registers and some other data for resume.
13 * r0 = suspend function arg0
14 * r1 = suspend function
Russell Kingf6b0fa02011-02-06 15:48:39 +000015 */
Russell King2c74a0c2011-06-22 17:41:48 +010016ENTRY(__cpu_suspend)
Russell Kinge8856a82011-06-13 15:58:34 +010017 stmfd sp!, {r4 - r11, lr}
Russell Kingf6b0fa02011-02-06 15:48:39 +000018#ifdef MULTI_CPU
19 ldr r10, =processor
Russell Kingabda1bd2011-09-01 11:52:33 +010020 ldr r4, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
Russell King3fd431b2011-06-13 13:53:06 +010021#else
Russell Kingabda1bd2011-09-01 11:52:33 +010022 ldr r4, =cpu_suspend_size
Russell King3fd431b2011-06-13 13:53:06 +010023#endif
Russell Kingabda1bd2011-09-01 11:52:33 +010024 mov r5, sp @ current virtual SP
25 add r4, r4, #12 @ Space for pgd, virt sp, phys resume fn
26 sub sp, sp, r4 @ allocate CPU state on stack
27 stmfd sp!, {r0, r1} @ save suspend func arg and pointer
28 add r0, sp, #8 @ save pointer to save block
29 mov r1, r4 @ size of save block
30 mov r2, r5 @ virtual SP
31 ldr r3, =sleep_save_sp
Russell King941aefa2011-02-11 11:32:19 +000032#ifdef CONFIG_SMP
33 ALT_SMP(mrc p15, 0, lr, c0, c0, 5)
34 ALT_UP(mov lr, #0)
35 and lr, lr, #15
Russell Kingabda1bd2011-09-01 11:52:33 +010036 add r3, r3, lr, lsl #2
Russell King941aefa2011-02-11 11:32:19 +000037#endif
Russell Kingabda1bd2011-09-01 11:52:33 +010038 bl __cpu_suspend_save
Russell King29cb3cd2011-07-02 09:54:01 +010039 adr lr, BSYM(cpu_suspend_abort)
Russell King3799bbe2011-06-13 15:28:40 +010040 ldmfd sp!, {r0, pc} @ call suspend fn
Russell King2c74a0c2011-06-22 17:41:48 +010041ENDPROC(__cpu_suspend)
Russell Kingf6b0fa02011-02-06 15:48:39 +000042 .ltorg
43
Russell King29cb3cd2011-07-02 09:54:01 +010044cpu_suspend_abort:
Russell Kingde8e71c2011-08-27 22:39:09 +010045 ldmia sp!, {r1 - r3} @ pop phys pgd, virt SP, phys resume fn
Russell Kingf5fa68d2011-08-27 11:17:36 +010046 teq r0, #0
47 moveq r0, #1 @ force non-zero value
Russell King29cb3cd2011-07-02 09:54:01 +010048 mov sp, r2
49 ldmfd sp!, {r4 - r11, pc}
50ENDPROC(cpu_suspend_abort)
51
Russell Kingf6b0fa02011-02-06 15:48:39 +000052/*
53 * r0 = control register value
Russell Kingf6b0fa02011-02-06 15:48:39 +000054 */
Russell King62b2d072011-08-31 23:26:18 +010055 .align 5
Will Deacone6eadc62011-11-15 11:11:19 +000056 .pushsection .idmap.text,"ax"
Russell Kingf6b0fa02011-02-06 15:48:39 +000057ENTRY(cpu_resume_mmu)
Russell Kingf6b0fa02011-02-06 15:48:39 +000058 ldr r3, =cpu_resume_after_mmu
Will Deacond675d0b2011-11-22 17:30:28 +000059 instr_sync
Russell Kinge8ce0eb2011-08-26 20:28:52 +010060 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc
61 mrc p15, 0, r0, c0, c0, 0 @ read id reg
Will Deacond675d0b2011-11-22 17:30:28 +000062 instr_sync
Russell Kinge8ce0eb2011-08-26 20:28:52 +010063 mov r0, r0
64 mov r0, r0
Russell Kingf6b0fa02011-02-06 15:48:39 +000065 mov pc, r3 @ jump to virtual address
Russell King62b2d072011-08-31 23:26:18 +010066ENDPROC(cpu_resume_mmu)
Will Deacone6eadc62011-11-15 11:11:19 +000067 .popsection
Russell Kingf6b0fa02011-02-06 15:48:39 +000068cpu_resume_after_mmu:
Russell King14cd8fd2011-06-21 16:32:58 +010069 bl cpu_init @ restore the und/abt/irq banked regs
Russell King29cb3cd2011-07-02 09:54:01 +010070 mov r0, #0 @ return zero on success
Russell King5fa94c82011-06-13 15:04:14 +010071 ldmfd sp!, {r4 - r11, pc}
Russell Kingf6b0fa02011-02-06 15:48:39 +000072ENDPROC(cpu_resume_after_mmu)
73
74/*
75 * Note: Yes, part of the following code is located into the .data section.
76 * This is to allow sleep_save_sp to be accessed with a relative load
77 * while we can't rely on any MMU translation. We could have put
78 * sleep_save_sp in the .text section as well, but some setups might
79 * insist on it to be truly read-only.
80 */
81 .data
82 .align
83ENTRY(cpu_resume)
Russell King941aefa2011-02-11 11:32:19 +000084#ifdef CONFIG_SMP
85 adr r0, sleep_save_sp
86 ALT_SMP(mrc p15, 0, r1, c0, c0, 5)
87 ALT_UP(mov r1, #0)
88 and r1, r1, #15
89 ldr r0, [r0, r1, lsl #2] @ stack phys addr
90#else
Russell Kingf6b0fa02011-02-06 15:48:39 +000091 ldr r0, sleep_save_sp @ stack phys addr
Russell King941aefa2011-02-11 11:32:19 +000092#endif
Nicolas Pitrefb4fe872011-03-22 19:09:14 +010093 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
Russell Kingde8e71c2011-08-27 22:39:09 +010094 @ load phys pgd, stack, resume fn
95 ARM( ldmia r0!, {r1, sp, pc} )
96THUMB( ldmia r0!, {r1, r2, r3} )
97THUMB( mov sp, r2 )
98THUMB( bx r3 )
Russell Kingf6b0fa02011-02-06 15:48:39 +000099ENDPROC(cpu_resume)
100
101sleep_save_sp:
Russell King941aefa2011-02-11 11:32:19 +0000102 .rept CONFIG_NR_CPUS
103 .long 0 @ preserve stack phys ptr here
104 .endr