blob: aaaf0a1fed223364b82bd4e79d9fd29f2c178788 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * probe.c - PCI detection and setup code
3 */
4
5#include <linux/kernel.h>
6#include <linux/delay.h>
7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/cpumask.h>
Shaohua Li7d715a62008-02-25 09:46:41 +080012#include <linux/pci-aspm.h>
Greg KHbc56b9e2005-04-08 14:53:31 +090013#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
16#define CARDBUS_RESERVE_BUSNR 3
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
18/* Ugh. Need to stop exporting this to modules. */
19LIST_HEAD(pci_root_buses);
20EXPORT_SYMBOL(pci_root_buses);
21
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080022
23static int find_anything(struct device *dev, void *data)
24{
25 return 1;
26}
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070028/*
29 * Some device drivers need know if pci is initiated.
30 * Basically, we think pci is not initiated when there
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080031 * is no device to be found on the pci_bus_type.
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070032 */
33int no_pci_devices(void)
34{
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080035 struct device *dev;
36 int no_devices;
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070037
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080038 dev = bus_find_device(&pci_bus_type, NULL, NULL, find_anything);
39 no_devices = (dev == NULL);
40 put_device(dev);
41 return no_devices;
42}
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070043EXPORT_SYMBOL(no_pci_devices);
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045/*
46 * PCI Bus Class Devices
47 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040048static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
Mike Travis39106dc2008-04-08 11:43:03 -070049 int type,
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040050 struct device_attribute *attr,
Alan Cox4327edf2005-09-10 00:25:49 -070051 char *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -070052{
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 int ret;
Alan Cox4327edf2005-09-10 00:25:49 -070054 cpumask_t cpumask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040056 cpumask = pcibus_to_cpumask(to_pci_bus(dev));
Mike Travis39106dc2008-04-08 11:43:03 -070057 ret = type?
58 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask):
59 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
60 buf[ret++] = '\n';
61 buf[ret] = '\0';
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 return ret;
63}
Mike Travis39106dc2008-04-08 11:43:03 -070064
65static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
66 struct device_attribute *attr,
67 char *buf)
68{
69 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
70}
71
72static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
73 struct device_attribute *attr,
74 char *buf)
75{
76 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
77}
78
79DEVICE_ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
80DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
82/*
83 * PCI Bus Class
84 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040085static void release_pcibus_dev(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -070086{
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040087 struct pci_bus *pci_bus = to_pci_bus(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
89 if (pci_bus->bridge)
90 put_device(pci_bus->bridge);
91 kfree(pci_bus);
92}
93
94static struct class pcibus_class = {
95 .name = "pci_bus",
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040096 .dev_release = &release_pcibus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -070097};
98
99static int __init pcibus_class_init(void)
100{
101 return class_register(&pcibus_class);
102}
103postcore_initcall(pcibus_class_init);
104
105/*
106 * Translate the low bits of the PCI base
107 * to the resource type
108 */
109static inline unsigned int pci_calc_resource_flags(unsigned int flags)
110{
111 if (flags & PCI_BASE_ADDRESS_SPACE_IO)
112 return IORESOURCE_IO;
113
114 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
115 return IORESOURCE_MEM | IORESOURCE_PREFETCH;
116
117 return IORESOURCE_MEM;
118}
119
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400120static u64 pci_size(u64 base, u64 maxbase, u64 mask)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800121{
122 u64 size = mask & maxbase; /* Find the significant bits */
123 if (!size)
124 return 0;
125
126 /* Get the lowest of them to find the decode size, and
127 from that the extent. */
128 size = (size & ~(size-1)) - 1;
129
130 /* base == maxbase can be valid only if the BAR has
131 already been programmed with all 1s. */
132 if (base == maxbase && ((base | size) & mask) != mask)
133 return 0;
134
135 return size;
136}
137
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400138enum pci_bar_type {
139 pci_bar_unknown, /* Standard PCI BAR probe */
140 pci_bar_io, /* An io port BAR */
141 pci_bar_mem32, /* A 32-bit memory BAR */
142 pci_bar_mem64, /* A 64-bit memory BAR */
143};
144
145static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
Yinghai Lu07eddf32006-11-29 13:53:10 -0800146{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400147 if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
148 res->flags = bar & ~PCI_BASE_ADDRESS_IO_MASK;
149 return pci_bar_io;
150 }
151
152 res->flags = bar & ~PCI_BASE_ADDRESS_MEM_MASK;
153
Peter Chubbe3545972008-10-13 11:49:04 +1100154 if (res->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400155 return pci_bar_mem64;
156 return pci_bar_mem32;
157}
158
159/*
160 * If the type is not unknown, we assume that the lowest bit is 'enable'.
161 * Returns 1 if the BAR was 64-bit and 0 if it was 32-bit.
162 */
163static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
164 struct resource *res, unsigned int pos)
165{
166 u32 l, sz, mask;
167
168 mask = type ? ~PCI_ROM_ADDRESS_ENABLE : ~0;
169
170 res->name = pci_name(dev);
171
172 pci_read_config_dword(dev, pos, &l);
173 pci_write_config_dword(dev, pos, mask);
174 pci_read_config_dword(dev, pos, &sz);
175 pci_write_config_dword(dev, pos, l);
176
177 /*
178 * All bits set in sz means the device isn't working properly.
179 * If the BAR isn't implemented, all bits must be 0. If it's a
180 * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
181 * 1 must be clear.
182 */
183 if (!sz || sz == 0xffffffff)
184 goto fail;
185
186 /*
187 * I don't know how l can have all bits set. Copied from old code.
188 * Maybe it fixes a bug on some ancient platform.
189 */
190 if (l == 0xffffffff)
191 l = 0;
192
193 if (type == pci_bar_unknown) {
194 type = decode_bar(res, l);
195 res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
196 if (type == pci_bar_io) {
197 l &= PCI_BASE_ADDRESS_IO_MASK;
198 mask = PCI_BASE_ADDRESS_IO_MASK & 0xffff;
199 } else {
200 l &= PCI_BASE_ADDRESS_MEM_MASK;
201 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
202 }
203 } else {
204 res->flags |= (l & IORESOURCE_ROM_ENABLE);
205 l &= PCI_ROM_ADDRESS_MASK;
206 mask = (u32)PCI_ROM_ADDRESS_MASK;
207 }
208
209 if (type == pci_bar_mem64) {
210 u64 l64 = l;
211 u64 sz64 = sz;
212 u64 mask64 = mask | (u64)~0 << 32;
213
214 pci_read_config_dword(dev, pos + 4, &l);
215 pci_write_config_dword(dev, pos + 4, ~0);
216 pci_read_config_dword(dev, pos + 4, &sz);
217 pci_write_config_dword(dev, pos + 4, l);
218
219 l64 |= ((u64)l << 32);
220 sz64 |= ((u64)sz << 32);
221
222 sz64 = pci_size(l64, sz64, mask64);
223
224 if (!sz64)
225 goto fail;
226
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400227 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400228 dev_err(&dev->dev, "can't handle 64-bit BAR\n");
229 goto fail;
Matthew Wilcoxcc5499c2008-07-28 13:39:00 -0400230 } else if ((sizeof(resource_size_t) < 8) && l) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400231 /* Address above 32-bit boundary; disable the BAR */
232 pci_write_config_dword(dev, pos, 0);
233 pci_write_config_dword(dev, pos + 4, 0);
234 res->start = 0;
235 res->end = sz64;
236 } else {
237 res->start = l64;
238 res->end = l64 + sz64;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200239 dev_printk(KERN_DEBUG, &dev->dev,
240 "reg %x 64bit mmio: %pR\n", pos, res);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400241 }
242 } else {
243 sz = pci_size(l, sz, mask);
244
245 if (!sz)
246 goto fail;
247
248 res->start = l;
249 res->end = l + sz;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200250
251 dev_printk(KERN_DEBUG, &dev->dev, "reg %x %s: %pR\n", pos,
252 (res->flags & IORESOURCE_IO) ? "io port" : "32bit mmio",
253 res);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400254 }
255
256 out:
257 return (type == pci_bar_mem64) ? 1 : 0;
258 fail:
259 res->flags = 0;
260 goto out;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800261}
262
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
264{
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400265 unsigned int pos, reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400267 for (pos = 0; pos < howmany; pos++) {
268 struct resource *res = &dev->resource[pos];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 reg = PCI_BASE_ADDRESS_0 + (pos << 2);
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400270 pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 }
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400272
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 if (rom) {
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400274 struct resource *res = &dev->resource[PCI_ROM_RESOURCE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275 dev->rom_base_reg = rom;
Matthew Wilcox6ac665c2008-07-28 13:38:59 -0400276 res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH |
277 IORESOURCE_READONLY | IORESOURCE_CACHEABLE |
278 IORESOURCE_SIZEALIGN;
279 __pci_read_base(dev, pci_bar_mem32, res, rom);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280 }
281}
282
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100283void __devinit pci_read_bridge_bases(struct pci_bus *child)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284{
285 struct pci_dev *dev = child->self;
286 u8 io_base_lo, io_limit_lo;
287 u16 mem_base_lo, mem_limit_lo;
288 unsigned long base, limit;
289 struct resource *res;
290 int i;
291
292 if (!dev) /* It's a host bus, nothing to read */
293 return;
294
295 if (dev->transparent) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600296 dev_info(&dev->dev, "transparent bridge\n");
Ivan Kokshaysky90b54922005-06-07 04:07:02 +0400297 for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
298 child->resource[i] = child->parent->resource[i - 3];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 }
300
301 for(i=0; i<3; i++)
302 child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
303
304 res = child->resource[0];
305 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
306 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
307 base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
308 limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
309
310 if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
311 u16 io_base_hi, io_limit_hi;
312 pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
313 pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
314 base |= (io_base_hi << 16);
315 limit |= (io_limit_hi << 16);
316 }
317
318 if (base <= limit) {
319 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
Daniel Yeisley9d265122005-12-05 07:06:43 -0500320 if (!res->start)
321 res->start = base;
322 if (!res->end)
323 res->end = limit + 0xfff;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200324 dev_printk(KERN_DEBUG, &dev->dev, "bridge io port: %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325 }
326
327 res = child->resource[1];
328 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
329 pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
330 base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
331 limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
332 if (base <= limit) {
333 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
334 res->start = base;
335 res->end = limit + 0xfffff;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200336 dev_printk(KERN_DEBUG, &dev->dev, "bridge 32bit mmio: %pR\n",
337 res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 }
339
340 res = child->resource[2];
341 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
342 pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
343 base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
344 limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
345
346 if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
347 u32 mem_base_hi, mem_limit_hi;
348 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
349 pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
350
351 /*
352 * Some bridges set the base > limit by default, and some
353 * (broken) BIOSes do not initialize them. If we find
354 * this, just assume they are not being used.
355 */
356 if (mem_base_hi <= mem_limit_hi) {
357#if BITS_PER_LONG == 64
358 base |= ((long) mem_base_hi) << 32;
359 limit |= ((long) mem_limit_hi) << 32;
360#else
361 if (mem_base_hi || mem_limit_hi) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600362 dev_err(&dev->dev, "can't handle 64-bit "
363 "address space for bridge\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364 return;
365 }
366#endif
367 }
368 }
369 if (base <= limit) {
370 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
371 res->start = base;
372 res->end = limit + 0xfffff;
Vincent Legollf393d9b2008-10-12 12:26:12 +0200373 dev_printk(KERN_DEBUG, &dev->dev, "bridge %sbit mmio pref: %pR\n",
374 (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32",
375 res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376 }
377}
378
Sam Ravnborg96bde062007-03-26 21:53:30 -0800379static struct pci_bus * pci_alloc_bus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380{
381 struct pci_bus *b;
382
Eric Sesterhennf5afe802006-02-28 15:34:49 +0100383 b = kzalloc(sizeof(*b), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 if (b) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385 INIT_LIST_HEAD(&b->node);
386 INIT_LIST_HEAD(&b->children);
387 INIT_LIST_HEAD(&b->devices);
Alex Chiangf46753c2008-06-10 15:28:50 -0600388 INIT_LIST_HEAD(&b->slots);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 }
390 return b;
391}
392
Adrian Bunkcbd4e052008-04-18 13:53:55 -0700393static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
394 struct pci_dev *bridge, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395{
396 struct pci_bus *child;
397 int i;
398
399 /*
400 * Allocate a new bus, and inherit stuff from the parent..
401 */
402 child = pci_alloc_bus();
403 if (!child)
404 return NULL;
405
406 child->self = bridge;
407 child->parent = parent;
408 child->ops = parent->ops;
409 child->sysdata = parent->sysdata;
Michael S. Tsirkin6e325a62006-02-14 18:52:22 +0200410 child->bus_flags = parent->bus_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411 child->bridge = get_device(&bridge->dev);
412
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400413 /* initialize some portions of the bus device, but don't register it
414 * now as the parent is not properly set up yet. This device will get
415 * registered later in pci_bus_add_devices()
416 */
417 child->dev.class = &pcibus_class;
418 sprintf(child->dev.bus_id, "%04x:%02x", pci_domain_nr(child), busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419
420 /*
421 * Set up the primary, secondary and subordinate
422 * bus numbers.
423 */
424 child->number = child->secondary = busnr;
425 child->primary = parent->secondary;
426 child->subordinate = 0xff;
427
428 /* Set up default resource pointers and names.. */
429 for (i = 0; i < 4; i++) {
430 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i];
431 child->resource[i]->name = child->name;
432 }
433 bridge->subordinate = child;
434
435 return child;
436}
437
Sam Ravnborg451124a2008-02-02 22:33:43 +0100438struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439{
440 struct pci_bus *child;
441
442 child = pci_alloc_child_bus(parent, dev, busnr);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700443 if (child) {
Zhang Yanmind71374d2006-06-02 12:35:43 +0800444 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 list_add_tail(&child->node, &parent->children);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800446 up_write(&pci_bus_sem);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700447 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 return child;
449}
450
Sam Ravnborg96bde062007-03-26 21:53:30 -0800451static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700452{
453 struct pci_bus *parent = child->parent;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700454
455 /* Attempts to fix that up are really dangerous unless
456 we're going to re-assign all bus numbers. */
457 if (!pcibios_assign_all_busses())
458 return;
459
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700460 while (parent->parent && parent->subordinate < max) {
461 parent->subordinate = max;
462 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
463 parent = parent->parent;
464 }
465}
466
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467/*
468 * If it's a bridge, configure it and scan the bus behind it.
469 * For CardBus bridges, we don't scan behind as the devices will
470 * be handled by the bridge driver itself.
471 *
472 * We need to process bridges in two passes -- first we scan those
473 * already configured by the BIOS and after we are done with all of
474 * them, we proceed to assigning numbers to the remaining buses in
475 * order to avoid overlaps between old and new bus numbers.
476 */
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100477int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478{
479 struct pci_bus *child;
480 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
Dominik Brodowski49887942005-12-08 16:53:12 +0100481 u32 buses, i, j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482 u16 bctl;
483
484 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
485
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600486 dev_dbg(&dev->dev, "scanning behind bridge, config %06x, pass %d\n",
487 buses & 0xffffff, pass);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488
489 /* Disable MasterAbortMode during probing to avoid reporting
490 of bus errors (in some architectures) */
491 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
492 pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
493 bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
494
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus) {
496 unsigned int cmax, busnr;
497 /*
498 * Bus already configured by firmware, process it in the first
499 * pass and just note the configuration.
500 */
501 if (pass)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000502 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 busnr = (buses >> 8) & 0xFF;
504
505 /*
506 * If we already got to this bus through a different bridge,
507 * ignore it. This can happen with the i450NX chipset.
508 */
509 if (pci_find_bus(pci_domain_nr(bus), busnr)) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600510 dev_info(&dev->dev, "bus %04x:%02x already known\n",
511 pci_domain_nr(bus), busnr);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000512 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 }
514
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700515 child = pci_add_new_bus(bus, dev, busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516 if (!child)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000517 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518 child->primary = buses & 0xFF;
519 child->subordinate = (buses >> 16) & 0xFF;
Gary Hade11949252007-10-08 16:24:16 -0700520 child->bridge_ctl = bctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
522 cmax = pci_scan_child_bus(child);
523 if (cmax > max)
524 max = cmax;
525 if (child->subordinate > max)
526 max = child->subordinate;
527 } else {
528 /*
529 * We need to assign a number to this bus which we always
530 * do in the second pass.
531 */
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700532 if (!pass) {
533 if (pcibios_assign_all_busses())
534 /* Temporarily disable forwarding of the
535 configuration cycles on all bridges in
536 this bus segment to avoid possible
537 conflicts in the second pass between two
538 bridges programmed with overlapping
539 bus ranges. */
540 pci_write_config_dword(dev, PCI_PRIMARY_BUS,
541 buses & ~0xffffff);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000542 goto out;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700543 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544
545 /* Clear errors */
546 pci_write_config_word(dev, PCI_STATUS, 0xffff);
547
Rajesh Shahcc574502005-04-28 00:25:47 -0700548 /* Prevent assigning a bus number that already exists.
549 * This can happen when a bridge is hot-plugged */
550 if (pci_find_bus(pci_domain_nr(bus), max+1))
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000551 goto out;
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700552 child = pci_add_new_bus(bus, dev, ++max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 buses = (buses & 0xff000000)
554 | ((unsigned int)(child->primary) << 0)
555 | ((unsigned int)(child->secondary) << 8)
556 | ((unsigned int)(child->subordinate) << 16);
557
558 /*
559 * yenta.c forces a secondary latency timer of 176.
560 * Copy that behaviour here.
561 */
562 if (is_cardbus) {
563 buses &= ~0xff000000;
564 buses |= CARDBUS_LATENCY_TIMER << 24;
565 }
566
567 /*
568 * We need to blast all three values with a single write.
569 */
570 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
571
572 if (!is_cardbus) {
Gary Hade11949252007-10-08 16:24:16 -0700573 child->bridge_ctl = bctl;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700574 /*
575 * Adjust subordinate busnr in parent buses.
576 * We do this before scanning for children because
577 * some devices may not be detected if the bios
578 * was lazy.
579 */
580 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581 /* Now we can scan all subordinate buses... */
582 max = pci_scan_child_bus(child);
Kristen Accardie3ac86d2006-01-17 16:57:01 -0800583 /*
584 * now fix it up again since we have found
585 * the real value of max.
586 */
587 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 } else {
589 /*
590 * For CardBus bridges, we leave 4 bus numbers
591 * as cards with a PCI-to-PCI bridge can be
592 * inserted later.
593 */
Dominik Brodowski49887942005-12-08 16:53:12 +0100594 for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
595 struct pci_bus *parent = bus;
Rajesh Shahcc574502005-04-28 00:25:47 -0700596 if (pci_find_bus(pci_domain_nr(bus),
597 max+i+1))
598 break;
Dominik Brodowski49887942005-12-08 16:53:12 +0100599 while (parent->parent) {
600 if ((!pcibios_assign_all_busses()) &&
601 (parent->subordinate > max) &&
602 (parent->subordinate <= max+i)) {
603 j = 1;
604 }
605 parent = parent->parent;
606 }
607 if (j) {
608 /*
609 * Often, there are two cardbus bridges
610 * -- try to leave one valid bus number
611 * for each one.
612 */
613 i /= 2;
614 break;
615 }
616 }
Rajesh Shahcc574502005-04-28 00:25:47 -0700617 max += i;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700618 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 }
620 /*
621 * Set the subordinate bus number to its real value.
622 */
623 child->subordinate = max;
624 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
625 }
626
Gary Hadecb3576f2008-02-08 14:00:52 -0800627 sprintf(child->name,
628 (is_cardbus ? "PCI CardBus %04x:%02x" : "PCI Bus %04x:%02x"),
629 pci_domain_nr(bus), child->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200631 /* Has only triggered on CardBus, fixup is in yenta_socket */
Dominik Brodowski49887942005-12-08 16:53:12 +0100632 while (bus->parent) {
633 if ((child->subordinate > bus->subordinate) ||
634 (child->number > bus->subordinate) ||
635 (child->number < bus->number) ||
636 (child->subordinate < bus->number)) {
Joe Perchesa6f29a92007-11-19 17:48:29 -0800637 pr_debug("PCI: Bus #%02x (-#%02x) is %s "
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200638 "hidden behind%s bridge #%02x (-#%02x)\n",
639 child->number, child->subordinate,
640 (bus->number > child->subordinate &&
641 bus->subordinate < child->number) ?
Joe Perchesa6f29a92007-11-19 17:48:29 -0800642 "wholly" : "partially",
643 bus->self->transparent ? " transparent" : "",
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200644 bus->number, bus->subordinate);
Dominik Brodowski49887942005-12-08 16:53:12 +0100645 }
646 bus = bus->parent;
647 }
648
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000649out:
650 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
651
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 return max;
653}
654
655/*
656 * Read interrupt line and base address registers.
657 * The architecture-dependent code can tweak these, of course.
658 */
659static void pci_read_irq(struct pci_dev *dev)
660{
661 unsigned char irq;
662
663 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq);
Kristen Accardiffeff782005-11-02 16:24:32 -0800664 dev->pin = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 if (irq)
666 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
667 dev->irq = irq;
668}
669
Bartlomiej Zolnierkiewicz01abc2a2007-04-23 23:19:36 +0200670#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
Randy Dunlap76e6a1d2006-12-29 16:47:29 -0800671
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672/**
673 * pci_setup_device - fill in class and map information of a device
674 * @dev: the device structure to fill
675 *
676 * Initialize the device structure with information about the device's
677 * vendor,class,memory and IO-space addresses,IRQ lines etc.
678 * Called at initialisation of the PCI subsystem and by CardBus services.
679 * Returns 0 on success and -1 if unknown type of device (not normal, bridge
680 * or CardBus).
681 */
682static int pci_setup_device(struct pci_dev * dev)
683{
684 u32 class;
685
Greg Kroah-Hartmaneebfcfb2008-07-02 13:24:49 -0700686 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
687 dev->bus->number, PCI_SLOT(dev->devfn),
688 PCI_FUNC(dev->devfn));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689
690 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
Auke Kokb8a3a522007-06-08 15:46:30 -0700691 dev->revision = class & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692 class >>= 8; /* upper 3 bytes */
693 dev->class = class;
694 class >>= 8;
695
Bjorn Helgaas34a2e152008-08-25 15:45:20 -0600696 dev_dbg(&dev->dev, "found [%04x:%04x] class %06x header type %02x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697 dev->vendor, dev->device, class, dev->hdr_type);
698
699 /* "Unknown power state" */
Daniel Ritz3fe9d192005-08-17 15:32:19 -0700700 dev->current_state = PCI_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
702 /* Early fixups, before probing the BARs */
703 pci_fixup_device(pci_fixup_early, dev);
704 class = dev->class >> 8;
705
706 switch (dev->hdr_type) { /* header type */
707 case PCI_HEADER_TYPE_NORMAL: /* standard header */
708 if (class == PCI_CLASS_BRIDGE_PCI)
709 goto bad;
710 pci_read_irq(dev);
711 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
712 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
713 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
Alan Cox368c73d2006-10-04 00:41:26 +0100714
715 /*
716 * Do the ugly legacy mode stuff here rather than broken chip
717 * quirk code. Legacy mode ATA controllers have fixed
718 * addresses. These are not always echoed in BAR0-3, and
719 * BAR0-3 in a few cases contain junk!
720 */
721 if (class == PCI_CLASS_STORAGE_IDE) {
722 u8 progif;
723 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
724 if ((progif & 1) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800725 dev->resource[0].start = 0x1F0;
726 dev->resource[0].end = 0x1F7;
727 dev->resource[0].flags = LEGACY_IO_RESOURCE;
728 dev->resource[1].start = 0x3F6;
729 dev->resource[1].end = 0x3F6;
730 dev->resource[1].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100731 }
732 if ((progif & 4) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800733 dev->resource[2].start = 0x170;
734 dev->resource[2].end = 0x177;
735 dev->resource[2].flags = LEGACY_IO_RESOURCE;
736 dev->resource[3].start = 0x376;
737 dev->resource[3].end = 0x376;
738 dev->resource[3].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100739 }
740 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741 break;
742
743 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
744 if (class != PCI_CLASS_BRIDGE_PCI)
745 goto bad;
746 /* The PCI-to-PCI bridge spec requires that subtractive
747 decoding (i.e. transparent) bridge must have programming
748 interface code of 0x01. */
Kristen Accardi3efd2732005-11-02 16:55:49 -0800749 pci_read_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 dev->transparent = ((dev->class & 0xff) == 1);
751 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
752 break;
753
754 case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */
755 if (class != PCI_CLASS_BRIDGE_CARDBUS)
756 goto bad;
757 pci_read_irq(dev);
758 pci_read_bases(dev, 1, 0);
759 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
760 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device);
761 break;
762
763 default: /* unknown header */
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600764 dev_err(&dev->dev, "unknown header type %02x, "
765 "ignoring device\n", dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700766 return -1;
767
768 bad:
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600769 dev_err(&dev->dev, "ignoring class %02x (doesn't match header "
770 "type %02x)\n", class, dev->hdr_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771 dev->class = PCI_CLASS_NOT_DEFINED;
772 }
773
774 /* We found a fine healthy device, go go go... */
775 return 0;
776}
777
Zhao, Yu201de562008-10-13 19:49:55 +0800778static void pci_release_capabilities(struct pci_dev *dev)
779{
780 pci_vpd_release(dev);
781}
782
Linus Torvalds1da177e2005-04-16 15:20:36 -0700783/**
784 * pci_release_dev - free a pci device structure when all users of it are finished.
785 * @dev: device that's been disconnected
786 *
787 * Will be called only by the device core when all users of this pci device are
788 * done.
789 */
790static void pci_release_dev(struct device *dev)
791{
792 struct pci_dev *pci_dev;
793
794 pci_dev = to_pci_dev(dev);
Zhao, Yu201de562008-10-13 19:49:55 +0800795 pci_release_capabilities(pci_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796 kfree(pci_dev);
797}
798
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700799static void set_pcie_port_type(struct pci_dev *pdev)
800{
801 int pos;
802 u16 reg16;
803
804 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
805 if (!pos)
806 return;
807 pdev->is_pcie = 1;
808 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
809 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
810}
811
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812/**
813 * pci_cfg_space_size - get the configuration space size of the PCI device.
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700814 * @dev: PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815 *
816 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
817 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
818 * access it. Maybe we don't have a way to generate extended config space
819 * accesses, or the device is behind a reverse Express bridge. So we try
820 * reading the dword at 0x100 which must either be 0 or a valid extended
821 * capability header.
822 */
Yinghai Lu70b9f7d2008-04-28 16:27:23 -0700823int pci_cfg_space_size_ext(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700825 u32 status;
Zhao, Yu557848c2008-10-13 19:18:07 +0800826 int pos = PCI_CFG_SPACE_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827
Zhao, Yu557848c2008-10-13 19:18:07 +0800828 if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700829 goto fail;
830 if (status == 0xffffffff)
831 goto fail;
832
833 return PCI_CFG_SPACE_EXP_SIZE;
834
835 fail:
836 return PCI_CFG_SPACE_SIZE;
837}
838
Yinghai Lu57741a72008-02-15 01:32:50 -0800839int pci_cfg_space_size(struct pci_dev *dev)
840{
Yinghai Lu70b9f7d2008-04-28 16:27:23 -0700841 int pos;
842 u32 status;
843
844 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
845 if (!pos) {
846 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
847 if (!pos)
848 goto fail;
849
850 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
851 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
852 goto fail;
853 }
854
855 return pci_cfg_space_size_ext(dev);
856
857 fail:
858 return PCI_CFG_SPACE_SIZE;
Yinghai Lu57741a72008-02-15 01:32:50 -0800859}
860
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861static void pci_release_bus_bridge_dev(struct device *dev)
862{
863 kfree(dev);
864}
865
Michael Ellerman65891212007-04-05 17:19:08 +1000866struct pci_dev *alloc_pci_dev(void)
867{
868 struct pci_dev *dev;
869
870 dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
871 if (!dev)
872 return NULL;
873
Michael Ellerman65891212007-04-05 17:19:08 +1000874 INIT_LIST_HEAD(&dev->bus_list);
875
876 return dev;
877}
878EXPORT_SYMBOL(alloc_pci_dev);
879
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880/*
881 * Read the config data for a PCI device, sanity-check it
882 * and fill in the dev structure...
883 */
Adrian Bunk7f7b5de2008-04-18 13:53:55 -0700884static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700885{
886 struct pci_dev *dev;
Alex Chiangcef354d2008-09-02 09:40:51 -0600887 struct pci_slot *slot;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700888 u32 l;
889 u8 hdr_type;
890 int delay = 1;
891
892 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
893 return NULL;
894
895 /* some broken boards return 0 or ~0 if a slot is empty: */
896 if (l == 0xffffffff || l == 0x00000000 ||
897 l == 0x0000ffff || l == 0xffff0000)
898 return NULL;
899
900 /* Configuration request Retry Status */
901 while (l == 0xffff0001) {
902 msleep(delay);
903 delay *= 2;
904 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
905 return NULL;
906 /* Card hasn't responded in 60 seconds? Must be stuck. */
907 if (delay > 60 * 1000) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600908 printk(KERN_WARNING "pci %04x:%02x:%02x.%d: not "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700909 "responding\n", pci_domain_nr(bus),
910 bus->number, PCI_SLOT(devfn),
911 PCI_FUNC(devfn));
912 return NULL;
913 }
914 }
915
916 if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
917 return NULL;
918
Michael Ellermanbab41e92007-04-05 17:19:09 +1000919 dev = alloc_pci_dev();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920 if (!dev)
921 return NULL;
922
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923 dev->bus = bus;
924 dev->sysdata = bus->sysdata;
925 dev->dev.parent = bus->bridge;
926 dev->dev.bus = &pci_bus_type;
927 dev->devfn = devfn;
928 dev->hdr_type = hdr_type & 0x7f;
929 dev->multifunction = !!(hdr_type & 0x80);
930 dev->vendor = l & 0xffff;
931 dev->device = (l >> 16) & 0xffff;
932 dev->cfg_size = pci_cfg_space_size(dev);
Linas Vepstas82081792006-07-10 04:44:46 -0700933 dev->error_state = pci_channel_io_normal;
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700934 set_pcie_port_type(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700935
Alex Chiangcef354d2008-09-02 09:40:51 -0600936 list_for_each_entry(slot, &bus->slots, list)
937 if (PCI_SLOT(devfn) == slot->number)
938 dev->slot = slot;
939
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
941 set this higher, assuming the system even supports it. */
942 dev->dma_mask = 0xffffffff;
943 if (pci_setup_device(dev) < 0) {
944 kfree(dev);
945 return NULL;
946 }
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000947
948 return dev;
949}
950
Zhao, Yu201de562008-10-13 19:49:55 +0800951static void pci_init_capabilities(struct pci_dev *dev)
952{
953 /* MSI/MSI-X list */
954 pci_msi_init_pci_dev(dev);
955
956 /* Power Management */
957 pci_pm_init(dev);
958
959 /* Vital Product Data */
960 pci_vpd_pci22_init(dev);
Yu Zhao58c3a722008-10-14 14:02:53 +0800961
962 /* Alternative Routing-ID Forwarding */
963 pci_enable_ari(dev);
Zhao, Yu201de562008-10-13 19:49:55 +0800964}
965
Sam Ravnborg96bde062007-03-26 21:53:30 -0800966void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000967{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968 device_initialize(&dev->dev);
969 dev->dev.release = pci_release_dev;
970 pci_dev_get(dev);
971
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 dev->dev.dma_mask = &dev->dma_mask;
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800973 dev->dev.dma_parms = &dev->dma_parms;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974 dev->dev.coherent_dma_mask = 0xffffffffull;
975
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800976 pci_set_dma_max_seg_size(dev, 65536);
FUJITA Tomonori59fc67d2008-02-04 22:28:14 -0800977 pci_set_dma_seg_boundary(dev, 0xffffffff);
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800978
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 /* Fix up broken headers */
980 pci_fixup_device(pci_fixup_header, dev);
981
Zhao, Yu201de562008-10-13 19:49:55 +0800982 /* Initialize various capabilities */
983 pci_init_capabilities(dev);
Rafael J. Wysockieb9d0fe2008-07-07 03:34:48 +0200984
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985 /*
986 * Add the device to our list of discovered devices
987 * and the bus list for fixup functions, etc.
988 */
Zhang Yanmind71374d2006-06-02 12:35:43 +0800989 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990 list_add_tail(&dev->bus_list, &bus->devices);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800991 up_write(&pci_bus_sem);
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000992}
993
Sam Ravnborg451124a2008-02-02 22:33:43 +0100994struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000995{
996 struct pci_dev *dev;
997
998 dev = pci_scan_device(bus, devfn);
999 if (!dev)
1000 return NULL;
1001
1002 pci_device_add(dev, bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003
1004 return dev;
1005}
Adrian Bunkb73e9682007-11-21 15:07:11 -08001006EXPORT_SYMBOL(pci_scan_single_device);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001007
1008/**
1009 * pci_scan_slot - scan a PCI slot on a bus for devices.
1010 * @bus: PCI bus to scan
1011 * @devfn: slot number to scan (must have zero function.)
1012 *
1013 * Scan a PCI slot on the specified PCI bus for devices, adding
1014 * discovered devices to the @bus->devices list. New devices
Greg Kroah-Hartman8a1bc902008-02-14 14:56:56 -08001015 * will not have is_added set.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016 */
Sam Ravnborg96bde062007-03-26 21:53:30 -08001017int pci_scan_slot(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001018{
1019 int func, nr = 0;
1020 int scan_all_fns;
1021
1022 scan_all_fns = pcibios_scan_all_fns(bus, devfn);
1023
1024 for (func = 0; func < 8; func++, devfn++) {
1025 struct pci_dev *dev;
1026
1027 dev = pci_scan_single_device(bus, devfn);
1028 if (dev) {
1029 nr++;
1030
1031 /*
1032 * If this is a single function device,
1033 * don't scan past the first function.
1034 */
1035 if (!dev->multifunction) {
1036 if (func > 0) {
1037 dev->multifunction = 1;
1038 } else {
1039 break;
1040 }
1041 }
1042 } else {
1043 if (func == 0 && !scan_all_fns)
1044 break;
1045 }
1046 }
Shaohua Li7d715a62008-02-25 09:46:41 +08001047
Shaohua Li149e1632008-07-23 10:32:31 +08001048 /* only one slot has pcie device */
1049 if (bus->self && nr)
Shaohua Li7d715a62008-02-25 09:46:41 +08001050 pcie_aspm_init_link_state(bus->self);
1051
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 return nr;
1053}
1054
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001055unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001056{
1057 unsigned int devfn, pass, max = bus->secondary;
1058 struct pci_dev *dev;
1059
1060 pr_debug("PCI: Scanning bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1061
1062 /* Go find them, Rover! */
1063 for (devfn = 0; devfn < 0x100; devfn += 8)
1064 pci_scan_slot(bus, devfn);
1065
1066 /*
1067 * After performing arch-dependent fixup of the bus, look behind
1068 * all PCI-to-PCI bridges on this bus.
1069 */
1070 pr_debug("PCI: Fixups for bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1071 pcibios_fixup_bus(bus);
1072 for (pass=0; pass < 2; pass++)
1073 list_for_each_entry(dev, &bus->devices, bus_list) {
1074 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1075 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1076 max = pci_scan_bridge(bus, dev, max, pass);
1077 }
1078
1079 /*
1080 * We've scanned the bus and so we know all about what's on
1081 * the other side of any bridges that may be on this bus plus
1082 * any devices.
1083 *
1084 * Return how far we've got finding sub-buses.
1085 */
1086 pr_debug("PCI: Bus scan for %04x:%02x returning with max=%02x\n",
1087 pci_domain_nr(bus), bus->number, max);
1088 return max;
1089}
1090
Yinghai Lu30a18d62008-02-19 03:21:20 -08001091void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b)
1092{
1093}
1094
Sam Ravnborg96bde062007-03-26 21:53:30 -08001095struct pci_bus * pci_create_bus(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001096 int bus, struct pci_ops *ops, void *sysdata)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001097{
1098 int error;
1099 struct pci_bus *b;
1100 struct device *dev;
1101
1102 b = pci_alloc_bus();
1103 if (!b)
1104 return NULL;
1105
1106 dev = kmalloc(sizeof(*dev), GFP_KERNEL);
1107 if (!dev){
1108 kfree(b);
1109 return NULL;
1110 }
1111
1112 b->sysdata = sysdata;
1113 b->ops = ops;
1114
1115 if (pci_find_bus(pci_domain_nr(b), bus)) {
1116 /* If we already got to this bus through a different bridge, ignore it */
1117 pr_debug("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus);
1118 goto err_out;
1119 }
Zhang Yanmind71374d2006-06-02 12:35:43 +08001120
1121 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122 list_add_tail(&b->node, &pci_root_buses);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001123 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124
1125 memset(dev, 0, sizeof(*dev));
1126 dev->parent = parent;
1127 dev->release = pci_release_bus_bridge_dev;
1128 sprintf(dev->bus_id, "pci%04x:%02x", pci_domain_nr(b), bus);
1129 error = device_register(dev);
1130 if (error)
1131 goto dev_reg_err;
1132 b->bridge = get_device(dev);
1133
Yinghai Lu0d358f22008-02-19 03:20:41 -08001134 if (!parent)
1135 set_dev_node(b->bridge, pcibus_to_node(b));
1136
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001137 b->dev.class = &pcibus_class;
1138 b->dev.parent = b->bridge;
1139 sprintf(b->dev.bus_id, "%04x:%02x", pci_domain_nr(b), bus);
1140 error = device_register(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001141 if (error)
1142 goto class_dev_reg_err;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001143 error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001144 if (error)
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001145 goto dev_create_file_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146
1147 /* Create legacy_io and legacy_mem files for this bus */
1148 pci_create_legacy_files(b);
1149
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150 b->number = b->secondary = bus;
1151 b->resource[0] = &ioport_resource;
1152 b->resource[1] = &iomem_resource;
1153
Yinghai Lu30a18d62008-02-19 03:21:20 -08001154 set_pci_bus_resources_arch_default(b);
1155
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156 return b;
1157
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001158dev_create_file_err:
1159 device_unregister(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160class_dev_reg_err:
1161 device_unregister(dev);
1162dev_reg_err:
Zhang Yanmind71374d2006-06-02 12:35:43 +08001163 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001164 list_del(&b->node);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001165 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001166err_out:
1167 kfree(dev);
1168 kfree(b);
1169 return NULL;
1170}
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001171
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001172struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001173 int bus, struct pci_ops *ops, void *sysdata)
1174{
1175 struct pci_bus *b;
1176
1177 b = pci_create_bus(parent, bus, ops, sysdata);
1178 if (b)
1179 b->subordinate = pci_scan_child_bus(b);
1180 return b;
1181}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001182EXPORT_SYMBOL(pci_scan_bus_parented);
1183
1184#ifdef CONFIG_HOTPLUG
1185EXPORT_SYMBOL(pci_add_new_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186EXPORT_SYMBOL(pci_scan_slot);
1187EXPORT_SYMBOL(pci_scan_bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188EXPORT_SYMBOL_GPL(pci_scan_child_bus);
1189#endif
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001190
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001191static int __init pci_sort_bf_cmp(const struct device *d_a, const struct device *d_b)
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001192{
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001193 const struct pci_dev *a = to_pci_dev(d_a);
1194 const struct pci_dev *b = to_pci_dev(d_b);
1195
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001196 if (pci_domain_nr(a->bus) < pci_domain_nr(b->bus)) return -1;
1197 else if (pci_domain_nr(a->bus) > pci_domain_nr(b->bus)) return 1;
1198
1199 if (a->bus->number < b->bus->number) return -1;
1200 else if (a->bus->number > b->bus->number) return 1;
1201
1202 if (a->devfn < b->devfn) return -1;
1203 else if (a->devfn > b->devfn) return 1;
1204
1205 return 0;
1206}
1207
Greg Kroah-Hartman5ff580c2008-02-14 14:56:56 -08001208void __init pci_sort_breadthfirst(void)
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001209{
Greg Kroah-Hartman99178b02008-08-26 11:00:57 -05001210 bus_sort_breadthfirst(&pci_bus_type, &pci_sort_bf_cmp);
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001211}