Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 1 | /* |
| 2 | * MSI hooks for standard x86 apic |
| 3 | */ |
| 4 | |
| 5 | #include <linux/pci.h> |
| 6 | #include <linux/irq.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 7 | #include <linux/msi.h> |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 8 | #include <linux/dmar.h> |
Christian Kujau | a4cffb6 | 2006-06-26 14:00:02 +0200 | [diff] [blame] | 9 | #include <asm/smp.h> |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 10 | #include <asm/msidef.h> |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 11 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 12 | static struct irq_chip ia64_msi_chip; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 13 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 14 | #ifdef CONFIG_SMP |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 15 | static int ia64_set_msi_irq_affinity(struct irq_data *idata, |
| 16 | const cpumask_t *cpu_mask, bool force) |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 17 | { |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 18 | struct msi_msg msg; |
Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 19 | u32 addr, data; |
Thomas Gleixner | 785aebd | 2014-03-04 20:43:38 +0000 | [diff] [blame] | 20 | int cpu = cpumask_first_and(cpu_mask, cpu_online_mask); |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 21 | unsigned int irq = idata->irq; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 22 | |
Kenji Kaneshige | a6cd6322 | 2008-02-25 14:32:22 +0900 | [diff] [blame] | 23 | if (irq_prepare_move(irq, cpu)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 24 | return -1; |
Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 25 | |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 26 | get_cached_msi_msg(irq, &msg); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 27 | |
| 28 | addr = msg.address_lo; |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 29 | addr &= MSI_ADDR_DEST_ID_MASK; |
| 30 | addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 31 | msg.address_lo = addr; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 32 | |
Yasuaki Ishimatsu | cd378f1 | 2007-07-17 21:22:48 +0900 | [diff] [blame] | 33 | data = msg.data; |
| 34 | data &= MSI_DATA_VECTOR_MASK; |
| 35 | data |= MSI_DATA_VECTOR(irq_to_vector(irq)); |
| 36 | msg.data = data; |
| 37 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 38 | write_msi_msg(irq, &msg); |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 39 | cpumask_copy(idata->affinity, cpumask_of(cpu)); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 40 | |
| 41 | return 0; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 42 | } |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 43 | #endif /* CONFIG_SMP */ |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 44 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 45 | int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 46 | { |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 47 | struct msi_msg msg; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 48 | unsigned long dest_phys_id; |
Kenji Kaneshige | 8a3a0ee | 2007-03-26 09:38:42 +0900 | [diff] [blame] | 49 | int irq, vector; |
Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 50 | cpumask_t mask; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 51 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 52 | irq = create_irq(); |
| 53 | if (irq < 0) |
| 54 | return irq; |
| 55 | |
Thomas Gleixner | 53c909c | 2011-03-25 21:06:09 +0100 | [diff] [blame] | 56 | irq_set_msi_desc(irq, desc); |
Srivatsa S. Bhat | 7d7f984 | 2012-03-28 14:42:46 -0700 | [diff] [blame] | 57 | cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask); |
Yasuaki Ishimatsu | 4994be1 | 2007-07-17 21:22:33 +0900 | [diff] [blame] | 58 | dest_phys_id = cpu_physical_id(first_cpu(mask)); |
Ishimatsu Yasuaki | 9438a12 | 2007-04-06 16:51:12 +0900 | [diff] [blame] | 59 | vector = irq_to_vector(irq); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 60 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 61 | msg.address_hi = 0; |
| 62 | msg.address_lo = |
Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 63 | MSI_ADDR_HEADER | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 64 | MSI_ADDR_DEST_MODE_PHYS | |
Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 65 | MSI_ADDR_REDIRECTION_CPU | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 66 | MSI_ADDR_DEST_ID_CPU(dest_phys_id); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 67 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 68 | msg.data = |
Eric W. Biederman | 38bc036 | 2006-10-04 02:16:34 -0700 | [diff] [blame] | 69 | MSI_DATA_TRIGGER_EDGE | |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 70 | MSI_DATA_LEVEL_ASSERT | |
| 71 | MSI_DATA_DELIVERY_FIXED | |
| 72 | MSI_DATA_VECTOR(vector); |
| 73 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 74 | write_msi_msg(irq, &msg); |
Thomas Gleixner | 53c909c | 2011-03-25 21:06:09 +0100 | [diff] [blame] | 75 | irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 76 | |
Kenji Kaneshige | 3aff037 | 2007-10-30 16:01:49 +0900 | [diff] [blame] | 77 | return 0; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 78 | } |
| 79 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 80 | void ia64_teardown_msi_irq(unsigned int irq) |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 81 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 82 | destroy_irq(irq); |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 83 | } |
| 84 | |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 85 | static void ia64_ack_msi_irq(struct irq_data *data) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 86 | { |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 87 | irq_complete_move(data->irq); |
Thomas Gleixner | 97499b2e | 2011-03-25 20:36:55 +0100 | [diff] [blame] | 88 | irq_move_irq(data); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 89 | ia64_eoi(); |
| 90 | } |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 91 | |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 92 | static int ia64_msi_retrigger_irq(struct irq_data *data) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 93 | { |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 94 | unsigned int vector = irq_to_vector(data->irq); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 95 | ia64_resend_irq(vector); |
| 96 | |
| 97 | return 1; |
| 98 | } |
| 99 | |
| 100 | /* |
| 101 | * Generic ops used on most IA64 platforms. |
| 102 | */ |
| 103 | static struct irq_chip ia64_msi_chip = { |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 104 | .name = "PCI-MSI", |
| 105 | .irq_mask = mask_msi_irq, |
| 106 | .irq_unmask = unmask_msi_irq, |
| 107 | .irq_ack = ia64_ack_msi_irq, |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 108 | #ifdef CONFIG_SMP |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 109 | .irq_set_affinity = ia64_set_msi_irq_affinity, |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 110 | #endif |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 111 | .irq_retrigger = ia64_msi_retrigger_irq, |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 112 | }; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 113 | |
| 114 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 115 | int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 116 | { |
| 117 | if (platform_setup_msi_irq) |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 118 | return platform_setup_msi_irq(pdev, desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 119 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 120 | return ia64_setup_msi_irq(pdev, desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | void arch_teardown_msi_irq(unsigned int irq) |
| 124 | { |
| 125 | if (platform_teardown_msi_irq) |
| 126 | return platform_teardown_msi_irq(irq); |
| 127 | |
| 128 | return ia64_teardown_msi_irq(irq); |
| 129 | } |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 130 | |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 131 | #ifdef CONFIG_INTEL_IOMMU |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 132 | #ifdef CONFIG_SMP |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 133 | static int dmar_msi_set_affinity(struct irq_data *data, |
| 134 | const struct cpumask *mask, bool force) |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 135 | { |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 136 | unsigned int irq = data->irq; |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 137 | struct irq_cfg *cfg = irq_cfg + irq; |
| 138 | struct msi_msg msg; |
Thomas Gleixner | 785aebd | 2014-03-04 20:43:38 +0000 | [diff] [blame] | 139 | int cpu = cpumask_first_and(mask, cpu_online_mask); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 140 | |
| 141 | if (irq_prepare_move(irq, cpu)) |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 142 | return -1; |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 143 | |
| 144 | dmar_msi_read(irq, &msg); |
| 145 | |
| 146 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 147 | msg.data |= MSI_DATA_VECTOR(cfg->vector); |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 148 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 149 | msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu)); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 150 | |
| 151 | dmar_msi_write(irq, &msg); |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 152 | cpumask_copy(data->affinity, mask); |
Yinghai Lu | d5dedd4 | 2009-04-27 17:59:21 -0700 | [diff] [blame] | 153 | |
| 154 | return 0; |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 155 | } |
| 156 | #endif /* CONFIG_SMP */ |
| 157 | |
Jaswinder Singh Rajput | 9542b21 | 2009-06-10 12:45:01 -0700 | [diff] [blame] | 158 | static struct irq_chip dmar_msi_type = { |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 159 | .name = "DMAR_MSI", |
Thomas Gleixner | 5c2837f | 2010-09-28 17:15:11 +0200 | [diff] [blame] | 160 | .irq_unmask = dmar_msi_unmask, |
| 161 | .irq_mask = dmar_msi_mask, |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 162 | .irq_ack = ia64_ack_msi_irq, |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 163 | #ifdef CONFIG_SMP |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 164 | .irq_set_affinity = dmar_msi_set_affinity, |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 165 | #endif |
Thomas Gleixner | f1f701e | 2011-02-04 20:18:43 +0100 | [diff] [blame] | 166 | .irq_retrigger = ia64_msi_retrigger_irq, |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 167 | }; |
| 168 | |
| 169 | static int |
| 170 | msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) |
| 171 | { |
| 172 | struct irq_cfg *cfg = irq_cfg + irq; |
| 173 | unsigned dest; |
| 174 | cpumask_t mask; |
| 175 | |
Srivatsa S. Bhat | 7d7f984 | 2012-03-28 14:42:46 -0700 | [diff] [blame] | 176 | cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 177 | dest = cpu_physical_id(first_cpu(mask)); |
| 178 | |
| 179 | msg->address_hi = 0; |
| 180 | msg->address_lo = |
| 181 | MSI_ADDR_HEADER | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 182 | MSI_ADDR_DEST_MODE_PHYS | |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 183 | MSI_ADDR_REDIRECTION_CPU | |
Xiantao Zhang | 2fa8937 | 2009-02-16 15:14:48 +0800 | [diff] [blame] | 184 | MSI_ADDR_DEST_ID_CPU(dest); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 185 | |
| 186 | msg->data = |
| 187 | MSI_DATA_TRIGGER_EDGE | |
| 188 | MSI_DATA_LEVEL_ASSERT | |
| 189 | MSI_DATA_DELIVERY_FIXED | |
| 190 | MSI_DATA_VECTOR(cfg->vector); |
| 191 | return 0; |
| 192 | } |
| 193 | |
| 194 | int arch_setup_dmar_msi(unsigned int irq) |
| 195 | { |
| 196 | int ret; |
| 197 | struct msi_msg msg; |
| 198 | |
| 199 | ret = msi_compose_msg(NULL, irq, &msg); |
| 200 | if (ret < 0) |
| 201 | return ret; |
| 202 | dmar_msi_write(irq, &msg); |
Thomas Gleixner | 53c909c | 2011-03-25 21:06:09 +0100 | [diff] [blame] | 203 | irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, |
| 204 | "edge"); |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 205 | return 0; |
| 206 | } |
Suresh Siddha | d3f1381 | 2011-08-23 17:05:25 -0700 | [diff] [blame] | 207 | #endif /* CONFIG_INTEL_IOMMU */ |
Fenghua Yu | 62fdd76 | 2008-10-17 12:14:13 -0700 | [diff] [blame] | 208 | |