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viresh kumara7e9c452010-04-01 12:30:19 +01001/*
Arnd Bergmannd42799b2012-12-02 14:45:27 +01002 * SPEAr3xx/6xx Machine family specific definition
viresh kumara7e9c452010-04-01 12:30:19 +01003 *
Arnd Bergmannd42799b2012-12-02 14:45:27 +01004 * Copyright (C) 2009,2012 ST Microelectronics
5 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
Viresh Kumar10d89352012-06-20 12:53:02 -07006 * Viresh Kumar <viresh.linux@gmail.com>
viresh kumara7e9c452010-04-01 12:30:19 +01007 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
Arnd Bergmannd42799b2012-12-02 14:45:27 +010013#ifndef __MACH_SPEAR_H
14#define __MACH_SPEAR_H
viresh kumara7e9c452010-04-01 12:30:19 +010015
Shiraz Hashim981a95d32011-03-07 05:57:08 +010016#include <asm/memory.h>
viresh kumara7e9c452010-04-01 12:30:19 +010017
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010018#if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX)
19
viresh kumara7e9c452010-04-01 12:30:19 +010020/* ICM1 - Low speed connection */
Arnd Bergmannd42799b2012-12-02 14:45:27 +010021#define SPEAR_ICM1_2_BASE UL(0xD0000000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010022#define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
Arnd Bergmannd42799b2012-12-02 14:45:27 +010023#define SPEAR_ICM1_UART_BASE UL(0xD0000000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010024#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE)
Shiraz Hashim981a95d32011-03-07 05:57:08 +010025#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
viresh kumara7e9c452010-04-01 12:30:19 +010026
Arnd Bergmannd42799b2012-12-02 14:45:27 +010027/* ML-1, 2 - Multi Layer CPU Subsystem */
28#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010029#define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
viresh kumara7e9c452010-04-01 12:30:19 +010030
31/* ICM3 - Basic Subsystem */
Arnd Bergmannd42799b2012-12-02 14:45:27 +010032#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010033#define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
Arnd Bergmannd42799b2012-12-02 14:45:27 +010034#define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
35#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010036#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE)
Arnd Bergmannd42799b2012-12-02 14:45:27 +010037#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010038#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE)
viresh kumara7e9c452010-04-01 12:30:19 +010039
40/* Debug uart for linux, will be used for debug and uncompress messages */
Arnd Bergmannd42799b2012-12-02 14:45:27 +010041#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
viresh kumara7e9c452010-04-01 12:30:19 +010042
43/* Sysctl base for spear platform */
Arnd Bergmannd42799b2012-12-02 14:45:27 +010044#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
45#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010046#endif /* SPEAR3xx || SPEAR6XX */
viresh kumara7e9c452010-04-01 12:30:19 +010047
Viresh Kumar5df33a62012-04-10 09:02:35 +053048/* SPEAr320 Macros */
49#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010050#define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000)
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010051
52#ifdef CONFIG_ARCH_SPEAR13XX
53
54#define PERIP_GRP2_BASE UL(0xB3000000)
Pratyush Anand36c5c902013-11-29 15:57:35 +053055#define VA_PERIP_GRP2_BASE IOMEM(0xF9000000)
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010056#define MCIF_SDHCI_BASE UL(0xB3000000)
57#define SYSRAM0_BASE UL(0xB3800000)
Pratyush Anand36c5c902013-11-29 15:57:35 +053058#define VA_SYSRAM0_BASE IOMEM(0xF9800000)
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010059#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600)
60
61#define PERIP_GRP1_BASE UL(0xE0000000)
62#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000)
63#define UART_BASE UL(0xE0000000)
64#define VA_UART_BASE IOMEM(0xFD000000)
65#define SSP_BASE UL(0xE0100000)
66#define MISC_BASE UL(0xE0700000)
67#define VA_MISC_BASE IOMEM(0xFD700000)
68
69#define A9SM_AND_MPMC_BASE UL(0xEC000000)
70#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
71
Arnd Bergmannd9909eb2012-12-02 17:59:57 +010072#define SPEAR1310_RAS_BASE UL(0xD8400000)
73#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
74
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010075/* A9SM peripheral offsets */
76#define A9SM_PERIP_BASE UL(0xEC800000)
77#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
78#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00)
79
80#define L2CC_BASE UL(0xED000000)
81#define VA_L2CC_BASE IOMEM(UL(0xFB000000))
82
83/* others */
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010084#define MCIF_CF_BASE UL(0xB2800000)
85
86/* Debug uart for linux, will be used for debug and uncompress messages */
87#define SPEAR_DBG_UART_BASE UART_BASE
Arnd Bergmann0ec05c32012-12-02 15:01:11 +010088
89#endif /* SPEAR13XX */
Viresh Kumar5df33a62012-04-10 09:02:35 +053090
Arnd Bergmannd42799b2012-12-02 14:45:27 +010091#endif /* __MACH_SPEAR_H */