viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 1 | /* |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 2 | * SPEAr3xx/6xx Machine family specific definition |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 3 | * |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 4 | * Copyright (C) 2009,2012 ST Microelectronics |
| 5 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> |
Viresh Kumar | 10d8935 | 2012-06-20 12:53:02 -0700 | [diff] [blame] | 6 | * Viresh Kumar <viresh.linux@gmail.com> |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public |
| 9 | * License version 2. This program is licensed "as is" without any |
| 10 | * warranty of any kind, whether express or implied. |
| 11 | */ |
| 12 | |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 13 | #ifndef __MACH_SPEAR_H |
| 14 | #define __MACH_SPEAR_H |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 15 | |
Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 16 | #include <asm/memory.h> |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 17 | |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 18 | #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) |
| 19 | |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 20 | /* ICM1 - Low speed connection */ |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 21 | #define SPEAR_ICM1_2_BASE UL(0xD0000000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 22 | #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 23 | #define SPEAR_ICM1_UART_BASE UL(0xD0000000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 24 | #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE) |
Shiraz Hashim | 981a95d3 | 2011-03-07 05:57:08 +0100 | [diff] [blame] | 25 | #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 26 | |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 27 | /* ML-1, 2 - Multi Layer CPU Subsystem */ |
| 28 | #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 29 | #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 30 | |
| 31 | /* ICM3 - Basic Subsystem */ |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 32 | #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 33 | #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 34 | #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) |
| 35 | #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 36 | #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE) |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 37 | #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 38 | #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE) |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 39 | |
| 40 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 41 | #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 42 | |
| 43 | /* Sysctl base for spear platform */ |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 44 | #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE |
| 45 | #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 46 | #endif /* SPEAR3xx || SPEAR6XX */ |
viresh kumar | a7e9c45 | 2010-04-01 12:30:19 +0100 | [diff] [blame] | 47 | |
Viresh Kumar | 5df33a6 | 2012-04-10 09:02:35 +0530 | [diff] [blame] | 48 | /* SPEAr320 Macros */ |
| 49 | #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 50 | #define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000) |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 51 | |
| 52 | #ifdef CONFIG_ARCH_SPEAR13XX |
| 53 | |
| 54 | #define PERIP_GRP2_BASE UL(0xB3000000) |
Pratyush Anand | 36c5c90 | 2013-11-29 15:57:35 +0530 | [diff] [blame] | 55 | #define VA_PERIP_GRP2_BASE IOMEM(0xF9000000) |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 56 | #define MCIF_SDHCI_BASE UL(0xB3000000) |
| 57 | #define SYSRAM0_BASE UL(0xB3800000) |
Pratyush Anand | 36c5c90 | 2013-11-29 15:57:35 +0530 | [diff] [blame] | 58 | #define VA_SYSRAM0_BASE IOMEM(0xF9800000) |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 59 | #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) |
| 60 | |
| 61 | #define PERIP_GRP1_BASE UL(0xE0000000) |
| 62 | #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) |
| 63 | #define UART_BASE UL(0xE0000000) |
| 64 | #define VA_UART_BASE IOMEM(0xFD000000) |
| 65 | #define SSP_BASE UL(0xE0100000) |
| 66 | #define MISC_BASE UL(0xE0700000) |
| 67 | #define VA_MISC_BASE IOMEM(0xFD700000) |
| 68 | |
| 69 | #define A9SM_AND_MPMC_BASE UL(0xEC000000) |
| 70 | #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) |
| 71 | |
Arnd Bergmann | d9909eb | 2012-12-02 17:59:57 +0100 | [diff] [blame] | 72 | #define SPEAR1310_RAS_BASE UL(0xD8400000) |
| 73 | #define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000)) |
| 74 | |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 75 | /* A9SM peripheral offsets */ |
| 76 | #define A9SM_PERIP_BASE UL(0xEC800000) |
| 77 | #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) |
| 78 | #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) |
| 79 | |
| 80 | #define L2CC_BASE UL(0xED000000) |
| 81 | #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) |
| 82 | |
| 83 | /* others */ |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 84 | #define MCIF_CF_BASE UL(0xB2800000) |
| 85 | |
| 86 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
| 87 | #define SPEAR_DBG_UART_BASE UART_BASE |
Arnd Bergmann | 0ec05c3 | 2012-12-02 15:01:11 +0100 | [diff] [blame] | 88 | |
| 89 | #endif /* SPEAR13XX */ |
Viresh Kumar | 5df33a6 | 2012-04-10 09:02:35 +0530 | [diff] [blame] | 90 | |
Arnd Bergmann | d42799b | 2012-12-02 14:45:27 +0100 | [diff] [blame] | 91 | #endif /* __MACH_SPEAR_H */ |