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Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301/*
2 * POWERNV cpufreq driver for the IBM POWER processors
3 *
4 * (C) Copyright IBM 2014
5 *
6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#define pr_fmt(fmt) "powernv-cpufreq: " fmt
21
22#include <linux/kernel.h>
23#include <linux/sysfs.h>
24#include <linux/cpumask.h>
25#include <linux/module.h>
26#include <linux/cpufreq.h>
27#include <linux/smp.h>
28#include <linux/of.h>
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +020029#include <linux/reboot.h>
Shilpasri G Bhat053819e2015-07-16 13:34:18 +053030#include <linux/slab.h>
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +053031#include <linux/cpu.h>
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +053032#include <trace/events/power.h>
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053033
34#include <asm/cputhreads.h>
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +053035#include <asm/firmware.h>
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053036#include <asm/reg.h>
Srivatsa S. Bhatf3cae352014-04-16 11:35:38 +053037#include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +053038#include <asm/opal.h>
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053039#include <linux/timer.h>
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053040
41#define POWERNV_MAX_PSTATES 256
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +053042#define PMSR_PSAFE_ENABLE (1UL << 30)
43#define PMSR_SPR_EM_DISABLE (1UL << 31)
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +053044#define MAX_PSTATE_SHIFT 32
Akshay Adiga20b15b72016-11-08 19:03:28 +053045#define LPSTATE_SHIFT 48
46#define GPSTATE_SHIFT 56
Pratik R. Sampat5937a882021-07-28 17:35:00 +053047#define MAX_NR_CHIPS 32
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053048
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053049#define MAX_RAMP_DOWN_TIME 5120
50/*
51 * On an idle system we want the global pstate to ramp-down from max value to
52 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
53 * then ramp-down rapidly later on.
54 *
55 * This gives a percentage rampdown for time elapsed in milliseconds.
56 * ramp_down_percentage = ((ms * ms) >> 18)
57 * ~= 3.8 * (sec * sec)
58 *
59 * At 0 ms ramp_down_percent = 0
60 * At 5120 ms ramp_down_percent = 100
61 */
62#define ramp_down_percent(time) ((time * time) >> 18)
63
64/* Interval after which the timer is queued to bring down global pstate */
65#define GPSTATE_TIMER_INTERVAL 2000
66
67/**
68 * struct global_pstate_info - Per policy data structure to maintain history of
69 * global pstates
Akshay Adiga09ca4c92016-06-30 11:53:07 +053070 * @highest_lpstate_idx: The local pstate index from which we are
71 * ramping down
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053072 * @elapsed_time: Time in ms spent in ramping down from
Akshay Adiga09ca4c92016-06-30 11:53:07 +053073 * highest_lpstate_idx
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053074 * @last_sampled_time: Time from boot in ms when global pstates were
75 * last set
Akshay Adiga09ca4c92016-06-30 11:53:07 +053076 * @last_lpstate_idx, Last set value of local pstate and global
77 * last_gpstate_idx pstate in terms of cpufreq table index
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053078 * @timer: Is used for ramping down if cpu goes idle for
79 * a long time with global pstate held high
80 * @gpstate_lock: A spinlock to maintain synchronization between
81 * routines called by the timer handler and
82 * governer's target_index calls
83 */
84struct global_pstate_info {
Akshay Adiga09ca4c92016-06-30 11:53:07 +053085 int highest_lpstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053086 unsigned int elapsed_time;
87 unsigned int last_sampled_time;
Akshay Adiga09ca4c92016-06-30 11:53:07 +053088 int last_lpstate_idx;
89 int last_gpstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +053090 spinlock_t gpstate_lock;
91 struct timer_list timer;
92};
93
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053094static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +053095u32 pstate_sign_prefix;
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +053096static bool rebooting, throttled, occ_reset;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +053097
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +053098static const char * const throttle_reason[] = {
99 "No throttling",
100 "Power Cap",
101 "Processor Over Temperature",
102 "Power Supply Failure",
103 "Over Current",
104 "OCC Reset"
105};
106
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530107enum throttle_reason_type {
108 NO_THROTTLE = 0,
109 POWERCAP,
110 CPU_OVERTEMP,
111 POWER_SUPPLY_FAILURE,
112 OVERCURRENT,
113 OCC_RESET_THROTTLE,
114 OCC_MAX_REASON
115};
116
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530117static struct chip {
118 unsigned int id;
119 bool throttled;
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530120 bool restore;
121 u8 throttle_reason;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530122 cpumask_t mask;
123 struct work_struct throttle;
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530124 int throttle_turbo;
125 int throttle_sub_turbo;
126 int reason[OCC_MAX_REASON];
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530127} *chips;
128
129static int nr_chips;
Michael Neuling3e5963b2016-03-21 22:24:52 +0530130static DEFINE_PER_CPU(struct chip *, chip_info);
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530131
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530132/*
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530133 * Note:
134 * The set of pstates consists of contiguous integers.
135 * powernv_pstate_info stores the index of the frequency table for
136 * max, min and nominal frequencies. It also stores number of
137 * available frequencies.
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530138 *
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530139 * powernv_pstate_info.nominal indicates the index to the highest
140 * non-turbo frequency.
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530141 */
142static struct powernv_pstate_info {
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530143 unsigned int min;
144 unsigned int max;
145 unsigned int nominal;
146 unsigned int nr_pstates;
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530147 bool wof_enabled;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530148} powernv_pstate_info;
149
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +0530150static inline int extract_pstate(u64 pmsr_val, unsigned int shift)
151{
152 int ret = ((pmsr_val >> shift) & 0xFF);
153
154 if (!ret)
155 return ret;
156
157 return (pstate_sign_prefix | ret);
158}
159
160#define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
161#define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
162#define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT)
163
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530164/* Use following macros for conversions between pstate_id and index */
165static inline int idx_to_pstate(unsigned int i)
166{
Akshay Adiga8e859462016-08-04 20:59:17 +0530167 if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
168 pr_warn_once("index %u is out of bound\n", i);
169 return powernv_freqs[powernv_pstate_info.nominal].driver_data;
170 }
171
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530172 return powernv_freqs[i].driver_data;
173}
174
175static inline unsigned int pstate_to_idx(int pstate)
176{
Akshay Adiga8e859462016-08-04 20:59:17 +0530177 int min = powernv_freqs[powernv_pstate_info.min].driver_data;
178 int max = powernv_freqs[powernv_pstate_info.max].driver_data;
179
180 if (min > 0) {
181 if (unlikely((pstate < max) || (pstate > min))) {
182 pr_warn_once("pstate %d is out of bound\n", pstate);
183 return powernv_pstate_info.nominal;
184 }
185 } else {
186 if (unlikely((pstate > max) || (pstate < min))) {
187 pr_warn_once("pstate %d is out of bound\n", pstate);
188 return powernv_pstate_info.nominal;
189 }
190 }
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530191 /*
192 * abs() is deliberately used so that is works with
193 * both monotonically increasing and decreasing
194 * pstate values
195 */
196 return abs(pstate - idx_to_pstate(powernv_pstate_info.max));
197}
198
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530199static inline void reset_gpstates(struct cpufreq_policy *policy)
200{
201 struct global_pstate_info *gpstates = policy->driver_data;
202
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530203 gpstates->highest_lpstate_idx = 0;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530204 gpstates->elapsed_time = 0;
205 gpstates->last_sampled_time = 0;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530206 gpstates->last_lpstate_idx = 0;
207 gpstates->last_gpstate_idx = 0;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530208}
209
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530210/*
211 * Initialize the freq table based on data obtained
212 * from the firmware passed via device-tree
213 */
214static int init_powernv_pstates(void)
215{
216 struct device_node *power_mgt;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530217 int i, nr_pstates = 0;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530218 const __be32 *pstate_ids, *pstate_freqs;
219 u32 len_ids, len_freqs;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530220 u32 pstate_min, pstate_max, pstate_nominal;
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530221 u32 pstate_turbo, pstate_ultra_turbo;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530222
223 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
224 if (!power_mgt) {
225 pr_warn("power-mgt node not found\n");
226 return -ENODEV;
227 }
228
229 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
230 pr_warn("ibm,pstate-min node not found\n");
231 return -ENODEV;
232 }
233
234 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
235 pr_warn("ibm,pstate-max node not found\n");
236 return -ENODEV;
237 }
238
239 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
240 &pstate_nominal)) {
241 pr_warn("ibm,pstate-nominal not found\n");
242 return -ENODEV;
243 }
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530244
245 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
246 &pstate_ultra_turbo)) {
247 powernv_pstate_info.wof_enabled = false;
248 goto next;
249 }
250
251 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
252 &pstate_turbo)) {
253 powernv_pstate_info.wof_enabled = false;
254 goto next;
255 }
256
257 if (pstate_turbo == pstate_ultra_turbo)
258 powernv_pstate_info.wof_enabled = false;
259 else
260 powernv_pstate_info.wof_enabled = true;
261
262next:
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530263 pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
264 pstate_nominal, pstate_max);
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530265 pr_info("Workload Optimized Frequency is %s in the platform\n",
266 (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530267
268 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
269 if (!pstate_ids) {
270 pr_warn("ibm,pstate-ids not found\n");
271 return -ENODEV;
272 }
273
274 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
275 &len_freqs);
276 if (!pstate_freqs) {
277 pr_warn("ibm,pstate-frequencies-mhz not found\n");
278 return -ENODEV;
279 }
280
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530281 if (len_ids != len_freqs) {
282 pr_warn("Entries in ibm,pstate-ids and "
283 "ibm,pstate-frequencies-mhz does not match\n");
284 }
285
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530286 nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
287 if (!nr_pstates) {
288 pr_warn("No PStates found\n");
289 return -ENODEV;
290 }
291
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530292 powernv_pstate_info.nr_pstates = nr_pstates;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530293 pr_debug("NR PStates %d\n", nr_pstates);
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +0530294
295 pstate_sign_prefix = pstate_min & ~0xFF;
296
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530297 for (i = 0; i < nr_pstates; i++) {
298 u32 id = be32_to_cpu(pstate_ids[i]);
299 u32 freq = be32_to_cpu(pstate_freqs[i]);
300
301 pr_debug("PState id %d freq %d MHz\n", id, freq);
302 powernv_freqs[i].frequency = freq * 1000; /* kHz */
Gautham R. Shenoy0692c692014-04-01 12:43:27 +0530303 powernv_freqs[i].driver_data = id;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530304
305 if (id == pstate_max)
306 powernv_pstate_info.max = i;
Shilpasri G Bhat8e56a932018-01-12 12:43:53 +0530307 if (id == pstate_nominal)
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530308 powernv_pstate_info.nominal = i;
Shilpasri G Bhat8e56a932018-01-12 12:43:53 +0530309 if (id == pstate_min)
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530310 powernv_pstate_info.min = i;
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530311
312 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
313 int j;
314
315 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
316 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
317 }
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530318 }
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530319
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530320 /* End of list marker entry */
321 powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530322 return 0;
323}
324
325/* Returns the CPU frequency corresponding to the pstate_id. */
326static unsigned int pstate_id_to_freq(int pstate_id)
327{
328 int i;
329
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530330 i = pstate_to_idx(pstate_id);
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530331 if (i >= powernv_pstate_info.nr_pstates || i < 0) {
332 pr_warn("PState id %d outside of PState table, "
333 "reporting nominal id %d instead\n",
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530334 pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
335 i = powernv_pstate_info.nominal;
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +0530336 }
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530337
338 return powernv_freqs[i].frequency;
339}
340
341/*
342 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
343 * the firmware
344 */
345static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
346 char *buf)
347{
348 return sprintf(buf, "%u\n",
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530349 powernv_freqs[powernv_pstate_info.nominal].frequency);
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530350}
351
352struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
353 __ATTR_RO(cpuinfo_nominal_freq);
354
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530355#define SCALING_BOOST_FREQS_ATTR_INDEX 2
356
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530357static struct freq_attr *powernv_cpu_freq_attr[] = {
358 &cpufreq_freq_attr_scaling_available_freqs,
359 &cpufreq_freq_attr_cpuinfo_nominal_freq,
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +0530360 &cpufreq_freq_attr_scaling_boost_freqs,
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530361 NULL,
362};
363
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530364#define throttle_attr(name, member) \
365static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
366{ \
367 struct chip *chip = per_cpu(chip_info, policy->cpu); \
368 \
369 return sprintf(buf, "%u\n", chip->member); \
370} \
371 \
372static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
373
374throttle_attr(unthrottle, reason[NO_THROTTLE]);
375throttle_attr(powercap, reason[POWERCAP]);
376throttle_attr(overtemp, reason[CPU_OVERTEMP]);
377throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
378throttle_attr(overcurrent, reason[OVERCURRENT]);
379throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
380throttle_attr(turbo_stat, throttle_turbo);
381throttle_attr(sub_turbo_stat, throttle_sub_turbo);
382
383static struct attribute *throttle_attrs[] = {
384 &throttle_attr_unthrottle.attr,
385 &throttle_attr_powercap.attr,
386 &throttle_attr_overtemp.attr,
387 &throttle_attr_supply_fault.attr,
388 &throttle_attr_overcurrent.attr,
389 &throttle_attr_occ_reset.attr,
390 &throttle_attr_turbo_stat.attr,
391 &throttle_attr_sub_turbo_stat.attr,
392 NULL,
393};
394
395static const struct attribute_group throttle_attr_grp = {
396 .name = "throttle_stats",
397 .attrs = throttle_attrs,
398};
399
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530400/* Helper routines */
401
402/* Access helpers to power mgt SPR */
403
404static inline unsigned long get_pmspr(unsigned long sprn)
405{
406 switch (sprn) {
407 case SPRN_PMCR:
408 return mfspr(SPRN_PMCR);
409
410 case SPRN_PMICR:
411 return mfspr(SPRN_PMICR);
412
413 case SPRN_PMSR:
414 return mfspr(SPRN_PMSR);
415 }
416 BUG();
417}
418
419static inline void set_pmspr(unsigned long sprn, unsigned long val)
420{
421 switch (sprn) {
422 case SPRN_PMCR:
423 mtspr(SPRN_PMCR, val);
424 return;
425
426 case SPRN_PMICR:
427 mtspr(SPRN_PMICR, val);
428 return;
429 }
430 BUG();
431}
432
433/*
434 * Use objects of this type to query/update
435 * pstates on a remote CPU via smp_call_function.
436 */
437struct powernv_smp_call_data {
438 unsigned int freq;
439 int pstate_id;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530440 int gpstate_id;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530441};
442
443/*
444 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
445 *
446 * Called via smp_call_function.
447 *
448 * Note: The caller of the smp_call_function should pass an argument of
449 * the type 'struct powernv_smp_call_data *' along with this function.
450 *
451 * The current frequency on this CPU will be returned via
452 * ((struct powernv_smp_call_data *)arg)->freq;
453 */
454static void powernv_read_cpu_freq(void *arg)
455{
456 unsigned long pmspr_val;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530457 struct powernv_smp_call_data *freq_data = arg;
458
459 pmspr_val = get_pmspr(SPRN_PMSR);
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +0530460 freq_data->pstate_id = extract_local_pstate(pmspr_val);
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530461 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
462
463 pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
464 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
465 freq_data->freq);
466}
467
468/*
469 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
470 * firmware for CPU 'cpu'. This value is reported through the sysfs
471 * file cpuinfo_cur_freq.
472 */
Brian Norris60d1ea42014-05-11 00:51:20 -0700473static unsigned int powernv_cpufreq_get(unsigned int cpu)
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530474{
475 struct powernv_smp_call_data freq_data;
476
477 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
478 &freq_data, 1);
479
480 return freq_data.freq;
481}
482
483/*
484 * set_pstate: Sets the pstate on this CPU.
485 *
486 * This is called via an smp_call_function.
487 *
488 * The caller must ensure that freq_data is of the type
489 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
490 * on this CPU should be present in freq_data->pstate_id.
491 */
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530492static void set_pstate(void *data)
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530493{
494 unsigned long val;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530495 struct powernv_smp_call_data *freq_data = data;
496 unsigned long pstate_ul = freq_data->pstate_id;
497 unsigned long gpstate_ul = freq_data->gpstate_id;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530498
499 val = get_pmspr(SPRN_PMCR);
500 val = val & 0x0000FFFFFFFFFFFFULL;
501
502 pstate_ul = pstate_ul & 0xFF;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530503 gpstate_ul = gpstate_ul & 0xFF;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530504
505 /* Set both global(bits 56..63) and local(bits 48..55) PStates */
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530506 val = val | (gpstate_ul << 56) | (pstate_ul << 48);
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530507
508 pr_debug("Setting cpu %d pmcr to %016lX\n",
509 raw_smp_processor_id(), val);
510 set_pmspr(SPRN_PMCR, val);
511}
512
513/*
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200514 * get_nominal_index: Returns the index corresponding to the nominal
515 * pstate in the cpufreq table
516 */
517static inline unsigned int get_nominal_index(void)
518{
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530519 return powernv_pstate_info.nominal;
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200520}
521
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530522static void powernv_cpufreq_throttle_check(void *data)
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530523{
Michael Neuling3e5963b2016-03-21 22:24:52 +0530524 struct chip *chip;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530525 unsigned int cpu = smp_processor_id();
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530526 unsigned long pmsr;
Michael Neuling3e5963b2016-03-21 22:24:52 +0530527 int pmsr_pmax;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530528 unsigned int pmsr_pmax_idx;
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530529
530 pmsr = get_pmspr(SPRN_PMSR);
Michael Neuling3e5963b2016-03-21 22:24:52 +0530531 chip = this_cpu_read(chip_info);
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530532
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530533 /* Check for Pmax Capping */
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +0530534 pmsr_pmax = extract_max_pstate(pmsr);
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530535 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
536 if (pmsr_pmax_idx != powernv_pstate_info.max) {
Michael Neuling3e5963b2016-03-21 22:24:52 +0530537 if (chip->throttled)
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530538 goto next;
Michael Neuling3e5963b2016-03-21 22:24:52 +0530539 chip->throttled = true;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530540 if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
541 pr_warn_once("CPU %d on Chip %u has Pmax(%d) reduced below nominal frequency(%d)\n",
Michael Neuling3e5963b2016-03-21 22:24:52 +0530542 cpu, chip->id, pmsr_pmax,
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530543 idx_to_pstate(powernv_pstate_info.nominal));
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530544 chip->throttle_sub_turbo++;
545 } else {
546 chip->throttle_turbo++;
547 }
Michael Neuling3e5963b2016-03-21 22:24:52 +0530548 trace_powernv_throttle(chip->id,
549 throttle_reason[chip->throttle_reason],
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530550 pmsr_pmax);
Michael Neuling3e5963b2016-03-21 22:24:52 +0530551 } else if (chip->throttled) {
552 chip->throttled = false;
553 trace_powernv_throttle(chip->id,
554 throttle_reason[chip->throttle_reason],
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530555 pmsr_pmax);
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530556 }
557
Shilpasri G Bhat3dd3ebe2015-07-16 13:34:22 +0530558 /* Check if Psafe_mode_active is set in PMSR. */
Shilpasri G Bhat053819e2015-07-16 13:34:18 +0530559next:
Shilpasri G Bhat3dd3ebe2015-07-16 13:34:22 +0530560 if (pmsr & PMSR_PSAFE_ENABLE) {
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530561 throttled = true;
562 pr_info("Pstate set to safe frequency\n");
563 }
564
565 /* Check if SPR_EM_DISABLE is set in PMSR */
566 if (pmsr & PMSR_SPR_EM_DISABLE) {
567 throttled = true;
568 pr_info("Frequency Control disabled from OS\n");
569 }
570
571 if (throttled) {
572 pr_info("PMSR = %16lx\n", pmsr);
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530573 pr_warn("CPU Frequency could be throttled\n");
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530574 }
575}
576
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530577/**
578 * calc_global_pstate - Calculate global pstate
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530579 * @elapsed_time: Elapsed time in milliseconds
580 * @local_pstate_idx: New local pstate
581 * @highest_lpstate_idx: pstate from which its ramping down
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530582 *
583 * Finds the appropriate global pstate based on the pstate from which its
584 * ramping down and the time elapsed in ramping down. It follows a quadratic
585 * equation which ensures that it reaches ramping down to pmin in 5sec.
586 */
587static inline int calc_global_pstate(unsigned int elapsed_time,
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530588 int highest_lpstate_idx,
589 int local_pstate_idx)
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530590{
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530591 int index_diff;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530592
593 /*
594 * Using ramp_down_percent we get the percentage of rampdown
595 * that we are expecting to be dropping. Difference between
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530596 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530597 * number of how many pstates we will drop eventually by the end of
598 * 5 seconds, then just scale it get the number pstates to be dropped.
599 */
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530600 index_diff = ((int)ramp_down_percent(elapsed_time) *
601 (powernv_pstate_info.min - highest_lpstate_idx)) / 100;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530602
603 /* Ensure that global pstate is >= to local pstate */
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530604 if (highest_lpstate_idx + index_diff >= local_pstate_idx)
605 return local_pstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530606 else
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530607 return highest_lpstate_idx + index_diff;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530608}
609
610static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
611{
612 unsigned int timer_interval;
613
614 /*
615 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
616 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
617 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
618 * seconds of ramp down time.
619 */
620 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
621 > MAX_RAMP_DOWN_TIME)
622 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
623 else
624 timer_interval = GPSTATE_TIMER_INTERVAL;
625
Thomas Gleixner7bc54b62016-07-04 09:50:18 +0000626 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530627}
628
629/**
630 * gpstate_timer_handler
631 *
632 * @data: pointer to cpufreq_policy on which timer was queued
633 *
634 * This handler brings down the global pstate closer to the local pstate
635 * according quadratic equation. Queues a new timer if it is still not equal
636 * to local pstate
637 */
638void gpstate_timer_handler(unsigned long data)
639{
640 struct cpufreq_policy *policy = (struct cpufreq_policy *)data;
641 struct global_pstate_info *gpstates = policy->driver_data;
Akshay Adiga20b15b72016-11-08 19:03:28 +0530642 int gpstate_idx, lpstate_idx;
643 unsigned long val;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530644 unsigned int time_diff = jiffies_to_msecs(jiffies)
645 - gpstates->last_sampled_time;
646 struct powernv_smp_call_data freq_data;
647
648 if (!spin_trylock(&gpstates->gpstate_lock))
649 return;
Shilpasri G Bhat20b0f752018-04-25 16:29:31 +0530650 /*
651 * If the timer has migrated to the different cpu then bring
652 * it back to one of the policy->cpus
653 */
654 if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) {
655 gpstates->timer.expires = jiffies + msecs_to_jiffies(1);
656 add_timer_on(&gpstates->timer, cpumask_first(policy->cpus));
657 spin_unlock(&gpstates->gpstate_lock);
658 return;
659 }
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530660
Akshay Adiga20b15b72016-11-08 19:03:28 +0530661 /*
662 * If PMCR was last updated was using fast_swtich then
663 * We may have wrong in gpstate->last_lpstate_idx
664 * value. Hence, read from PMCR to get correct data.
665 */
666 val = get_pmspr(SPRN_PMCR);
Gautham R. Shenoyda5e12a2017-12-13 12:27:39 +0530667 freq_data.gpstate_id = extract_global_pstate(val);
668 freq_data.pstate_id = extract_local_pstate(val);
Akshay Adiga20b15b72016-11-08 19:03:28 +0530669 if (freq_data.gpstate_id == freq_data.pstate_id) {
670 reset_gpstates(policy);
671 spin_unlock(&gpstates->gpstate_lock);
672 return;
673 }
674
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530675 gpstates->last_sampled_time += time_diff;
676 gpstates->elapsed_time += time_diff;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530677
Akshay Adiga20b15b72016-11-08 19:03:28 +0530678 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530679 gpstate_idx = pstate_to_idx(freq_data.pstate_id);
Akshay Adigac9a81e62016-11-14 17:29:27 +0530680 lpstate_idx = gpstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530681 reset_gpstates(policy);
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530682 gpstates->highest_lpstate_idx = gpstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530683 } else {
Akshay Adiga20b15b72016-11-08 19:03:28 +0530684 lpstate_idx = pstate_to_idx(freq_data.pstate_id);
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530685 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
686 gpstates->highest_lpstate_idx,
Akshay Adiga20b15b72016-11-08 19:03:28 +0530687 lpstate_idx);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530688 }
Akshay Adiga20b15b72016-11-08 19:03:28 +0530689 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
690 gpstates->last_gpstate_idx = gpstate_idx;
691 gpstates->last_lpstate_idx = lpstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530692 /*
693 * If local pstate is equal to global pstate, rampdown is over
694 * So timer is not required to be queued.
695 */
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530696 if (gpstate_idx != gpstates->last_lpstate_idx)
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530697 queue_gpstate_timer(gpstates);
698
Shilpasri G Bhat20b0f752018-04-25 16:29:31 +0530699 set_pstate(&freq_data);
Akshay Adiga1fd3ff22016-05-03 20:49:35 +0530700 spin_unlock(&gpstates->gpstate_lock);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530701}
702
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200703/*
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530704 * powernv_cpufreq_target_index: Sets the frequency corresponding to
705 * the cpufreq table entry indexed by new_index on the cpus in the
706 * mask policy->cpus
707 */
708static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
709 unsigned int new_index)
710{
711 struct powernv_smp_call_data freq_data;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530712 unsigned int cur_msec, gpstate_idx;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530713 struct global_pstate_info *gpstates = policy->driver_data;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530714
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200715 if (unlikely(rebooting) && new_index != get_nominal_index())
716 return 0;
717
Denis Kirjanov8a10c062016-11-08 05:39:28 -0500718 if (!throttled) {
719 /* we don't want to be preempted while
720 * checking if the CPU frequency has been throttled
721 */
722 preempt_disable();
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530723 powernv_cpufreq_throttle_check(NULL);
Denis Kirjanov8a10c062016-11-08 05:39:28 -0500724 preempt_enable();
725 }
Shilpasri G Bhat09a972d2015-04-01 15:16:34 +0530726
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530727 cur_msec = jiffies_to_msecs(get_jiffies_64());
728
Akshay Adiga1fd3ff22016-05-03 20:49:35 +0530729 spin_lock(&gpstates->gpstate_lock);
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530730 freq_data.pstate_id = idx_to_pstate(new_index);
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530731
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530732 if (!gpstates->last_sampled_time) {
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530733 gpstate_idx = new_index;
734 gpstates->highest_lpstate_idx = new_index;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530735 goto gpstates_done;
736 }
737
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530738 if (gpstates->last_gpstate_idx < new_index) {
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530739 gpstates->elapsed_time += cur_msec -
740 gpstates->last_sampled_time;
741
742 /*
743 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
744 * we should be resetting all global pstate related data. Set it
745 * equal to local pstate to start fresh.
746 */
747 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
748 reset_gpstates(policy);
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530749 gpstates->highest_lpstate_idx = new_index;
750 gpstate_idx = new_index;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530751 } else {
752 /* Elaspsed_time is less than 5 seconds, continue to rampdown */
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530753 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
754 gpstates->highest_lpstate_idx,
755 new_index);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530756 }
757 } else {
758 reset_gpstates(policy);
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530759 gpstates->highest_lpstate_idx = new_index;
760 gpstate_idx = new_index;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530761 }
762
763 /*
764 * If local pstate is equal to global pstate, rampdown is over
765 * So timer is not required to be queued.
766 */
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530767 if (gpstate_idx != new_index)
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530768 queue_gpstate_timer(gpstates);
Akshay Adiga0bc10b92016-05-03 20:49:36 +0530769 else
770 del_timer_sync(&gpstates->timer);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530771
772gpstates_done:
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530773 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530774 gpstates->last_sampled_time = cur_msec;
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530775 gpstates->last_gpstate_idx = gpstate_idx;
776 gpstates->last_lpstate_idx = new_index;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530777
Akshay Adiga1fd3ff22016-05-03 20:49:35 +0530778 spin_unlock(&gpstates->gpstate_lock);
779
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530780 /*
781 * Use smp_call_function to send IPI and execute the
782 * mtspr on target CPU. We could do that without IPI
783 * if current CPU is within policy->cpus (core)
784 */
785 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530786 return 0;
787}
788
789static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
790{
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530791 int base, i, ret;
Shilpasri G Bhat2920e9c2016-04-19 15:28:00 +0530792 struct kernfs_node *kn;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530793 struct global_pstate_info *gpstates;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530794
795 base = cpu_first_thread_sibling(policy->cpu);
796
797 for (i = 0; i < threads_per_core; i++)
798 cpumask_set_cpu(base + i, policy->cpus);
799
Shilpasri G Bhat2920e9c2016-04-19 15:28:00 +0530800 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
801 if (!kn) {
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530802 int ret;
803
804 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
805 if (ret) {
806 pr_info("Failed to create throttle stats directory for cpu %d\n",
807 policy->cpu);
808 return ret;
809 }
Shilpasri G Bhat2920e9c2016-04-19 15:28:00 +0530810 } else {
811 kernfs_put(kn);
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530812 }
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530813
814 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL);
815 if (!gpstates)
816 return -ENOMEM;
817
818 policy->driver_data = gpstates;
819
820 /* initialize timer */
Thomas Gleixner7bc54b62016-07-04 09:50:18 +0000821 init_timer_pinned_deferrable(&gpstates->timer);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530822 gpstates->timer.data = (unsigned long)policy;
823 gpstates->timer.function = gpstate_timer_handler;
824 gpstates->timer.expires = jiffies +
825 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
826 spin_lock_init(&gpstates->gpstate_lock);
827 ret = cpufreq_table_validate_and_show(policy, powernv_freqs);
828
Akshay Adiga60c9efb2016-11-08 19:03:27 +0530829 if (ret < 0) {
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530830 kfree(policy->driver_data);
Akshay Adiga60c9efb2016-11-08 19:03:27 +0530831 return ret;
832 }
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530833
Akshay Adiga60c9efb2016-11-08 19:03:27 +0530834 policy->fast_switch_possible = true;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530835 return ret;
836}
837
838static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
839{
840 /* timer is deleted in cpufreq_cpu_stop() */
841 kfree(policy->driver_data);
842
843 return 0;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530844}
845
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200846static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
847 unsigned long action, void *unused)
848{
849 int cpu;
Srikar Dronamrajue146abf2020-09-22 13:32:54 +0530850 struct cpufreq_policy *cpu_policy;
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200851
852 rebooting = true;
853 for_each_online_cpu(cpu) {
Srikar Dronamrajue146abf2020-09-22 13:32:54 +0530854 cpu_policy = cpufreq_cpu_get(cpu);
855 if (!cpu_policy)
856 continue;
857 powernv_cpufreq_target_index(cpu_policy, get_nominal_index());
858 cpufreq_cpu_put(cpu_policy);
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +0200859 }
860
861 return NOTIFY_DONE;
862}
863
864static struct notifier_block powernv_cpufreq_reboot_nb = {
865 .notifier_call = powernv_cpufreq_reboot_notifier,
866};
867
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530868void powernv_cpufreq_work_fn(struct work_struct *work)
869{
870 struct chip *chip = container_of(work, struct chip, throttle);
Pratik Rajesh Sampat20bec892020-03-16 19:27:43 +0530871 struct cpufreq_policy *policy;
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530872 unsigned int cpu;
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530873 cpumask_t mask;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530874
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530875 get_online_cpus();
876 cpumask_and(&mask, &chip->mask, cpu_online_mask);
877 smp_call_function_any(&mask,
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530878 powernv_cpufreq_throttle_check, NULL, 0);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530879
880 if (!chip->restore)
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530881 goto out;
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530882
883 chip->restore = false;
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530884 for_each_cpu(cpu, &mask) {
885 int index;
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530886
Pratik Rajesh Sampat20bec892020-03-16 19:27:43 +0530887 policy = cpufreq_cpu_get(cpu);
888 if (!policy)
889 continue;
890 index = cpufreq_table_find_index_c(policy, policy->cur);
891 powernv_cpufreq_target_index(policy, index);
892 cpumask_andnot(&mask, &mask, policy->cpus);
893 cpufreq_cpu_put(policy);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530894 }
Shilpasri G Bhat6d167a42016-02-03 01:11:38 +0530895out:
896 put_online_cpus();
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530897}
898
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530899static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
900 unsigned long msg_type, void *_msg)
901{
902 struct opal_msg *msg = _msg;
903 struct opal_occ_msg omsg;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530904 int i;
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530905
906 if (msg_type != OPAL_MSG_OCC)
907 return 0;
908
909 omsg.type = be64_to_cpu(msg->params[0]);
910
911 switch (omsg.type) {
912 case OCC_RESET:
913 occ_reset = true;
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530914 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530915 /*
916 * powernv_cpufreq_throttle_check() is called in
917 * target() callback which can detect the throttle state
918 * for governors like ondemand.
919 * But static governors will not call target() often thus
920 * report throttling here.
921 */
922 if (!throttled) {
923 throttled = true;
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530924 pr_warn("CPU frequency is throttled for duration\n");
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530925 }
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530926
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530927 break;
928 case OCC_LOAD:
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530929 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530930 break;
931 case OCC_THROTTLE:
932 omsg.chip = be64_to_cpu(msg->params[1]);
933 omsg.throttle_status = be64_to_cpu(msg->params[2]);
934
935 if (occ_reset) {
936 occ_reset = false;
937 throttled = false;
Shilpasri G Bhat309d0632015-08-27 14:41:44 +0530938 pr_info("OCC Active, CPU frequency is no longer throttled\n");
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530939
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530940 for (i = 0; i < nr_chips; i++) {
941 chips[i].restore = true;
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530942 schedule_work(&chips[i].throttle);
Shilpasri G Bhat227942802015-07-16 13:34:23 +0530943 }
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530944
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530945 return 0;
946 }
947
Shilpasri G Bhat735366f2015-07-16 13:34:21 +0530948 for (i = 0; i < nr_chips; i++)
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530949 if (chips[i].id == omsg.chip)
950 break;
951
952 if (omsg.throttle_status >= 0 &&
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530953 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530954 chips[i].throttle_reason = omsg.throttle_status;
Shilpasri G Bhat1b028982016-03-22 18:57:09 +0530955 chips[i].reason[omsg.throttle_status]++;
956 }
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +0530957
958 if (!omsg.throttle_status)
959 chips[i].restore = true;
960
961 schedule_work(&chips[i].throttle);
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +0530962 }
963 return 0;
964}
965
966static struct notifier_block powernv_cpufreq_opal_nb = {
967 .notifier_call = powernv_cpufreq_occ_msg,
968 .next = NULL,
969 .priority = 0,
970};
971
Preeti U Murthyb1203392014-09-29 15:47:53 +0200972static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
973{
974 struct powernv_smp_call_data freq_data;
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530975 struct global_pstate_info *gpstates = policy->driver_data;
Preeti U Murthyb1203392014-09-29 15:47:53 +0200976
Akshay Adiga09ca4c92016-06-30 11:53:07 +0530977 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
978 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
Preeti U Murthyb1203392014-09-29 15:47:53 +0200979 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +0530980 del_timer_sync(&gpstates->timer);
Preeti U Murthyb1203392014-09-29 15:47:53 +0200981}
982
Akshay Adiga60c9efb2016-11-08 19:03:27 +0530983static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
984 unsigned int target_freq)
985{
986 int index;
987 struct powernv_smp_call_data freq_data;
988
989 index = cpufreq_table_find_index_dl(policy, target_freq);
990 freq_data.pstate_id = powernv_freqs[index].driver_data;
991 freq_data.gpstate_id = powernv_freqs[index].driver_data;
992 set_pstate(&freq_data);
993
994 return powernv_freqs[index].frequency;
995}
996
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +0530997static struct cpufreq_driver powernv_cpufreq_driver = {
998 .name = "powernv-cpufreq",
999 .flags = CPUFREQ_CONST_LOOPS,
1000 .init = powernv_cpufreq_cpu_init,
Akshay Adigaeaa2c3a2016-04-19 15:28:01 +05301001 .exit = powernv_cpufreq_cpu_exit,
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301002 .verify = cpufreq_generic_frequency_table_verify,
1003 .target_index = powernv_cpufreq_target_index,
Akshay Adiga60c9efb2016-11-08 19:03:27 +05301004 .fast_switch = powernv_fast_switch,
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301005 .get = powernv_cpufreq_get,
Preeti U Murthyb1203392014-09-29 15:47:53 +02001006 .stop_cpu = powernv_cpufreq_stop_cpu,
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301007 .attr = powernv_cpu_freq_attr,
1008};
1009
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301010static int init_chip_info(void)
1011{
John Hubbard6dd08f62019-10-30 22:21:59 -07001012 unsigned int *chip;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301013 unsigned int cpu, i;
1014 unsigned int prev_chip_id = UINT_MAX;
Pratik R. Sampat5937a882021-07-28 17:35:00 +05301015 cpumask_t *chip_cpu_mask;
John Hubbard6dd08f62019-10-30 22:21:59 -07001016 int ret = 0;
1017
1018 chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL);
1019 if (!chip)
1020 return -ENOMEM;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301021
Pratik R. Sampat5937a882021-07-28 17:35:00 +05301022 /* Allocate a chip cpu mask large enough to fit mask for all chips */
1023 chip_cpu_mask = kcalloc(MAX_NR_CHIPS, sizeof(cpumask_t), GFP_KERNEL);
1024 if (!chip_cpu_mask) {
1025 ret = -ENOMEM;
1026 goto free_and_return;
1027 }
1028
Michael Neuling3e5963b2016-03-21 22:24:52 +05301029 for_each_possible_cpu(cpu) {
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301030 unsigned int id = cpu_to_chip_id(cpu);
1031
1032 if (prev_chip_id != id) {
1033 prev_chip_id = id;
1034 chip[nr_chips++] = id;
1035 }
Pratik R. Sampat5937a882021-07-28 17:35:00 +05301036 cpumask_set_cpu(cpu, &chip_cpu_mask[nr_chips-1]);
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301037 }
1038
Shilpasri G Bhatc89f2682016-02-03 01:11:41 +05301039 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
John Hubbard6dd08f62019-10-30 22:21:59 -07001040 if (!chips) {
1041 ret = -ENOMEM;
Pratik R. Sampat5937a882021-07-28 17:35:00 +05301042 goto out_free_chip_cpu_mask;
John Hubbard6dd08f62019-10-30 22:21:59 -07001043 }
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301044
1045 for (i = 0; i < nr_chips; i++) {
1046 chips[i].id = chip[i];
Pratik R. Sampat5937a882021-07-28 17:35:00 +05301047 cpumask_copy(&chips[i].mask, &chip_cpu_mask[i]);
Shilpasri G Bhat735366f2015-07-16 13:34:21 +05301048 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
Michael Neuling3e5963b2016-03-21 22:24:52 +05301049 for_each_cpu(cpu, &chips[i].mask)
1050 per_cpu(chip_info, cpu) = &chips[i];
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301051 }
1052
Pratik R. Sampat5937a882021-07-28 17:35:00 +05301053out_free_chip_cpu_mask:
1054 kfree(chip_cpu_mask);
John Hubbard6dd08f62019-10-30 22:21:59 -07001055free_and_return:
1056 kfree(chip);
1057 return ret;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301058}
1059
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301060static inline void clean_chip_info(void)
1061{
Oliver O'Halloran3bf21492020-02-06 17:26:21 +11001062 int i;
1063
1064 /* flush any pending work items */
1065 if (chips)
1066 for (i = 0; i < nr_chips; i++)
1067 cancel_work_sync(&chips[i].throttle);
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301068 kfree(chips);
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301069}
1070
1071static inline void unregister_all_notifiers(void)
1072{
1073 opal_message_notifier_unregister(OPAL_MSG_OCC,
1074 &powernv_cpufreq_opal_nb);
1075 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
1076}
1077
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301078static int __init powernv_cpufreq_init(void)
1079{
1080 int rc = 0;
1081
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +05301082 /* Don't probe on pseries (guest) platforms */
Stewart Smithe4d54f72015-12-09 17:18:20 +11001083 if (!firmware_has_feature(FW_FEATURE_OPAL))
Vaidyanathan Srinivasan6174bac2014-08-03 14:54:05 +05301084 return -ENODEV;
1085
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301086 /* Discover pstates from device tree and init */
1087 rc = init_powernv_pstates();
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301088 if (rc)
1089 goto out;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301090
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301091 /* Populate chip info */
1092 rc = init_chip_info();
1093 if (rc)
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301094 goto out;
Shilpasri G Bhat053819e2015-07-16 13:34:18 +05301095
Shilpasri G Bhatcf30af762014-09-29 15:49:11 +02001096 register_reboot_notifier(&powernv_cpufreq_reboot_nb);
Shilpasri G Bhatcb166fa2015-07-16 13:34:20 +05301097 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301098
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +05301099 if (powernv_pstate_info.wof_enabled)
1100 powernv_cpufreq_driver.boost_enabled = true;
1101 else
1102 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301103
Shilpasri G Bhatb12f7a22017-01-03 16:36:00 +05301104 rc = cpufreq_register_driver(&powernv_cpufreq_driver);
1105 if (rc) {
1106 pr_info("Failed to register the cpufreq driver (%d)\n", rc);
1107 goto cleanup_notifiers;
1108 }
1109
1110 if (powernv_pstate_info.wof_enabled)
1111 cpufreq_enable_boost_support();
1112
1113 return 0;
1114cleanup_notifiers:
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301115 unregister_all_notifiers();
1116 clean_chip_info();
1117out:
1118 pr_info("Platform driver disabled. System does not support PState control\n");
1119 return rc;
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301120}
1121module_init(powernv_cpufreq_init);
1122
1123static void __exit powernv_cpufreq_exit(void)
1124{
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301125 cpufreq_unregister_driver(&powernv_cpufreq_driver);
Shilpasri G Bhatc5e29ea2016-02-26 16:06:51 +05301126 unregister_all_notifiers();
1127 clean_chip_info();
Vaidyanathan Srinivasanb3d627a2014-04-01 12:43:26 +05301128}
1129module_exit(powernv_cpufreq_exit);
1130
1131MODULE_LICENSE("GPL");
1132MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");