Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * Blackfin architecture-dependent process handling |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 3 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 4 | * Copyright 2004-2009 Analog Devices Inc. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 5 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 6 | * Licensed under the GPL-2 or later |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/module.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 10 | #include <linux/unistd.h> |
| 11 | #include <linux/user.h> |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame] | 12 | #include <linux/uaccess.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 13 | #include <linux/slab.h> |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 14 | #include <linux/sched.h> |
| 15 | #include <linux/tick.h> |
Bryan Wu | d31c5ab | 2007-08-10 13:00:42 -0700 | [diff] [blame] | 16 | #include <linux/fs.h> |
| 17 | #include <linux/err.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 18 | |
| 19 | #include <asm/blackfin.h> |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 20 | #include <asm/fixed_code.h> |
Graf Yang | dbc895f | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 21 | #include <asm/mem_map.h> |
David Howells | 3bed8d6 | 2012-03-12 23:36:56 +0000 | [diff] [blame] | 22 | #include <asm/irq.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 23 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 24 | asmlinkage void ret_from_fork(void); |
| 25 | |
| 26 | /* Points to the SDRAM backup memory for the stack that is currently in |
| 27 | * L1 scratchpad memory. |
| 28 | */ |
| 29 | void *current_l1_stack_save; |
| 30 | |
| 31 | /* The number of tasks currently using a L1 stack area. The SRAM is |
| 32 | * allocated/deallocated whenever this changes from/to zero. |
| 33 | */ |
| 34 | int nr_l1stack_tasks; |
| 35 | |
| 36 | /* Start and length of the area in L1 scratchpad memory which we've allocated |
| 37 | * for process stacks. |
| 38 | */ |
| 39 | void *l1_stack_base; |
| 40 | unsigned long l1_stack_len; |
| 41 | |
| 42 | /* |
| 43 | * Powermanagement idle function, if any.. |
| 44 | */ |
| 45 | void (*pm_idle)(void) = NULL; |
| 46 | EXPORT_SYMBOL(pm_idle); |
| 47 | |
| 48 | void (*pm_power_off)(void) = NULL; |
| 49 | EXPORT_SYMBOL(pm_power_off); |
| 50 | |
| 51 | /* |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 52 | * The idle loop on BFIN |
| 53 | */ |
| 54 | #ifdef CONFIG_IDLE_L1 |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 55 | static void default_idle(void)__attribute__((l1_text)); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 56 | void cpu_idle(void)__attribute__((l1_text)); |
| 57 | #endif |
| 58 | |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 59 | /* |
| 60 | * This is our default idle handler. We need to disable |
| 61 | * interrupts here to ensure we don't miss a wakeup call. |
| 62 | */ |
| 63 | static void default_idle(void) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 64 | { |
Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 65 | #ifdef CONFIG_IPIPE |
| 66 | ipipe_suspend_domain(); |
| 67 | #endif |
David Howells | 3b139cd | 2010-10-07 14:08:52 +0100 | [diff] [blame] | 68 | hard_local_irq_disable(); |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 69 | if (!need_resched()) |
| 70 | idle_with_irq_disabled(); |
| 71 | |
David Howells | 3b139cd | 2010-10-07 14:08:52 +0100 | [diff] [blame] | 72 | hard_local_irq_enable(); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 73 | } |
| 74 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 75 | /* |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 76 | * The idle thread. We try to conserve power, while trying to keep |
| 77 | * overall latency low. The architecture specific idle is passed |
| 78 | * a value to indicate the level of "idleness" of the system. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 79 | */ |
| 80 | void cpu_idle(void) |
| 81 | { |
| 82 | /* endless idle loop with no priority at all */ |
| 83 | while (1) { |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 84 | void (*idle)(void) = pm_idle; |
| 85 | |
| 86 | #ifdef CONFIG_HOTPLUG_CPU |
| 87 | if (cpu_is_offline(smp_processor_id())) |
| 88 | cpu_die(); |
| 89 | #endif |
| 90 | if (!idle) |
| 91 | idle = default_idle; |
Frederic Weisbecker | 1268fbc | 2011-11-17 18:48:14 +0100 | [diff] [blame] | 92 | tick_nohz_idle_enter(); |
| 93 | rcu_idle_enter(); |
Vitja Makarov | 8b5f79f | 2008-02-29 12:24:23 +0800 | [diff] [blame] | 94 | while (!need_resched()) |
| 95 | idle(); |
Frederic Weisbecker | 1268fbc | 2011-11-17 18:48:14 +0100 | [diff] [blame] | 96 | rcu_idle_exit(); |
| 97 | tick_nohz_idle_exit(); |
Bob Liu | b5affb0 | 2012-05-16 17:37:24 +0800 | [diff] [blame] | 98 | preempt_enable_no_resched(); |
| 99 | schedule(); |
| 100 | preempt_disable(); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 101 | } |
| 102 | } |
| 103 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 104 | /* |
Mike Frysinger | d5ce528 | 2009-06-13 11:32:34 -0400 | [diff] [blame] | 105 | * Do necessary setup to start up a newly executed thread. |
| 106 | * |
| 107 | * pass the data segment into user programs if it exists, |
| 108 | * it can't hurt anything as far as I can tell |
| 109 | */ |
| 110 | void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) |
| 111 | { |
Mike Frysinger | d5ce528 | 2009-06-13 11:32:34 -0400 | [diff] [blame] | 112 | regs->pc = new_ip; |
| 113 | if (current->mm) |
| 114 | regs->p5 = current->mm->start_data; |
Graf Yang | aa23531 | 2009-09-21 11:51:31 +0000 | [diff] [blame] | 115 | #ifndef CONFIG_SMP |
Mike Frysinger | d5ce528 | 2009-06-13 11:32:34 -0400 | [diff] [blame] | 116 | task_thread_info(current)->l1_task_info.stack_start = |
| 117 | (void *)current->mm->context.stack_start; |
| 118 | task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp; |
| 119 | memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info, |
| 120 | sizeof(*L1_SCRATCH_TASK_INFO)); |
| 121 | #endif |
| 122 | wrusp(new_sp); |
| 123 | } |
| 124 | EXPORT_SYMBOL_GPL(start_thread); |
| 125 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 126 | void flush_thread(void) |
| 127 | { |
| 128 | } |
| 129 | |
Al Viro | 135c37b | 2012-11-13 23:47:37 -0500 | [diff] [blame] | 130 | asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 131 | { |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 132 | #ifdef __ARCH_SYNC_CORE_DCACHE |
Peter Zijlstra | 29baa74 | 2012-04-23 12:11:21 +0200 | [diff] [blame] | 133 | if (current->nr_cpus_allowed == num_possible_cpus()) |
KOSAKI Motohiro | e887eb6 | 2011-04-26 10:56:42 +0900 | [diff] [blame] | 134 | set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id())); |
Graf Yang | 8f65873 | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 135 | #endif |
Al Viro | 135c37b | 2012-11-13 23:47:37 -0500 | [diff] [blame] | 136 | if (newsp) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 137 | newsp -= 12; |
Al Viro | e80d666 | 2012-10-22 23:10:08 -0400 | [diff] [blame] | 138 | return do_fork(clone_flags, newsp, 0, NULL, NULL); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | int |
Alexey Dobriyan | 6f2c55b | 2009-04-02 16:56:59 -0700 | [diff] [blame] | 142 | copy_thread(unsigned long clone_flags, |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 143 | unsigned long usp, unsigned long topstk, |
Al Viro | afa86fc | 2012-10-22 22:51:14 -0400 | [diff] [blame] | 144 | struct task_struct *p) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 145 | { |
| 146 | struct pt_regs *childregs; |
Al Viro | ee1e17c | 2012-10-13 03:22:53 -0400 | [diff] [blame] | 147 | unsigned long *v; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 148 | |
| 149 | childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1; |
Al Viro | ee1e17c | 2012-10-13 03:22:53 -0400 | [diff] [blame] | 150 | v = ((unsigned long *)childregs) - 2; |
Al Viro | afa86fc | 2012-10-22 22:51:14 -0400 | [diff] [blame] | 151 | if (unlikely(p->flags & PF_KTHREAD)) { |
Al Viro | ee1e17c | 2012-10-13 03:22:53 -0400 | [diff] [blame] | 152 | memset(childregs, 0, sizeof(struct pt_regs)); |
| 153 | v[0] = usp; |
| 154 | v[1] = topstk; |
| 155 | childregs->orig_p0 = -1; |
| 156 | childregs->ipend = 0x8000; |
| 157 | __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):); |
| 158 | p->thread.usp = 0; |
| 159 | } else { |
Al Viro | afa86fc | 2012-10-22 22:51:14 -0400 | [diff] [blame] | 160 | *childregs = *current_pt_regs(); |
Al Viro | ee1e17c | 2012-10-13 03:22:53 -0400 | [diff] [blame] | 161 | childregs->r0 = 0; |
Al Viro | 135c37b | 2012-11-13 23:47:37 -0500 | [diff] [blame] | 162 | p->thread.usp = usp ? : rdusp(); |
Al Viro | ee1e17c | 2012-10-13 03:22:53 -0400 | [diff] [blame] | 163 | v[0] = v[1] = 0; |
| 164 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 165 | |
Al Viro | ee1e17c | 2012-10-13 03:22:53 -0400 | [diff] [blame] | 166 | p->thread.ksp = (unsigned long)v; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 167 | p->thread.pc = (unsigned long)ret_from_fork; |
| 168 | |
| 169 | return 0; |
| 170 | } |
| 171 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 172 | unsigned long get_wchan(struct task_struct *p) |
| 173 | { |
| 174 | unsigned long fp, pc; |
| 175 | unsigned long stack_page; |
| 176 | int count = 0; |
| 177 | if (!p || p == current || p->state == TASK_RUNNING) |
| 178 | return 0; |
| 179 | |
| 180 | stack_page = (unsigned long)p; |
| 181 | fp = p->thread.usp; |
| 182 | do { |
| 183 | if (fp < stack_page + sizeof(struct thread_info) || |
| 184 | fp >= 8184 + stack_page) |
| 185 | return 0; |
| 186 | pc = ((unsigned long *)fp)[1]; |
| 187 | if (!in_sched_functions(pc)) |
| 188 | return pc; |
| 189 | fp = *(unsigned long *)fp; |
| 190 | } |
| 191 | while (count++ < 16); |
| 192 | return 0; |
| 193 | } |
| 194 | |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 195 | void finish_atomic_sections (struct pt_regs *regs) |
| 196 | { |
Bernd Schmidt | 19d6d7d | 2008-05-07 11:41:26 +0800 | [diff] [blame] | 197 | int __user *up0 = (int __user *)regs->p0; |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 198 | |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 199 | switch (regs->pc) { |
Mike Frysinger | 2f5a086 | 2009-11-19 19:15:26 +0000 | [diff] [blame] | 200 | default: |
| 201 | /* not in middle of an atomic step, so resume like normal */ |
| 202 | return; |
| 203 | |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 204 | case ATOMIC_XCHG32 + 2: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 205 | put_user(regs->r1, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 206 | break; |
| 207 | |
| 208 | case ATOMIC_CAS32 + 2: |
| 209 | case ATOMIC_CAS32 + 4: |
| 210 | if (regs->r0 == regs->r1) |
Mike Frysinger | 9264949 | 2009-08-17 19:05:07 +0000 | [diff] [blame] | 211 | case ATOMIC_CAS32 + 6: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 212 | put_user(regs->r2, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 213 | break; |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 214 | |
| 215 | case ATOMIC_ADD32 + 2: |
| 216 | regs->r0 = regs->r1 + regs->r0; |
| 217 | /* fall through */ |
| 218 | case ATOMIC_ADD32 + 4: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 219 | put_user(regs->r0, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 220 | break; |
| 221 | |
| 222 | case ATOMIC_SUB32 + 2: |
| 223 | regs->r0 = regs->r1 - regs->r0; |
| 224 | /* fall through */ |
| 225 | case ATOMIC_SUB32 + 4: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 226 | put_user(regs->r0, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 227 | break; |
| 228 | |
| 229 | case ATOMIC_IOR32 + 2: |
| 230 | regs->r0 = regs->r1 | regs->r0; |
| 231 | /* fall through */ |
| 232 | case ATOMIC_IOR32 + 4: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 233 | put_user(regs->r0, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 234 | break; |
| 235 | |
| 236 | case ATOMIC_AND32 + 2: |
| 237 | regs->r0 = regs->r1 & regs->r0; |
| 238 | /* fall through */ |
| 239 | case ATOMIC_AND32 + 4: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 240 | put_user(regs->r0, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 241 | break; |
| 242 | |
| 243 | case ATOMIC_XOR32 + 2: |
| 244 | regs->r0 = regs->r1 ^ regs->r0; |
| 245 | /* fall through */ |
| 246 | case ATOMIC_XOR32 + 4: |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 247 | put_user(regs->r0, up0); |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 248 | break; |
| 249 | } |
Mike Frysinger | 2f5a086 | 2009-11-19 19:15:26 +0000 | [diff] [blame] | 250 | |
| 251 | /* |
| 252 | * We've finished the atomic section, and the only thing left for |
| 253 | * userspace is to do a RTS, so we might as well handle that too |
| 254 | * since we need to update the PC anyways. |
| 255 | */ |
| 256 | regs->pc = regs->rets; |
Bernd Schmidt | 7adfb58 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 257 | } |
| 258 | |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 259 | static inline |
| 260 | int in_mem(unsigned long addr, unsigned long size, |
| 261 | unsigned long start, unsigned long end) |
| 262 | { |
| 263 | return addr >= start && addr + size <= end; |
| 264 | } |
| 265 | static inline |
| 266 | int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off, |
| 267 | unsigned long const_addr, unsigned long const_size) |
| 268 | { |
| 269 | return const_size && |
| 270 | in_mem(addr, size, const_addr + off, const_addr + const_size); |
| 271 | } |
| 272 | static inline |
| 273 | int in_mem_const(unsigned long addr, unsigned long size, |
| 274 | unsigned long const_addr, unsigned long const_size) |
| 275 | { |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 276 | return in_mem_const_off(addr, size, 0, const_addr, const_size); |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 277 | } |
Bob Liu | b5affb0 | 2012-05-16 17:37:24 +0800 | [diff] [blame] | 278 | #ifdef CONFIG_BF60x |
| 279 | #define ASYNC_ENABLED(bnum, bctlnum) 1 |
| 280 | #else |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 281 | #define ASYNC_ENABLED(bnum, bctlnum) \ |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 282 | ({ \ |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 283 | (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \ |
| 284 | bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \ |
| 285 | 1; \ |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 286 | }) |
Bob Liu | b5affb0 | 2012-05-16 17:37:24 +0800 | [diff] [blame] | 287 | #endif |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 288 | /* |
| 289 | * We can't read EBIU banks that aren't enabled or we end up hanging |
| 290 | * on the access to the async space. Make sure we validate accesses |
| 291 | * that cross async banks too. |
| 292 | * 0 - found, but unusable |
| 293 | * 1 - found & usable |
| 294 | * 2 - not found |
| 295 | */ |
| 296 | static |
| 297 | int in_async(unsigned long addr, unsigned long size) |
| 298 | { |
| 299 | if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) { |
| 300 | if (!ASYNC_ENABLED(0, 0)) |
| 301 | return 0; |
| 302 | if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) |
| 303 | return 1; |
| 304 | size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr; |
| 305 | addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE; |
| 306 | } |
| 307 | if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) { |
| 308 | if (!ASYNC_ENABLED(1, 0)) |
| 309 | return 0; |
| 310 | if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) |
| 311 | return 1; |
| 312 | size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr; |
| 313 | addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE; |
| 314 | } |
| 315 | if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) { |
| 316 | if (!ASYNC_ENABLED(2, 1)) |
| 317 | return 0; |
| 318 | if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) |
| 319 | return 1; |
| 320 | size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr; |
| 321 | addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE; |
| 322 | } |
| 323 | if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { |
| 324 | if (ASYNC_ENABLED(3, 1)) |
| 325 | return 0; |
| 326 | if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) |
| 327 | return 1; |
| 328 | return 0; |
| 329 | } |
| 330 | |
| 331 | /* not within async bounds */ |
| 332 | return 2; |
| 333 | } |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 334 | |
| 335 | int bfin_mem_access_type(unsigned long addr, unsigned long size) |
| 336 | { |
| 337 | int cpu = raw_smp_processor_id(); |
| 338 | |
| 339 | /* Check that things do not wrap around */ |
| 340 | if (addr > ULONG_MAX - size) |
| 341 | return -EFAULT; |
| 342 | |
| 343 | if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end)) |
| 344 | return BFIN_MEM_ACCESS_CORE; |
| 345 | |
| 346 | if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH)) |
| 347 | return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; |
| 348 | if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH)) |
| 349 | return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; |
| 350 | if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH)) |
| 351 | return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; |
| 352 | if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH)) |
| 353 | return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; |
| 354 | #ifdef COREB_L1_CODE_START |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 355 | if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 356 | return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA; |
| 357 | if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) |
| 358 | return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT; |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 359 | if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 360 | return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 361 | if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 362 | return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA; |
| 363 | #endif |
| 364 | if (in_mem_const(addr, size, L2_START, L2_LENGTH)) |
| 365 | return BFIN_MEM_ACCESS_CORE; |
| 366 | |
| 367 | if (addr >= SYSMMR_BASE) |
| 368 | return BFIN_MEM_ACCESS_CORE_ONLY; |
| 369 | |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 370 | switch (in_async(addr, size)) { |
| 371 | case 0: return -EFAULT; |
| 372 | case 1: return BFIN_MEM_ACCESS_CORE; |
| 373 | case 2: /* fall through */; |
| 374 | } |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 375 | |
| 376 | if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH)) |
| 377 | return BFIN_MEM_ACCESS_CORE; |
| 378 | if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH)) |
| 379 | return BFIN_MEM_ACCESS_DMA; |
| 380 | |
| 381 | return -EFAULT; |
| 382 | } |
| 383 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 384 | #if defined(CONFIG_ACCESS_CHECK) |
Mike Frysinger | a43b739 | 2009-06-04 19:24:31 +0000 | [diff] [blame] | 385 | #ifdef CONFIG_ACCESS_OK_L1 |
| 386 | __attribute__((l1_text)) |
| 387 | #endif |
Robin Getz | b03b08b | 2007-12-23 22:57:01 +0800 | [diff] [blame] | 388 | /* Return 1 if access to memory range is OK, 0 otherwise */ |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 389 | int _access_ok(unsigned long addr, unsigned long size) |
| 390 | { |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 391 | int aret; |
| 392 | |
Bernd Schmidt | bc41bb1 | 2007-10-10 17:54:19 +0800 | [diff] [blame] | 393 | if (size == 0) |
| 394 | return 1; |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 395 | /* Check that things do not wrap around */ |
| 396 | if (addr > ULONG_MAX - size) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 397 | return 0; |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame] | 398 | if (segment_eq(get_fs(), KERNEL_DS)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 399 | return 1; |
| 400 | #ifdef CONFIG_MTD_UCLINUX |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 401 | if (1) |
| 402 | #else |
| 403 | if (0) |
| 404 | #endif |
| 405 | { |
| 406 | if (in_mem(addr, size, memory_start, memory_end)) |
| 407 | return 1; |
| 408 | if (in_mem(addr, size, memory_mtd_end, physical_mem_end)) |
| 409 | return 1; |
| 410 | # ifndef CONFIG_ROMFS_ON_MTD |
| 411 | if (0) |
| 412 | # endif |
| 413 | /* For XIP, allow user space to use pointers within the ROMFS. */ |
| 414 | if (in_mem(addr, size, memory_mtd_start, memory_mtd_end)) |
| 415 | return 1; |
| 416 | } else { |
| 417 | if (in_mem(addr, size, memory_start, physical_mem_end)) |
| 418 | return 1; |
| 419 | } |
| 420 | |
| 421 | if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 422 | return 1; |
Bernd Schmidt | d5adb02 | 2008-04-24 03:06:15 +0800 | [diff] [blame] | 423 | |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 424 | if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH)) |
| 425 | return 1; |
| 426 | if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH)) |
| 427 | return 1; |
| 428 | if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH)) |
| 429 | return 1; |
| 430 | if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH)) |
| 431 | return 1; |
| 432 | #ifdef COREB_L1_CODE_START |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 433 | if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH)) |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 434 | return 1; |
| 435 | if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH)) |
| 436 | return 1; |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 437 | if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH)) |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 438 | return 1; |
Mike Frysinger | fb4b5d3 | 2009-06-29 14:20:10 -0400 | [diff] [blame] | 439 | if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH)) |
Bernd Schmidt | d5adb02 | 2008-04-24 03:06:15 +0800 | [diff] [blame] | 440 | return 1; |
| 441 | #endif |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 442 | |
Barry Song | 41c3e33 | 2010-06-29 08:43:38 +0000 | [diff] [blame] | 443 | #ifndef CONFIG_EXCEPTION_L1_SCRATCH |
| 444 | if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len)) |
| 445 | return 1; |
| 446 | #endif |
| 447 | |
Bernd Schmidt | 13048f8 | 2009-09-23 16:47:16 +0000 | [diff] [blame] | 448 | aret = in_async(addr, size); |
| 449 | if (aret < 2) |
| 450 | return aret; |
| 451 | |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 452 | if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 453 | return 1; |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 454 | |
| 455 | if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 456 | return 1; |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 457 | if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH)) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 458 | return 1; |
Mike Frysinger | e56e03b | 2009-06-07 16:31:52 -0400 | [diff] [blame] | 459 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 460 | return 0; |
| 461 | } |
| 462 | EXPORT_SYMBOL(_access_ok); |
| 463 | #endif /* CONFIG_ACCESS_CHECK */ |