David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 1 | #ifndef __ASM_BARRIER_H |
| 2 | #define __ASM_BARRIER_H |
| 3 | |
| 4 | #ifndef __ASSEMBLY__ |
R Sricharan | b7782d3 | 2012-03-30 14:27:43 +0530 | [diff] [blame] | 5 | #include <asm/outercache.h> |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 6 | |
| 7 | #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); |
| 8 | |
| 9 | #if __LINUX_ARM_ARCH__ >= 7 || \ |
| 10 | (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K)) |
| 11 | #define sev() __asm__ __volatile__ ("sev" : : : "memory") |
| 12 | #define wfe() __asm__ __volatile__ ("wfe" : : : "memory") |
| 13 | #define wfi() __asm__ __volatile__ ("wfi" : : : "memory") |
| 14 | #endif |
| 15 | |
| 16 | #if __LINUX_ARM_ARCH__ >= 7 |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 17 | #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory") |
| 18 | #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") |
| 19 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 20 | #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 21 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 22 | : : "r" (0) : "memory") |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 23 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 24 | : : "r" (0) : "memory") |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 25 | #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 26 | : : "r" (0) : "memory") |
| 27 | #elif defined(CONFIG_CPU_FA526) |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 28 | #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 29 | : : "r" (0) : "memory") |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 30 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 31 | : : "r" (0) : "memory") |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 32 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 33 | #else |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 34 | #define isb(x) __asm__ __volatile__ ("" : : : "memory") |
| 35 | #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 36 | : : "r" (0) : "memory") |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 37 | #define dmb(x) __asm__ __volatile__ ("" : : : "memory") |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 38 | #endif |
| 39 | |
| 40 | #ifdef CONFIG_ARCH_HAS_BARRIERS |
| 41 | #include <mach/barriers.h> |
| 42 | #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 43 | #define mb() do { dsb(); outer_sync(); } while (0) |
| 44 | #define rmb() dsb() |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 45 | #define wmb() do { dsb(st); outer_sync(); } while (0) |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 46 | #else |
Rob Herring | 48aa820f | 2012-08-21 12:26:24 +0200 | [diff] [blame] | 47 | #define mb() barrier() |
| 48 | #define rmb() barrier() |
| 49 | #define wmb() barrier() |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 50 | #endif |
| 51 | |
| 52 | #ifndef CONFIG_SMP |
| 53 | #define smp_mb() barrier() |
| 54 | #define smp_rmb() barrier() |
| 55 | #define smp_wmb() barrier() |
| 56 | #else |
Will Deacon | 3ea1280 | 2013-05-10 18:07:19 +0100 | [diff] [blame] | 57 | #define smp_mb() dmb(ish) |
| 58 | #define smp_rmb() smp_mb() |
| 59 | #define smp_wmb() dmb(ishst) |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 60 | #endif |
| 61 | |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 62 | #define smp_store_release(p, v) \ |
| 63 | do { \ |
| 64 | compiletime_assert_atomic_type(*p); \ |
| 65 | smp_mb(); \ |
| 66 | ACCESS_ONCE(*p) = (v); \ |
| 67 | } while (0) |
| 68 | |
| 69 | #define smp_load_acquire(p) \ |
| 70 | ({ \ |
| 71 | typeof(*p) ___p1 = ACCESS_ONCE(*p); \ |
| 72 | compiletime_assert_atomic_type(*p); \ |
| 73 | smp_mb(); \ |
| 74 | ___p1; \ |
| 75 | }) |
| 76 | |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 77 | #define read_barrier_depends() do { } while(0) |
| 78 | #define smp_read_barrier_depends() do { } while(0) |
| 79 | |
| 80 | #define set_mb(var, value) do { var = value; smp_mb(); } while (0) |
| 81 | |
| 82 | #endif /* !__ASSEMBLY__ */ |
| 83 | #endif /* __ASM_BARRIER_H */ |