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David Howells9f97da72012-03-28 18:30:01 +01001#ifndef __ASM_BARRIER_H
2#define __ASM_BARRIER_H
3
4#ifndef __ASSEMBLY__
R Sricharanb7782d32012-03-30 14:27:43 +05305#include <asm/outercache.h>
David Howells9f97da72012-03-28 18:30:01 +01006
7#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
8
9#if __LINUX_ARM_ARCH__ >= 7 || \
10 (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K))
11#define sev() __asm__ __volatile__ ("sev" : : : "memory")
12#define wfe() __asm__ __volatile__ ("wfe" : : : "memory")
13#define wfi() __asm__ __volatile__ ("wfi" : : : "memory")
14#endif
15
16#if __LINUX_ARM_ARCH__ >= 7
Will Deacon3ea12802013-05-10 18:07:19 +010017#define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory")
18#define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory")
19#define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory")
David Howells9f97da72012-03-28 18:30:01 +010020#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
Will Deacon3ea12802013-05-10 18:07:19 +010021#define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
David Howells9f97da72012-03-28 18:30:01 +010022 : : "r" (0) : "memory")
Will Deacon3ea12802013-05-10 18:07:19 +010023#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
David Howells9f97da72012-03-28 18:30:01 +010024 : : "r" (0) : "memory")
Will Deacon3ea12802013-05-10 18:07:19 +010025#define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
David Howells9f97da72012-03-28 18:30:01 +010026 : : "r" (0) : "memory")
27#elif defined(CONFIG_CPU_FA526)
Will Deacon3ea12802013-05-10 18:07:19 +010028#define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
David Howells9f97da72012-03-28 18:30:01 +010029 : : "r" (0) : "memory")
Will Deacon3ea12802013-05-10 18:07:19 +010030#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
David Howells9f97da72012-03-28 18:30:01 +010031 : : "r" (0) : "memory")
Will Deacon3ea12802013-05-10 18:07:19 +010032#define dmb(x) __asm__ __volatile__ ("" : : : "memory")
David Howells9f97da72012-03-28 18:30:01 +010033#else
Will Deacon3ea12802013-05-10 18:07:19 +010034#define isb(x) __asm__ __volatile__ ("" : : : "memory")
35#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
David Howells9f97da72012-03-28 18:30:01 +010036 : : "r" (0) : "memory")
Will Deacon3ea12802013-05-10 18:07:19 +010037#define dmb(x) __asm__ __volatile__ ("" : : : "memory")
David Howells9f97da72012-03-28 18:30:01 +010038#endif
39
40#ifdef CONFIG_ARCH_HAS_BARRIERS
41#include <mach/barriers.h>
42#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
David Howells9f97da72012-03-28 18:30:01 +010043#define mb() do { dsb(); outer_sync(); } while (0)
44#define rmb() dsb()
Will Deacon3ea12802013-05-10 18:07:19 +010045#define wmb() do { dsb(st); outer_sync(); } while (0)
David Howells9f97da72012-03-28 18:30:01 +010046#else
Rob Herring48aa820f2012-08-21 12:26:24 +020047#define mb() barrier()
48#define rmb() barrier()
49#define wmb() barrier()
David Howells9f97da72012-03-28 18:30:01 +010050#endif
51
52#ifndef CONFIG_SMP
53#define smp_mb() barrier()
54#define smp_rmb() barrier()
55#define smp_wmb() barrier()
56#else
Will Deacon3ea12802013-05-10 18:07:19 +010057#define smp_mb() dmb(ish)
58#define smp_rmb() smp_mb()
59#define smp_wmb() dmb(ishst)
David Howells9f97da72012-03-28 18:30:01 +010060#endif
61
Peter Zijlstra47933ad2013-11-06 14:57:36 +010062#define smp_store_release(p, v) \
63do { \
64 compiletime_assert_atomic_type(*p); \
65 smp_mb(); \
66 ACCESS_ONCE(*p) = (v); \
67} while (0)
68
69#define smp_load_acquire(p) \
70({ \
71 typeof(*p) ___p1 = ACCESS_ONCE(*p); \
72 compiletime_assert_atomic_type(*p); \
73 smp_mb(); \
74 ___p1; \
75})
76
David Howells9f97da72012-03-28 18:30:01 +010077#define read_barrier_depends() do { } while(0)
78#define smp_read_barrier_depends() do { } while(0)
79
80#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
81
82#endif /* !__ASSEMBLY__ */
83#endif /* __ASM_BARRIER_H */