Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/mach-bf527/boards/ezbrd.c |
| 3 | * Based on: arch/blackfin/mach-bf537/boards/stamp.c |
| 4 | * Author: Aidan Williams <aidan@nicta.com.au> |
| 5 | * |
| 6 | * Created: |
| 7 | * Description: |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2005 National ICT Australia (NICTA) |
| 11 | * Copyright 2004-2008 Analog Devices Inc. |
| 12 | * |
| 13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, see the file COPYING, or write |
| 27 | * to the Free Software Foundation, Inc., |
| 28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 29 | */ |
| 30 | |
| 31 | #include <linux/device.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | #include <linux/mtd/mtd.h> |
| 34 | #include <linux/mtd/partitions.h> |
| 35 | #include <linux/mtd/physmap.h> |
| 36 | #include <linux/spi/spi.h> |
| 37 | #include <linux/spi/flash.h> |
| 38 | |
| 39 | #include <linux/i2c.h> |
| 40 | #include <linux/irq.h> |
| 41 | #include <linux/interrupt.h> |
| 42 | #include <linux/usb/musb.h> |
| 43 | #include <asm/dma.h> |
| 44 | #include <asm/bfin5xx_spi.h> |
| 45 | #include <asm/reboot.h> |
| 46 | #include <asm/nand.h> |
| 47 | #include <asm/portmux.h> |
| 48 | #include <asm/dpmc.h> |
| 49 | #include <linux/spi/ad7877.h> |
| 50 | |
| 51 | /* |
| 52 | * Name the Board for the /proc/cpuinfo |
| 53 | */ |
Mike Frysinger | fe85cad | 2008-11-18 17:48:22 +0800 | [diff] [blame] | 54 | const char bfin_board_name[] = "ADI BF526-EZBRD"; |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 55 | |
| 56 | /* |
| 57 | * Driver needs to know address, irq and flag pin. |
| 58 | */ |
| 59 | |
| 60 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
| 61 | static struct resource musb_resources[] = { |
| 62 | [0] = { |
| 63 | .start = 0xffc03800, |
| 64 | .end = 0xffc03cff, |
| 65 | .flags = IORESOURCE_MEM, |
| 66 | }, |
| 67 | [1] = { /* general IRQ */ |
| 68 | .start = IRQ_USB_INT0, |
| 69 | .end = IRQ_USB_INT0, |
| 70 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 71 | }, |
| 72 | [2] = { /* DMA IRQ */ |
| 73 | .start = IRQ_USB_DMA, |
| 74 | .end = IRQ_USB_DMA, |
| 75 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 76 | }, |
| 77 | }; |
| 78 | |
| 79 | static struct musb_hdrc_config musb_config = { |
| 80 | .multipoint = 0, |
| 81 | .dyn_fifo = 0, |
| 82 | .soft_con = 1, |
| 83 | .dma = 1, |
Bryan Wu | fea05da | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 84 | .num_eps = 8, |
| 85 | .dma_channels = 8, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 86 | .gpio_vrsel = GPIO_PG13, |
| 87 | }; |
| 88 | |
| 89 | static struct musb_hdrc_platform_data musb_plat = { |
| 90 | #if defined(CONFIG_USB_MUSB_OTG) |
| 91 | .mode = MUSB_OTG, |
| 92 | #elif defined(CONFIG_USB_MUSB_HDRC_HCD) |
| 93 | .mode = MUSB_HOST, |
| 94 | #elif defined(CONFIG_USB_GADGET_MUSB_HDRC) |
| 95 | .mode = MUSB_PERIPHERAL, |
| 96 | #endif |
| 97 | .config = &musb_config, |
| 98 | }; |
| 99 | |
| 100 | static u64 musb_dmamask = ~(u32)0; |
| 101 | |
| 102 | static struct platform_device musb_device = { |
| 103 | .name = "musb_hdrc", |
| 104 | .id = 0, |
| 105 | .dev = { |
| 106 | .dma_mask = &musb_dmamask, |
| 107 | .coherent_dma_mask = 0xffffffff, |
| 108 | .platform_data = &musb_plat, |
| 109 | }, |
| 110 | .num_resources = ARRAY_SIZE(musb_resources), |
| 111 | .resource = musb_resources, |
| 112 | }; |
| 113 | #endif |
| 114 | |
| 115 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
| 116 | static struct mtd_partition ezbrd_partitions[] = { |
| 117 | { |
| 118 | .name = "bootloader(nor)", |
| 119 | .size = 0x40000, |
| 120 | .offset = 0, |
| 121 | }, { |
| 122 | .name = "linux kernel(nor)", |
| 123 | .size = 0x1C0000, |
| 124 | .offset = MTDPART_OFS_APPEND, |
| 125 | }, { |
| 126 | .name = "file system(nor)", |
| 127 | .size = MTDPART_SIZ_FULL, |
| 128 | .offset = MTDPART_OFS_APPEND, |
| 129 | } |
| 130 | }; |
| 131 | |
| 132 | static struct physmap_flash_data ezbrd_flash_data = { |
| 133 | .width = 2, |
| 134 | .parts = ezbrd_partitions, |
| 135 | .nr_parts = ARRAY_SIZE(ezbrd_partitions), |
| 136 | }; |
| 137 | |
| 138 | static struct resource ezbrd_flash_resource = { |
| 139 | .start = 0x20000000, |
| 140 | .end = 0x203fffff, |
| 141 | .flags = IORESOURCE_MEM, |
| 142 | }; |
| 143 | |
| 144 | static struct platform_device ezbrd_flash_device = { |
| 145 | .name = "physmap-flash", |
| 146 | .id = 0, |
| 147 | .dev = { |
| 148 | .platform_data = &ezbrd_flash_data, |
| 149 | }, |
| 150 | .num_resources = 1, |
| 151 | .resource = &ezbrd_flash_resource, |
| 152 | }; |
| 153 | #endif |
| 154 | |
| 155 | #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) |
| 156 | static struct mtd_partition partition_info[] = { |
| 157 | { |
| 158 | .name = "linux kernel(nand)", |
| 159 | .offset = 0, |
| 160 | .size = 4 * 1024 * 1024, |
| 161 | }, |
| 162 | { |
| 163 | .name = "file system(nand)", |
| 164 | .offset = MTDPART_OFS_APPEND, |
| 165 | .size = MTDPART_SIZ_FULL, |
| 166 | }, |
| 167 | }; |
| 168 | |
| 169 | static struct bf5xx_nand_platform bf5xx_nand_platform = { |
| 170 | .page_size = NFC_PG_SIZE_256, |
| 171 | .data_width = NFC_NWIDTH_8, |
| 172 | .partitions = partition_info, |
| 173 | .nr_partitions = ARRAY_SIZE(partition_info), |
| 174 | .rd_dly = 3, |
| 175 | .wr_dly = 3, |
| 176 | }; |
| 177 | |
| 178 | static struct resource bf5xx_nand_resources[] = { |
| 179 | { |
| 180 | .start = NFC_CTL, |
| 181 | .end = NFC_DATA_RD + 2, |
| 182 | .flags = IORESOURCE_MEM, |
| 183 | }, |
| 184 | { |
| 185 | .start = CH_NFC, |
| 186 | .end = CH_NFC, |
| 187 | .flags = IORESOURCE_IRQ, |
| 188 | }, |
| 189 | }; |
| 190 | |
| 191 | static struct platform_device bf5xx_nand_device = { |
| 192 | .name = "bf5xx-nand", |
| 193 | .id = 0, |
| 194 | .num_resources = ARRAY_SIZE(bf5xx_nand_resources), |
| 195 | .resource = bf5xx_nand_resources, |
| 196 | .dev = { |
| 197 | .platform_data = &bf5xx_nand_platform, |
| 198 | }, |
| 199 | }; |
| 200 | #endif |
| 201 | |
| 202 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 203 | static struct platform_device rtc_device = { |
| 204 | .name = "rtc-bfin", |
| 205 | .id = -1, |
| 206 | }; |
| 207 | #endif |
| 208 | |
| 209 | |
| 210 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
Graf Yang | 6531962 | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 211 | static struct platform_device bfin_mii_bus = { |
| 212 | .name = "bfin_mii_bus", |
| 213 | }; |
| 214 | |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 215 | static struct platform_device bfin_mac_device = { |
| 216 | .name = "bfin_mac", |
Graf Yang | 6531962 | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 217 | .dev.platform_data = &bfin_mii_bus, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 218 | }; |
| 219 | #endif |
| 220 | |
| 221 | #if defined(CONFIG_MTD_M25P80) \ |
| 222 | || defined(CONFIG_MTD_M25P80_MODULE) |
| 223 | static struct mtd_partition bfin_spi_flash_partitions[] = { |
| 224 | { |
| 225 | .name = "bootloader(spi)", |
| 226 | .size = 0x00040000, |
| 227 | .offset = 0, |
| 228 | .mask_flags = MTD_CAP_ROM |
| 229 | }, { |
| 230 | .name = "linux kernel(spi)", |
| 231 | .size = MTDPART_SIZ_FULL, |
| 232 | .offset = MTDPART_OFS_APPEND, |
| 233 | } |
| 234 | }; |
| 235 | |
| 236 | static struct flash_platform_data bfin_spi_flash_data = { |
| 237 | .name = "m25p80", |
| 238 | .parts = bfin_spi_flash_partitions, |
| 239 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
Graf Yang | dc2c46b | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 240 | .type = "sst25wf040", |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 241 | }; |
| 242 | |
Graf Yang | dc2c46b | 2009-06-15 08:23:41 +0000 | [diff] [blame] | 243 | /* SPI flash chip (sst25wf040) */ |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 244 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| 245 | .enable_dma = 0, /* use dma transfer with this chip*/ |
| 246 | .bits_per_word = 8, |
| 247 | }; |
| 248 | #endif |
| 249 | |
Mike Frysinger | a261eec | 2009-05-20 14:05:36 +0000 | [diff] [blame] | 250 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 251 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 252 | /* SPI ADC chip */ |
| 253 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 254 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| 255 | .bits_per_word = 16, |
| 256 | }; |
| 257 | #endif |
| 258 | |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 259 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
| 260 | static struct bfin5xx_spi_chip mmc_spi_chip_info = { |
| 261 | .enable_dma = 0, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 262 | .bits_per_word = 8, |
| 263 | }; |
| 264 | #endif |
| 265 | |
| 266 | #if defined(CONFIG_PBX) |
| 267 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { |
| 268 | .ctl_reg = 0x4, /* send zero */ |
| 269 | .enable_dma = 0, |
| 270 | .bits_per_word = 8, |
| 271 | .cs_change_per_word = 1, |
| 272 | }; |
| 273 | #endif |
| 274 | |
| 275 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
| 276 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { |
| 277 | .enable_dma = 0, |
| 278 | .bits_per_word = 16, |
| 279 | }; |
| 280 | |
| 281 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { |
| 282 | .model = 7877, |
| 283 | .vref_delay_usecs = 50, /* internal, no capacitor */ |
| 284 | .x_plate_ohms = 419, |
| 285 | .y_plate_ohms = 486, |
| 286 | .pressure_max = 1000, |
| 287 | .pressure_min = 0, |
| 288 | .stopacq_polarity = 1, |
| 289 | .first_conversion_delay = 3, |
| 290 | .acquisition_time = 1, |
| 291 | .averaging = 1, |
| 292 | .pen_down_acc_interval = 1, |
| 293 | }; |
| 294 | #endif |
| 295 | |
Michael Hennerich | 5105432 | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 296 | #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE) |
| 297 | #include <linux/spi/ad7879.h> |
| 298 | static const struct ad7879_platform_data bfin_ad7879_ts_info = { |
| 299 | .model = 7879, /* Model = AD7879 */ |
| 300 | .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ |
| 301 | .pressure_max = 10000, |
| 302 | .pressure_min = 0, |
| 303 | .first_conversion_delay = 3, /* wait 512us before do a first conversion */ |
| 304 | .acquisition_time = 1, /* 4us acquisition time per sample */ |
| 305 | .median = 2, /* do 8 measurements */ |
| 306 | .averaging = 1, /* take the average of 4 middle samples */ |
| 307 | .pen_down_acc_interval = 255, /* 9.4 ms */ |
| 308 | .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */ |
| 309 | .gpio_default = 1, /* During initialization set GPIO = HIGH */ |
| 310 | }; |
| 311 | #endif |
| 312 | |
| 313 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
| 314 | static struct bfin5xx_spi_chip spi_ad7879_chip_info = { |
| 315 | .enable_dma = 0, |
| 316 | .bits_per_word = 16, |
| 317 | }; |
| 318 | #endif |
| 319 | |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 320 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ |
| 321 | && defined(CONFIG_SND_SOC_WM8731_SPI) |
| 322 | static struct bfin5xx_spi_chip spi_wm8731_chip_info = { |
| 323 | .enable_dma = 0, |
| 324 | .bits_per_word = 16, |
| 325 | }; |
| 326 | #endif |
| 327 | |
| 328 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| 329 | static struct bfin5xx_spi_chip spidev_chip_info = { |
| 330 | .enable_dma = 0, |
| 331 | .bits_per_word = 8, |
| 332 | }; |
| 333 | #endif |
| 334 | |
| 335 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 336 | static struct bfin5xx_spi_chip lq035q1_spi_chip_info = { |
| 337 | .enable_dma = 0, |
| 338 | .bits_per_word = 8, |
| 339 | }; |
| 340 | #endif |
| 341 | |
| 342 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| 343 | #if defined(CONFIG_MTD_M25P80) \ |
| 344 | || defined(CONFIG_MTD_M25P80_MODULE) |
| 345 | { |
| 346 | /* the modalias must be the same as spi device driver name */ |
| 347 | .modalias = "m25p80", /* Name of spi_driver for this device */ |
| 348 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 349 | .bus_num = 0, /* Framework bus number */ |
| 350 | .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
| 351 | .platform_data = &bfin_spi_flash_data, |
| 352 | .controller_data = &spi_flash_chip_info, |
| 353 | .mode = SPI_MODE_3, |
| 354 | }, |
| 355 | #endif |
| 356 | |
Mike Frysinger | a261eec | 2009-05-20 14:05:36 +0000 | [diff] [blame] | 357 | #if defined(CONFIG_BFIN_SPI_ADC) \ |
| 358 | || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 359 | { |
| 360 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 361 | .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| 362 | .bus_num = 0, /* Framework bus number */ |
| 363 | .chip_select = 1, /* Framework chip select. */ |
| 364 | .platform_data = NULL, /* No spi_driver specific config */ |
| 365 | .controller_data = &spi_adc_chip_info, |
| 366 | }, |
| 367 | #endif |
| 368 | |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 369 | #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 370 | { |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 371 | .modalias = "mmc_spi", |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 372 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| 373 | .bus_num = 0, |
Michael Hennerich | f3f704d | 2009-03-06 00:27:57 +0800 | [diff] [blame] | 374 | .chip_select = 5, |
| 375 | .controller_data = &mmc_spi_chip_info, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 376 | .mode = SPI_MODE_3, |
| 377 | }, |
| 378 | #endif |
| 379 | #if defined(CONFIG_PBX) |
| 380 | { |
| 381 | .modalias = "fxs-spi", |
| 382 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
| 383 | .bus_num = 0, |
| 384 | .chip_select = 8 - CONFIG_J11_JUMPER, |
| 385 | .controller_data = &spi_si3xxx_chip_info, |
| 386 | .mode = SPI_MODE_3, |
| 387 | }, |
| 388 | { |
| 389 | .modalias = "fxo-spi", |
| 390 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
| 391 | .bus_num = 0, |
| 392 | .chip_select = 8 - CONFIG_J19_JUMPER, |
| 393 | .controller_data = &spi_si3xxx_chip_info, |
| 394 | .mode = SPI_MODE_3, |
| 395 | }, |
| 396 | #endif |
| 397 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
| 398 | { |
| 399 | .modalias = "ad7877", |
| 400 | .platform_data = &bfin_ad7877_ts_info, |
| 401 | .irq = IRQ_PF8, |
| 402 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ |
| 403 | .bus_num = 0, |
| 404 | .chip_select = 2, |
| 405 | .controller_data = &spi_ad7877_chip_info, |
| 406 | }, |
| 407 | #endif |
Michael Hennerich | 5105432 | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 408 | #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE) |
| 409 | { |
| 410 | .modalias = "ad7879", |
| 411 | .platform_data = &bfin_ad7879_ts_info, |
| 412 | .irq = IRQ_PG0, |
| 413 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ |
| 414 | .bus_num = 0, |
| 415 | .chip_select = 5, |
| 416 | .controller_data = &spi_ad7879_chip_info, |
| 417 | .mode = SPI_CPHA | SPI_CPOL, |
| 418 | }, |
| 419 | #endif |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 420 | #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \ |
| 421 | && defined(CONFIG_SND_SOC_WM8731_SPI) |
| 422 | { |
| 423 | .modalias = "wm8731", |
| 424 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| 425 | .bus_num = 0, |
| 426 | .chip_select = 5, |
| 427 | .controller_data = &spi_wm8731_chip_info, |
| 428 | .mode = SPI_MODE_0, |
| 429 | }, |
| 430 | #endif |
| 431 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
| 432 | { |
| 433 | .modalias = "spidev", |
| 434 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| 435 | .bus_num = 0, |
| 436 | .chip_select = 1, |
| 437 | .controller_data = &spidev_chip_info, |
| 438 | }, |
| 439 | #endif |
| 440 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 441 | { |
| 442 | .modalias = "bfin-lq035q1-spi", |
| 443 | .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ |
| 444 | .bus_num = 0, |
| 445 | .chip_select = 1, |
| 446 | .controller_data = &lq035q1_spi_chip_info, |
| 447 | .mode = SPI_CPHA | SPI_CPOL, |
| 448 | }, |
| 449 | #endif |
| 450 | }; |
| 451 | |
| 452 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 453 | /* SPI controller data */ |
| 454 | static struct bfin5xx_spi_master bfin_spi0_info = { |
| 455 | .num_chipselect = 8, |
| 456 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
| 457 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
| 458 | }; |
| 459 | |
| 460 | /* SPI (0) */ |
| 461 | static struct resource bfin_spi0_resource[] = { |
| 462 | [0] = { |
| 463 | .start = SPI0_REGBASE, |
| 464 | .end = SPI0_REGBASE + 0xFF, |
| 465 | .flags = IORESOURCE_MEM, |
| 466 | }, |
| 467 | [1] = { |
| 468 | .start = CH_SPI, |
| 469 | .end = CH_SPI, |
Yi Li | 5312269 | 2009-06-05 12:11:11 +0000 | [diff] [blame] | 470 | .flags = IORESOURCE_DMA, |
| 471 | }, |
| 472 | [2] = { |
| 473 | .start = IRQ_SPI, |
| 474 | .end = IRQ_SPI, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 475 | .flags = IORESOURCE_IRQ, |
| 476 | }, |
| 477 | }; |
| 478 | |
| 479 | static struct platform_device bfin_spi0_device = { |
| 480 | .name = "bfin-spi", |
| 481 | .id = 0, /* Bus number */ |
| 482 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| 483 | .resource = bfin_spi0_resource, |
| 484 | .dev = { |
| 485 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
| 486 | }, |
| 487 | }; |
| 488 | #endif /* spi master and devices */ |
| 489 | |
| 490 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 491 | static struct resource bfin_uart_resources[] = { |
| 492 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 493 | { |
| 494 | .start = 0xFFC00400, |
| 495 | .end = 0xFFC004FF, |
| 496 | .flags = IORESOURCE_MEM, |
| 497 | }, |
| 498 | #endif |
| 499 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 500 | { |
| 501 | .start = 0xFFC02000, |
| 502 | .end = 0xFFC020FF, |
| 503 | .flags = IORESOURCE_MEM, |
| 504 | }, |
| 505 | #endif |
| 506 | }; |
| 507 | |
| 508 | static struct platform_device bfin_uart_device = { |
| 509 | .name = "bfin-uart", |
| 510 | .id = 1, |
| 511 | .num_resources = ARRAY_SIZE(bfin_uart_resources), |
| 512 | .resource = bfin_uart_resources, |
| 513 | }; |
| 514 | #endif |
| 515 | |
| 516 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 517 | #ifdef CONFIG_BFIN_SIR0 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 518 | static struct resource bfin_sir0_resources[] = { |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 519 | { |
| 520 | .start = 0xFFC00400, |
| 521 | .end = 0xFFC004FF, |
| 522 | .flags = IORESOURCE_MEM, |
| 523 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 524 | { |
| 525 | .start = IRQ_UART0_RX, |
| 526 | .end = IRQ_UART0_RX+1, |
| 527 | .flags = IORESOURCE_IRQ, |
| 528 | }, |
| 529 | { |
| 530 | .start = CH_UART0_RX, |
| 531 | .end = CH_UART0_RX+1, |
| 532 | .flags = IORESOURCE_DMA, |
| 533 | }, |
| 534 | }; |
| 535 | |
| 536 | static struct platform_device bfin_sir0_device = { |
| 537 | .name = "bfin_sir", |
| 538 | .id = 0, |
| 539 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| 540 | .resource = bfin_sir0_resources, |
| 541 | }; |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 542 | #endif |
| 543 | #ifdef CONFIG_BFIN_SIR1 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 544 | static struct resource bfin_sir1_resources[] = { |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 545 | { |
| 546 | .start = 0xFFC02000, |
| 547 | .end = 0xFFC020FF, |
| 548 | .flags = IORESOURCE_MEM, |
| 549 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 550 | { |
| 551 | .start = IRQ_UART1_RX, |
| 552 | .end = IRQ_UART1_RX+1, |
| 553 | .flags = IORESOURCE_IRQ, |
| 554 | }, |
| 555 | { |
| 556 | .start = CH_UART1_RX, |
| 557 | .end = CH_UART1_RX+1, |
| 558 | .flags = IORESOURCE_DMA, |
| 559 | }, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 560 | }; |
| 561 | |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 562 | static struct platform_device bfin_sir1_device = { |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 563 | .name = "bfin_sir", |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 564 | .id = 1, |
| 565 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), |
| 566 | .resource = bfin_sir1_resources, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 567 | }; |
| 568 | #endif |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 569 | #endif |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 570 | |
| 571 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| 572 | static struct resource bfin_twi0_resource[] = { |
| 573 | [0] = { |
| 574 | .start = TWI0_REGBASE, |
| 575 | .end = TWI0_REGBASE, |
| 576 | .flags = IORESOURCE_MEM, |
| 577 | }, |
| 578 | [1] = { |
| 579 | .start = IRQ_TWI, |
| 580 | .end = IRQ_TWI, |
| 581 | .flags = IORESOURCE_IRQ, |
| 582 | }, |
| 583 | }; |
| 584 | |
| 585 | static struct platform_device i2c_bfin_twi_device = { |
| 586 | .name = "i2c-bfin-twi", |
| 587 | .id = 0, |
| 588 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), |
| 589 | .resource = bfin_twi0_resource, |
| 590 | }; |
| 591 | #endif |
| 592 | |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 593 | static struct i2c_board_info __initdata bfin_i2c_board_info[] = { |
Michael Hennerich | ebd5833 | 2009-07-02 11:00:38 +0000 | [diff] [blame] | 594 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE) |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 595 | { |
| 596 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), |
| 597 | }, |
| 598 | #endif |
| 599 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) |
| 600 | { |
| 601 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), |
| 602 | .irq = IRQ_PF8, |
| 603 | }, |
| 604 | #endif |
| 605 | }; |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 606 | |
| 607 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| 608 | static struct platform_device bfin_sport0_uart_device = { |
| 609 | .name = "bfin-sport-uart", |
| 610 | .id = 0, |
| 611 | }; |
| 612 | |
| 613 | static struct platform_device bfin_sport1_uart_device = { |
| 614 | .name = "bfin-sport-uart", |
| 615 | .id = 1, |
| 616 | }; |
| 617 | #endif |
| 618 | |
| 619 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| 620 | #include <linux/input.h> |
| 621 | #include <linux/gpio_keys.h> |
| 622 | |
| 623 | static struct gpio_keys_button bfin_gpio_keys_table[] = { |
| 624 | {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"}, |
| 625 | {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"}, |
| 626 | }; |
| 627 | |
| 628 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { |
| 629 | .buttons = bfin_gpio_keys_table, |
| 630 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), |
| 631 | }; |
| 632 | |
| 633 | static struct platform_device bfin_device_gpiokeys = { |
| 634 | .name = "gpio-keys", |
| 635 | .dev = { |
| 636 | .platform_data = &bfin_gpio_keys_data, |
| 637 | }, |
| 638 | }; |
| 639 | #endif |
| 640 | |
| 641 | static struct resource bfin_gpios_resources = { |
| 642 | .start = 0, |
| 643 | .end = MAX_BLACKFIN_GPIOS - 1, |
| 644 | .flags = IORESOURCE_IRQ, |
| 645 | }; |
| 646 | |
| 647 | static struct platform_device bfin_gpios_device = { |
| 648 | .name = "simple-gpio", |
| 649 | .id = -1, |
| 650 | .num_resources = 1, |
| 651 | .resource = &bfin_gpios_resources, |
| 652 | }; |
| 653 | |
| 654 | static const unsigned int cclk_vlev_datasheet[] = |
| 655 | { |
| 656 | VRPAIR(VLEV_100, 400000000), |
| 657 | VRPAIR(VLEV_105, 426000000), |
| 658 | VRPAIR(VLEV_110, 500000000), |
| 659 | VRPAIR(VLEV_115, 533000000), |
| 660 | VRPAIR(VLEV_120, 600000000), |
| 661 | }; |
| 662 | |
| 663 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { |
| 664 | .tuple_tab = cclk_vlev_datasheet, |
| 665 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), |
| 666 | .vr_settling_time = 25 /* us */, |
| 667 | }; |
| 668 | |
| 669 | static struct platform_device bfin_dpmc = { |
| 670 | .name = "bfin dpmc", |
| 671 | .dev = { |
| 672 | .platform_data = &bfin_dmpc_vreg_data, |
| 673 | }, |
| 674 | }; |
| 675 | |
| 676 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 677 | #include <asm/bfin-lq035q1.h> |
| 678 | |
| 679 | static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { |
| 680 | .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, |
| 681 | .use_bl = 1, |
| 682 | .gpio_bl = GPIO_PG12, |
| 683 | }; |
| 684 | |
| 685 | static struct resource bfin_lq035q1_resources[] = { |
| 686 | { |
| 687 | .start = IRQ_PPI_ERROR, |
| 688 | .end = IRQ_PPI_ERROR, |
| 689 | .flags = IORESOURCE_IRQ, |
| 690 | }, |
| 691 | }; |
| 692 | |
| 693 | static struct platform_device bfin_lq035q1_device = { |
| 694 | .name = "bfin-lq035q1", |
| 695 | .id = -1, |
| 696 | .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), |
| 697 | .resource = bfin_lq035q1_resources, |
| 698 | .dev = { |
| 699 | .platform_data = &bfin_lq035q1_data, |
| 700 | }, |
| 701 | }; |
| 702 | #endif |
| 703 | |
| 704 | static struct platform_device *stamp_devices[] __initdata = { |
| 705 | |
| 706 | &bfin_dpmc, |
| 707 | |
| 708 | #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) |
| 709 | &bf5xx_nand_device, |
| 710 | #endif |
| 711 | |
| 712 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 713 | &rtc_device, |
| 714 | #endif |
| 715 | |
| 716 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
| 717 | &musb_device, |
| 718 | #endif |
| 719 | |
| 720 | #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) |
Graf Yang | 6531962 | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 721 | &bfin_mii_bus, |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 722 | &bfin_mac_device, |
| 723 | #endif |
| 724 | |
| 725 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 726 | &bfin_spi0_device, |
| 727 | #endif |
| 728 | |
| 729 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 730 | &bfin_uart_device, |
| 731 | #endif |
| 732 | |
| 733 | #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) |
| 734 | &bfin_lq035q1_device, |
| 735 | #endif |
| 736 | |
| 737 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 738 | #ifdef CONFIG_BFIN_SIR0 |
| 739 | &bfin_sir0_device, |
| 740 | #endif |
| 741 | #ifdef CONFIG_BFIN_SIR1 |
| 742 | &bfin_sir1_device, |
| 743 | #endif |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 744 | #endif |
| 745 | |
| 746 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
| 747 | &i2c_bfin_twi_device, |
| 748 | #endif |
| 749 | |
| 750 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) |
| 751 | &bfin_sport0_uart_device, |
| 752 | &bfin_sport1_uart_device, |
| 753 | #endif |
| 754 | |
| 755 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
| 756 | &bfin_device_gpiokeys, |
| 757 | #endif |
| 758 | |
| 759 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
| 760 | &ezbrd_flash_device, |
| 761 | #endif |
| 762 | |
| 763 | &bfin_gpios_device, |
| 764 | }; |
| 765 | |
Mike Frysinger | 7f6678c | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 766 | static int __init ezbrd_init(void) |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 767 | { |
| 768 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 769 | i2c_register_board_info(0, bfin_i2c_board_info, |
| 770 | ARRAY_SIZE(bfin_i2c_board_info)); |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 771 | platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); |
| 772 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 773 | return 0; |
| 774 | } |
| 775 | |
Mike Frysinger | 7f6678c | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 776 | arch_initcall(ezbrd_init); |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 777 | |
| 778 | void native_machine_restart(char *cmd) |
| 779 | { |
| 780 | /* workaround reboot hang when booting from SPI */ |
| 781 | if ((bfin_read_SYSCR() & 0x7) == 0x3) |
Sonic Zhang | b52dae3 | 2009-02-04 16:49:45 +0800 | [diff] [blame] | 782 | bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS); |
Michael Hennerich | 8cc7117 | 2008-10-13 14:45:06 +0800 | [diff] [blame] | 783 | } |
| 784 | |
| 785 | void bfin_get_ether_addr(char *addr) |
| 786 | { |
| 787 | /* the MAC is stored in OTP memory page 0xDF */ |
| 788 | u32 ret; |
| 789 | u64 otp_mac; |
| 790 | u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A; |
| 791 | |
| 792 | ret = otp_read(0xDF, 0x00, &otp_mac); |
| 793 | if (!(ret & 0x1)) { |
| 794 | char *otp_mac_p = (char *)&otp_mac; |
| 795 | for (ret = 0; ret < 6; ++ret) |
| 796 | addr[ret] = otp_mac_p[5 - ret]; |
| 797 | } |
| 798 | } |
| 799 | EXPORT_SYMBOL(bfin_get_ether_addr); |