venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Handle caching attributes in page tables (PAT) |
| 3 | * |
| 4 | * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
| 5 | * Suresh B Siddha <suresh.b.siddha@intel.com> |
| 6 | * |
| 7 | * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen. |
| 8 | */ |
| 9 | |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 10 | #include <linux/seq_file.h> |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 11 | #include <linux/bootmem.h> |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 12 | #include <linux/debugfs.h> |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 13 | #include <linux/kernel.h> |
Ingo Molnar | 92b9af9 | 2009-02-28 14:09:27 +0100 | [diff] [blame] | 14 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 15 | #include <linux/slab.h> |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 16 | #include <linux/mm.h> |
| 17 | #include <linux/fs.h> |
Venkatesh Pallipadi | 335ef89 | 2009-07-10 09:57:36 -0700 | [diff] [blame] | 18 | #include <linux/rbtree.h> |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 19 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 20 | #include <asm/cacheflush.h> |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 21 | #include <asm/processor.h> |
| 22 | #include <asm/tlbflush.h> |
Jack Steiner | fd12a0d | 2009-11-19 14:23:41 -0600 | [diff] [blame] | 23 | #include <asm/x86_init.h> |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 24 | #include <asm/pgtable.h> |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 25 | #include <asm/fcntl.h> |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 26 | #include <asm/e820.h> |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 27 | #include <asm/mtrr.h> |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 28 | #include <asm/page.h> |
| 29 | #include <asm/msr.h> |
| 30 | #include <asm/pat.h> |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 31 | #include <asm/io.h> |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 32 | |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 33 | #include "pat_internal.h" |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 34 | #include "mm_internal.h" |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 35 | |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 36 | #undef pr_fmt |
| 37 | #define pr_fmt(fmt) "" fmt |
| 38 | |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 39 | static bool boot_cpu_done; |
| 40 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 41 | static int __read_mostly __pat_enabled = IS_ENABLED(CONFIG_X86_PAT); |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 42 | |
Marcin Slusarz | 1ee4bd9 | 2009-04-10 22:47:17 +0200 | [diff] [blame] | 43 | static inline void pat_disable(const char *reason) |
Thomas Gleixner | 8d4a430 | 2008-05-08 09:18:43 +0200 | [diff] [blame] | 44 | { |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 45 | __pat_enabled = 0; |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 46 | pr_info("x86/PAT: %s\n", reason); |
Thomas Gleixner | 8d4a430 | 2008-05-08 09:18:43 +0200 | [diff] [blame] | 47 | } |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 48 | |
Andrew Morton | be524fb | 2008-05-29 00:01:28 -0700 | [diff] [blame] | 49 | static int __init nopat(char *str) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 50 | { |
Thomas Gleixner | 8d4a430 | 2008-05-08 09:18:43 +0200 | [diff] [blame] | 51 | pat_disable("PAT support disabled."); |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 52 | return 0; |
| 53 | } |
| 54 | early_param("nopat", nopat); |
| 55 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 56 | bool pat_enabled(void) |
| 57 | { |
| 58 | return !!__pat_enabled; |
| 59 | } |
Luis R. Rodriguez | fbe7193 | 2015-05-26 10:28:16 +0200 | [diff] [blame] | 60 | EXPORT_SYMBOL_GPL(pat_enabled); |
Venki Pallipadi | 77b52b4 | 2008-05-05 19:09:10 -0700 | [diff] [blame] | 61 | |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 62 | int pat_debug_enable; |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 63 | |
Venki Pallipadi | 77b52b4 | 2008-05-05 19:09:10 -0700 | [diff] [blame] | 64 | static int __init pat_debug_setup(char *str) |
| 65 | { |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 66 | pat_debug_enable = 1; |
Venki Pallipadi | 77b52b4 | 2008-05-05 19:09:10 -0700 | [diff] [blame] | 67 | return 0; |
| 68 | } |
| 69 | __setup("debugpat", pat_debug_setup); |
| 70 | |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 71 | #ifdef CONFIG_X86_PAT |
| 72 | /* |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 73 | * X86 PAT uses page flags arch_1 and uncached together to keep track of |
| 74 | * memory type of pages that have backing page struct. |
| 75 | * |
| 76 | * X86 PAT supports 4 different memory types: |
| 77 | * - _PAGE_CACHE_MODE_WB |
| 78 | * - _PAGE_CACHE_MODE_WC |
| 79 | * - _PAGE_CACHE_MODE_UC_MINUS |
| 80 | * - _PAGE_CACHE_MODE_WT |
| 81 | * |
| 82 | * _PAGE_CACHE_MODE_WB is the default type. |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 83 | */ |
| 84 | |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 85 | #define _PGMT_WB 0 |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 86 | #define _PGMT_WC (1UL << PG_arch_1) |
| 87 | #define _PGMT_UC_MINUS (1UL << PG_uncached) |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 88 | #define _PGMT_WT (1UL << PG_uncached | 1UL << PG_arch_1) |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 89 | #define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1) |
| 90 | #define _PGMT_CLEAR_MASK (~_PGMT_MASK) |
| 91 | |
| 92 | static inline enum page_cache_mode get_page_memtype(struct page *pg) |
| 93 | { |
| 94 | unsigned long pg_flags = pg->flags & _PGMT_MASK; |
| 95 | |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 96 | if (pg_flags == _PGMT_WB) |
| 97 | return _PAGE_CACHE_MODE_WB; |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 98 | else if (pg_flags == _PGMT_WC) |
| 99 | return _PAGE_CACHE_MODE_WC; |
| 100 | else if (pg_flags == _PGMT_UC_MINUS) |
| 101 | return _PAGE_CACHE_MODE_UC_MINUS; |
| 102 | else |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 103 | return _PAGE_CACHE_MODE_WT; |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 104 | } |
| 105 | |
| 106 | static inline void set_page_memtype(struct page *pg, |
| 107 | enum page_cache_mode memtype) |
| 108 | { |
| 109 | unsigned long memtype_flags; |
| 110 | unsigned long old_flags; |
| 111 | unsigned long new_flags; |
| 112 | |
| 113 | switch (memtype) { |
| 114 | case _PAGE_CACHE_MODE_WC: |
| 115 | memtype_flags = _PGMT_WC; |
| 116 | break; |
| 117 | case _PAGE_CACHE_MODE_UC_MINUS: |
| 118 | memtype_flags = _PGMT_UC_MINUS; |
| 119 | break; |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 120 | case _PAGE_CACHE_MODE_WT: |
| 121 | memtype_flags = _PGMT_WT; |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 122 | break; |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 123 | case _PAGE_CACHE_MODE_WB: |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 124 | default: |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 125 | memtype_flags = _PGMT_WB; |
Thomas Gleixner | 0dbcae8 | 2014-11-16 18:59:19 +0100 | [diff] [blame] | 126 | break; |
| 127 | } |
| 128 | |
| 129 | do { |
| 130 | old_flags = pg->flags; |
| 131 | new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags; |
| 132 | } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags); |
| 133 | } |
| 134 | #else |
| 135 | static inline enum page_cache_mode get_page_memtype(struct page *pg) |
| 136 | { |
| 137 | return -1; |
| 138 | } |
| 139 | static inline void set_page_memtype(struct page *pg, |
| 140 | enum page_cache_mode memtype) |
| 141 | { |
| 142 | } |
| 143 | #endif |
| 144 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 145 | enum { |
| 146 | PAT_UC = 0, /* uncached */ |
| 147 | PAT_WC = 1, /* Write combining */ |
| 148 | PAT_WT = 4, /* Write Through */ |
| 149 | PAT_WP = 5, /* Write Protected */ |
| 150 | PAT_WB = 6, /* Write Back (default) */ |
| 151 | PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */ |
| 152 | }; |
| 153 | |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 154 | #define CM(c) (_PAGE_CACHE_MODE_ ## c) |
| 155 | |
| 156 | static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg) |
| 157 | { |
| 158 | enum page_cache_mode cache; |
| 159 | char *cache_mode; |
| 160 | |
| 161 | switch (pat_val) { |
| 162 | case PAT_UC: cache = CM(UC); cache_mode = "UC "; break; |
| 163 | case PAT_WC: cache = CM(WC); cache_mode = "WC "; break; |
| 164 | case PAT_WT: cache = CM(WT); cache_mode = "WT "; break; |
| 165 | case PAT_WP: cache = CM(WP); cache_mode = "WP "; break; |
| 166 | case PAT_WB: cache = CM(WB); cache_mode = "WB "; break; |
| 167 | case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break; |
| 168 | default: cache = CM(WB); cache_mode = "WB "; break; |
| 169 | } |
| 170 | |
| 171 | memcpy(msg, cache_mode, 4); |
| 172 | |
| 173 | return cache; |
| 174 | } |
| 175 | |
| 176 | #undef CM |
| 177 | |
| 178 | /* |
| 179 | * Update the cache mode to pgprot translation tables according to PAT |
| 180 | * configuration. |
| 181 | * Using lower indices is preferred, so we start with highest index. |
| 182 | */ |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 183 | void pat_init_cache_modes(u64 pat) |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 184 | { |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 185 | enum page_cache_mode cache; |
| 186 | char pat_msg[33]; |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 187 | int i; |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 188 | |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 189 | pat_msg[32] = 0; |
| 190 | for (i = 7; i >= 0; i--) { |
| 191 | cache = pat_get_cache_mode((pat >> (i * 8)) & 7, |
| 192 | pat_msg + 4 * i); |
| 193 | update_cache_mode_entry(i, cache); |
| 194 | } |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 195 | pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg); |
Juergen Gross | bd809af | 2014-11-03 14:02:03 +0100 | [diff] [blame] | 196 | } |
| 197 | |
Andreas Herrmann | cd7a4e9 | 2008-06-10 16:05:39 +0200 | [diff] [blame] | 198 | #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8)) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 199 | |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 200 | static void pat_bsp_init(u64 pat) |
| 201 | { |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 202 | u64 tmp_pat; |
| 203 | |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 204 | if (!cpu_has_pat) { |
| 205 | pat_disable("PAT not supported by CPU."); |
| 206 | return; |
| 207 | } |
| 208 | |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 209 | if (!pat_enabled()) |
| 210 | goto done; |
| 211 | |
| 212 | rdmsrl(MSR_IA32_CR_PAT, tmp_pat); |
| 213 | if (!tmp_pat) { |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 214 | pat_disable("PAT MSR is 0, disabled."); |
| 215 | return; |
| 216 | } |
| 217 | |
| 218 | wrmsrl(MSR_IA32_CR_PAT, pat); |
| 219 | |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 220 | done: |
| 221 | pat_init_cache_modes(pat); |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 222 | } |
| 223 | |
| 224 | static void pat_ap_init(u64 pat) |
| 225 | { |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 226 | if (!pat_enabled()) |
| 227 | return; |
| 228 | |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 229 | if (!cpu_has_pat) { |
| 230 | /* |
| 231 | * If this happens we are on a secondary CPU, but switched to |
| 232 | * PAT on the boot CPU. We have no way to undo PAT. |
| 233 | */ |
| 234 | panic("x86/PAT: PAT enabled, but not supported by secondary CPU\n"); |
| 235 | } |
| 236 | |
| 237 | wrmsrl(MSR_IA32_CR_PAT, pat); |
| 238 | } |
| 239 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 240 | void pat_init(void) |
| 241 | { |
| 242 | u64 pat; |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 243 | struct cpuinfo_x86 *c = &boot_cpu_data; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 244 | |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 245 | if (!pat_enabled()) { |
| 246 | /* |
| 247 | * No PAT. Emulate the PAT table that corresponds to the two |
| 248 | * cache bits, PWT (Write Through) and PCD (Cache Disable). This |
| 249 | * setup is the same as the BIOS default setup when the system |
| 250 | * has PAT but the "nopat" boot option has been specified. This |
| 251 | * emulated PAT table is used when MSR_IA32_CR_PAT returns 0. |
| 252 | * |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 253 | * PTE encoding: |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 254 | * |
| 255 | * PCD |
| 256 | * |PWT PAT |
| 257 | * || slot |
| 258 | * 00 0 WB : _PAGE_CACHE_MODE_WB |
| 259 | * 01 1 WT : _PAGE_CACHE_MODE_WT |
| 260 | * 10 2 UC-: _PAGE_CACHE_MODE_UC_MINUS |
| 261 | * 11 3 UC : _PAGE_CACHE_MODE_UC |
| 262 | * |
| 263 | * NOTE: When WC or WP is used, it is redirected to UC- per |
| 264 | * the default setup in __cachemode2pte_tbl[]. |
| 265 | */ |
| 266 | pat = PAT(0, WB) | PAT(1, WT) | PAT(2, UC_MINUS) | PAT(3, UC) | |
| 267 | PAT(4, WB) | PAT(5, WT) | PAT(6, UC_MINUS) | PAT(7, UC); |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 268 | |
| 269 | } else if ((c->x86_vendor == X86_VENDOR_INTEL) && |
| 270 | (((c->x86 == 0x6) && (c->x86_model <= 0xd)) || |
| 271 | ((c->x86 == 0xf) && (c->x86_model <= 0x6)))) { |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 272 | /* |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 273 | * PAT support with the lower four entries. Intel Pentium 2, |
| 274 | * 3, M, and 4 are affected by PAT errata, which makes the |
| 275 | * upper four entries unusable. To be on the safe side, we don't |
| 276 | * use those. |
| 277 | * |
| 278 | * PTE encoding: |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 279 | * PAT |
| 280 | * |PCD |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 281 | * ||PWT PAT |
| 282 | * ||| slot |
| 283 | * 000 0 WB : _PAGE_CACHE_MODE_WB |
| 284 | * 001 1 WC : _PAGE_CACHE_MODE_WC |
| 285 | * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS |
| 286 | * 011 3 UC : _PAGE_CACHE_MODE_UC |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 287 | * PAT bit unused |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 288 | * |
| 289 | * NOTE: When WT or WP is used, it is redirected to UC- per |
| 290 | * the default setup in __cachemode2pte_tbl[]. |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 291 | */ |
| 292 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
| 293 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC); |
Toshi Kani | d79a40c | 2015-06-04 18:55:12 +0200 | [diff] [blame] | 294 | } else { |
| 295 | /* |
| 296 | * Full PAT support. We put WT in slot 7 to improve |
| 297 | * robustness in the presence of errata that might cause |
| 298 | * the high PAT bit to be ignored. This way, a buggy slot 7 |
| 299 | * access will hit slot 3, and slot 3 is UC, so at worst |
| 300 | * we lose performance without causing a correctness issue. |
| 301 | * Pentium 4 erratum N46 is an example for such an erratum, |
| 302 | * although we try not to use PAT at all on affected CPUs. |
| 303 | * |
| 304 | * PTE encoding: |
| 305 | * PAT |
| 306 | * |PCD |
| 307 | * ||PWT PAT |
| 308 | * ||| slot |
| 309 | * 000 0 WB : _PAGE_CACHE_MODE_WB |
| 310 | * 001 1 WC : _PAGE_CACHE_MODE_WC |
| 311 | * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS |
| 312 | * 011 3 UC : _PAGE_CACHE_MODE_UC |
| 313 | * 100 4 WB : Reserved |
| 314 | * 101 5 WC : Reserved |
| 315 | * 110 6 UC-: Reserved |
| 316 | * 111 7 WT : _PAGE_CACHE_MODE_WT |
| 317 | * |
| 318 | * The reserved slots are unused, but mapped to their |
| 319 | * corresponding types in the presence of PAT errata. |
| 320 | */ |
| 321 | pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | |
| 322 | PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT); |
Borislav Petkov | 9cd25aa | 2015-06-04 18:55:10 +0200 | [diff] [blame] | 323 | } |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 324 | |
Borislav Petkov | 9dac629 | 2015-06-04 18:55:09 +0200 | [diff] [blame] | 325 | if (!boot_cpu_done) { |
| 326 | pat_bsp_init(pat); |
| 327 | boot_cpu_done = true; |
| 328 | } else { |
| 329 | pat_ap_init(pat); |
Juergen Gross | 9d34cfd | 2015-01-12 06:15:45 +0100 | [diff] [blame] | 330 | } |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 331 | } |
| 332 | |
| 333 | #undef PAT |
| 334 | |
Pallipadi, Venkatesh | 9e41a49 | 2010-02-10 15:26:07 -0800 | [diff] [blame] | 335 | static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */ |
Venkatesh Pallipadi | 335ef89 | 2009-07-10 09:57:36 -0700 | [diff] [blame] | 336 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 337 | /* |
| 338 | * Does intersection of PAT memory type and MTRR memory type and returns |
| 339 | * the resulting memory type as PAT understands it. |
| 340 | * (Type in pat and mtrr will not have same value) |
| 341 | * The intersection is based on "Effective Memory Type" tables in IA-32 |
| 342 | * SDM vol 3a |
| 343 | */ |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 344 | static unsigned long pat_x_mtrr_type(u64 start, u64 end, |
| 345 | enum page_cache_mode req_type) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 346 | { |
Venki Pallipadi | c26421d | 2008-05-29 12:01:44 -0700 | [diff] [blame] | 347 | /* |
| 348 | * Look for MTRR hint to get the effective type in case where PAT |
| 349 | * request is for WB. |
| 350 | */ |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 351 | if (req_type == _PAGE_CACHE_MODE_WB) { |
Toshi Kani | b73522e | 2015-05-26 10:28:10 +0200 | [diff] [blame] | 352 | u8 mtrr_type, uniform; |
Andreas Herrmann | dd0c7c4 | 2008-06-18 15:38:57 +0200 | [diff] [blame] | 353 | |
Toshi Kani | b73522e | 2015-05-26 10:28:10 +0200 | [diff] [blame] | 354 | mtrr_type = mtrr_type_lookup(start, end, &uniform); |
Suresh Siddha | b6ff32d | 2009-04-09 14:26:51 -0700 | [diff] [blame] | 355 | if (mtrr_type != MTRR_TYPE_WRBACK) |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 356 | return _PAGE_CACHE_MODE_UC_MINUS; |
Suresh Siddha | b6ff32d | 2009-04-09 14:26:51 -0700 | [diff] [blame] | 357 | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 358 | return _PAGE_CACHE_MODE_WB; |
Andreas Herrmann | dd0c7c4 | 2008-06-18 15:38:57 +0200 | [diff] [blame] | 359 | } |
| 360 | |
| 361 | return req_type; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 362 | } |
| 363 | |
John Dykstra | fa83523 | 2012-05-25 16:12:46 -0500 | [diff] [blame] | 364 | struct pagerange_state { |
| 365 | unsigned long cur_pfn; |
| 366 | int ram; |
| 367 | int not_ram; |
| 368 | }; |
| 369 | |
| 370 | static int |
| 371 | pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg) |
| 372 | { |
| 373 | struct pagerange_state *state = arg; |
| 374 | |
| 375 | state->not_ram |= initial_pfn > state->cur_pfn; |
| 376 | state->ram |= total_nr_pages > 0; |
| 377 | state->cur_pfn = initial_pfn + total_nr_pages; |
| 378 | |
| 379 | return state->ram && state->not_ram; |
| 380 | } |
| 381 | |
Yasuaki Ishimatsu | 3709c85 | 2010-07-22 14:57:35 +0900 | [diff] [blame] | 382 | static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end) |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 383 | { |
John Dykstra | fa83523 | 2012-05-25 16:12:46 -0500 | [diff] [blame] | 384 | int ret = 0; |
| 385 | unsigned long start_pfn = start >> PAGE_SHIFT; |
| 386 | unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT; |
| 387 | struct pagerange_state state = {start_pfn, 0, 0}; |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 388 | |
John Dykstra | fa83523 | 2012-05-25 16:12:46 -0500 | [diff] [blame] | 389 | /* |
| 390 | * For legacy reasons, physical address range in the legacy ISA |
| 391 | * region is tracked as non-RAM. This will allow users of |
| 392 | * /dev/mem to map portions of legacy ISA region, even when |
| 393 | * some of those portions are listed(or not even listed) with |
| 394 | * different e820 types(RAM/reserved/..) |
| 395 | */ |
| 396 | if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT) |
| 397 | start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT; |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 398 | |
John Dykstra | fa83523 | 2012-05-25 16:12:46 -0500 | [diff] [blame] | 399 | if (start_pfn < end_pfn) { |
| 400 | ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn, |
| 401 | &state, pagerange_is_ram_callback); |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 402 | } |
| 403 | |
John Dykstra | fa83523 | 2012-05-25 16:12:46 -0500 | [diff] [blame] | 404 | return (ret > 0) ? -1 : (state.ram ? 1 : 0); |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 405 | } |
| 406 | |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 407 | /* |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 408 | * For RAM pages, we use page flags to mark the pages with appropriate type. |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 409 | * The page flags are limited to four types, WB (default), WC, WT and UC-. |
| 410 | * WP request fails with -EINVAL, and UC gets redirected to UC-. Setting |
| 411 | * a new memory type is only allowed for a page mapped with the default WB |
| 412 | * type. |
Toshi Kani | 0d69bdf | 2015-06-04 18:55:13 +0200 | [diff] [blame] | 413 | * |
| 414 | * Here we do two passes: |
| 415 | * - Find the memtype of all the pages in the range, look for any conflicts. |
| 416 | * - In case of no conflicts, set the new memtype for pages in the range. |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 417 | */ |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 418 | static int reserve_ram_pages_type(u64 start, u64 end, |
| 419 | enum page_cache_mode req_type, |
| 420 | enum page_cache_mode *new_type) |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 421 | { |
| 422 | struct page *page; |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 423 | u64 pfn; |
| 424 | |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 425 | if (req_type == _PAGE_CACHE_MODE_WP) { |
Toshi Kani | 0d69bdf | 2015-06-04 18:55:13 +0200 | [diff] [blame] | 426 | if (new_type) |
| 427 | *new_type = _PAGE_CACHE_MODE_UC_MINUS; |
| 428 | return -EINVAL; |
| 429 | } |
| 430 | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 431 | if (req_type == _PAGE_CACHE_MODE_UC) { |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 432 | /* We do not support strong UC */ |
| 433 | WARN_ON_ONCE(1); |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 434 | req_type = _PAGE_CACHE_MODE_UC_MINUS; |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 435 | } |
| 436 | |
| 437 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 438 | enum page_cache_mode type; |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 439 | |
| 440 | page = pfn_to_page(pfn); |
| 441 | type = get_page_memtype(page); |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 442 | if (type != _PAGE_CACHE_MODE_WB) { |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 443 | pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n", |
Bjorn Helgaas | 365811d | 2012-05-29 15:06:29 -0700 | [diff] [blame] | 444 | start, end - 1, type, req_type); |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 445 | if (new_type) |
| 446 | *new_type = type; |
| 447 | |
| 448 | return -EBUSY; |
| 449 | } |
| 450 | } |
| 451 | |
| 452 | if (new_type) |
| 453 | *new_type = req_type; |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 454 | |
| 455 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { |
| 456 | page = pfn_to_page(pfn); |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 457 | set_page_memtype(page, req_type); |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 458 | } |
| 459 | return 0; |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 460 | } |
| 461 | |
| 462 | static int free_ram_pages_type(u64 start, u64 end) |
| 463 | { |
| 464 | struct page *page; |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 465 | u64 pfn; |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 466 | |
| 467 | for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) { |
| 468 | page = pfn_to_page(pfn); |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 469 | set_page_memtype(page, _PAGE_CACHE_MODE_WB); |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 470 | } |
| 471 | return 0; |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 472 | } |
| 473 | |
| 474 | /* |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 475 | * req_type typically has one of the: |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 476 | * - _PAGE_CACHE_MODE_WB |
| 477 | * - _PAGE_CACHE_MODE_WC |
| 478 | * - _PAGE_CACHE_MODE_UC_MINUS |
| 479 | * - _PAGE_CACHE_MODE_UC |
Toshi Kani | 0d69bdf | 2015-06-04 18:55:13 +0200 | [diff] [blame] | 480 | * - _PAGE_CACHE_MODE_WT |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 481 | * |
Andreas Herrmann | ac97991 | 2008-06-20 22:01:49 +0200 | [diff] [blame] | 482 | * If new_type is NULL, function will return an error if it cannot reserve the |
| 483 | * region with req_type. If new_type is non-NULL, function will return |
| 484 | * available type in new_type in case of no error. In case of any error |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 485 | * it will return a negative return value. |
| 486 | */ |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 487 | int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type, |
| 488 | enum page_cache_mode *new_type) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 489 | { |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 490 | struct memtype *new; |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 491 | enum page_cache_mode actual_type; |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 492 | int is_range_ram; |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 493 | int err = 0; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 494 | |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 495 | BUG_ON(start >= end); /* end is exclusive */ |
Andreas Herrmann | 69e26be | 2008-06-20 22:03:06 +0200 | [diff] [blame] | 496 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 497 | if (!pat_enabled()) { |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 498 | /* This is identical to page table setting without PAT */ |
Borislav Petkov | 7202fdb | 2015-06-04 18:55:11 +0200 | [diff] [blame] | 499 | if (new_type) |
| 500 | *new_type = req_type; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 501 | return 0; |
| 502 | } |
| 503 | |
| 504 | /* Low ISA region is always mapped WB in page table. No need to track */ |
H. Peter Anvin | 8a27138 | 2009-11-23 14:49:20 -0800 | [diff] [blame] | 505 | if (x86_platform.is_untracked_pat_range(start, end)) { |
Andreas Herrmann | ac97991 | 2008-06-20 22:01:49 +0200 | [diff] [blame] | 506 | if (new_type) |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 507 | *new_type = _PAGE_CACHE_MODE_WB; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 508 | return 0; |
| 509 | } |
| 510 | |
Suresh Siddha | b6ff32d | 2009-04-09 14:26:51 -0700 | [diff] [blame] | 511 | /* |
| 512 | * Call mtrr_lookup to get the type hint. This is an |
| 513 | * optimization for /dev/mem mmap'ers into WB memory (BIOS |
| 514 | * tools and ACPI tools). Use WB request for WB memory and use |
| 515 | * UC_MINUS otherwise. |
| 516 | */ |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 517 | actual_type = pat_x_mtrr_type(start, end, req_type); |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 518 | |
Suresh Siddha | 9597134 | 2009-01-13 10:21:30 -0800 | [diff] [blame] | 519 | if (new_type) |
| 520 | *new_type = actual_type; |
| 521 | |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 522 | is_range_ram = pat_pagerange_is_ram(start, end); |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 523 | if (is_range_ram == 1) { |
| 524 | |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 525 | err = reserve_ram_pages_type(start, end, req_type, new_type); |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 526 | |
| 527 | return err; |
| 528 | } else if (is_range_ram < 0) { |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 529 | return -EINVAL; |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 530 | } |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 531 | |
Venkatesh Pallipadi | 6a4f3b5 | 2010-06-10 17:45:01 -0700 | [diff] [blame] | 532 | new = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
Andreas Herrmann | ac97991 | 2008-06-20 22:01:49 +0200 | [diff] [blame] | 533 | if (!new) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 534 | return -ENOMEM; |
| 535 | |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 536 | new->start = start; |
| 537 | new->end = end; |
| 538 | new->type = actual_type; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 539 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 540 | spin_lock(&memtype_lock); |
| 541 | |
Pallipadi, Venkatesh | 9e41a49 | 2010-02-10 15:26:07 -0800 | [diff] [blame] | 542 | err = rbt_memtype_check_insert(new, new_type); |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 543 | if (err) { |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 544 | pr_info("x86/PAT: reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n", |
| 545 | start, end - 1, |
| 546 | cattr_name(new->type), cattr_name(req_type)); |
Andreas Herrmann | ac97991 | 2008-06-20 22:01:49 +0200 | [diff] [blame] | 547 | kfree(new); |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 548 | spin_unlock(&memtype_lock); |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 549 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 550 | return err; |
| 551 | } |
| 552 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 553 | spin_unlock(&memtype_lock); |
Andreas Herrmann | 3e9c83b | 2008-06-20 22:04:02 +0200 | [diff] [blame] | 554 | |
Bjorn Helgaas | 365811d | 2012-05-29 15:06:29 -0700 | [diff] [blame] | 555 | dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n", |
| 556 | start, end - 1, cattr_name(new->type), cattr_name(req_type), |
Andreas Herrmann | 3e9c83b | 2008-06-20 22:04:02 +0200 | [diff] [blame] | 557 | new_type ? cattr_name(*new_type) : "-"); |
| 558 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 559 | return err; |
| 560 | } |
| 561 | |
| 562 | int free_memtype(u64 start, u64 end) |
| 563 | { |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 564 | int err = -EINVAL; |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 565 | int is_range_ram; |
Xiaotian Feng | 20413f2 | 2010-05-26 09:51:10 +0800 | [diff] [blame] | 566 | struct memtype *entry; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 567 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 568 | if (!pat_enabled()) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 569 | return 0; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 570 | |
| 571 | /* Low ISA region is always mapped WB. No need to track */ |
H. Peter Anvin | 8a27138 | 2009-11-23 14:49:20 -0800 | [diff] [blame] | 572 | if (x86_platform.is_untracked_pat_range(start, end)) |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 573 | return 0; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 574 | |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 575 | is_range_ram = pat_pagerange_is_ram(start, end); |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 576 | if (is_range_ram == 1) { |
| 577 | |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 578 | err = free_ram_pages_type(start, end); |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 579 | |
| 580 | return err; |
| 581 | } else if (is_range_ram < 0) { |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 582 | return -EINVAL; |
Venkatesh Pallipadi | f584174 | 2009-07-10 09:57:38 -0700 | [diff] [blame] | 583 | } |
Suresh Siddha | 9542ada | 2008-09-24 08:53:33 -0700 | [diff] [blame] | 584 | |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 585 | spin_lock(&memtype_lock); |
Xiaotian Feng | 20413f2 | 2010-05-26 09:51:10 +0800 | [diff] [blame] | 586 | entry = rbt_memtype_erase(start, end); |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 587 | spin_unlock(&memtype_lock); |
| 588 | |
Xiaotian Feng | 20413f2 | 2010-05-26 09:51:10 +0800 | [diff] [blame] | 589 | if (!entry) { |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 590 | pr_info("x86/PAT: %s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n", |
| 591 | current->comm, current->pid, start, end - 1); |
Xiaotian Feng | 20413f2 | 2010-05-26 09:51:10 +0800 | [diff] [blame] | 592 | return -EINVAL; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 593 | } |
venkatesh.pallipadi@intel.com | 6997ab4 | 2008-03-18 17:00:25 -0700 | [diff] [blame] | 594 | |
Xiaotian Feng | 20413f2 | 2010-05-26 09:51:10 +0800 | [diff] [blame] | 595 | kfree(entry); |
| 596 | |
Bjorn Helgaas | 365811d | 2012-05-29 15:06:29 -0700 | [diff] [blame] | 597 | dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1); |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 598 | |
Xiaotian Feng | 20413f2 | 2010-05-26 09:51:10 +0800 | [diff] [blame] | 599 | return 0; |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 600 | } |
| 601 | |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 602 | |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 603 | /** |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 604 | * lookup_memtype - Looksup the memory type for a physical address |
| 605 | * @paddr: physical address of which memory type needs to be looked up |
| 606 | * |
| 607 | * Only to be called when PAT is enabled |
| 608 | * |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 609 | * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 610 | * or _PAGE_CACHE_MODE_WT. |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 611 | */ |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 612 | static enum page_cache_mode lookup_memtype(u64 paddr) |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 613 | { |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 614 | enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB; |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 615 | struct memtype *entry; |
| 616 | |
H. Peter Anvin | 8a27138 | 2009-11-23 14:49:20 -0800 | [diff] [blame] | 617 | if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE)) |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 618 | return rettype; |
| 619 | |
| 620 | if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) { |
| 621 | struct page *page; |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 622 | |
Toshi Kani | 35a5a10 | 2015-06-04 18:55:19 +0200 | [diff] [blame] | 623 | page = pfn_to_page(paddr >> PAGE_SHIFT); |
| 624 | return get_page_memtype(page); |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 625 | } |
| 626 | |
| 627 | spin_lock(&memtype_lock); |
| 628 | |
Pallipadi, Venkatesh | 9e41a49 | 2010-02-10 15:26:07 -0800 | [diff] [blame] | 629 | entry = rbt_memtype_lookup(paddr); |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 630 | if (entry != NULL) |
| 631 | rettype = entry->type; |
| 632 | else |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 633 | rettype = _PAGE_CACHE_MODE_UC_MINUS; |
Venkatesh Pallipadi | 637b86e | 2009-07-10 09:57:39 -0700 | [diff] [blame] | 634 | |
| 635 | spin_unlock(&memtype_lock); |
| 636 | return rettype; |
| 637 | } |
| 638 | |
| 639 | /** |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 640 | * io_reserve_memtype - Request a memory type mapping for a region of memory |
| 641 | * @start: start (physical address) of the region |
| 642 | * @end: end (physical address) of the region |
| 643 | * @type: A pointer to memtype, with requested type. On success, requested |
| 644 | * or any other compatible type that was available for the region is returned |
| 645 | * |
| 646 | * On success, returns 0 |
| 647 | * On failure, returns non-zero |
| 648 | */ |
| 649 | int io_reserve_memtype(resource_size_t start, resource_size_t end, |
Juergen Gross | 49a3b3c | 2014-11-03 14:01:54 +0100 | [diff] [blame] | 650 | enum page_cache_mode *type) |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 651 | { |
H. Peter Anvin | b855192 | 2009-08-26 17:17:51 -0700 | [diff] [blame] | 652 | resource_size_t size = end - start; |
Juergen Gross | 49a3b3c | 2014-11-03 14:01:54 +0100 | [diff] [blame] | 653 | enum page_cache_mode req_type = *type; |
| 654 | enum page_cache_mode new_type; |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 655 | int ret; |
| 656 | |
H. Peter Anvin | b855192 | 2009-08-26 17:17:51 -0700 | [diff] [blame] | 657 | WARN_ON_ONCE(iomem_map_sanity_check(start, size)); |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 658 | |
| 659 | ret = reserve_memtype(start, end, req_type, &new_type); |
| 660 | if (ret) |
| 661 | goto out_err; |
| 662 | |
H. Peter Anvin | b855192 | 2009-08-26 17:17:51 -0700 | [diff] [blame] | 663 | if (!is_new_memtype_allowed(start, size, req_type, new_type)) |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 664 | goto out_free; |
| 665 | |
H. Peter Anvin | b855192 | 2009-08-26 17:17:51 -0700 | [diff] [blame] | 666 | if (kernel_map_sync_memtype(start, size, new_type) < 0) |
Venkatesh Pallipadi | 9fd126b | 2009-07-10 09:57:34 -0700 | [diff] [blame] | 667 | goto out_free; |
| 668 | |
| 669 | *type = new_type; |
| 670 | return 0; |
| 671 | |
| 672 | out_free: |
| 673 | free_memtype(start, end); |
| 674 | ret = -EBUSY; |
| 675 | out_err: |
| 676 | return ret; |
| 677 | } |
| 678 | |
| 679 | /** |
| 680 | * io_free_memtype - Release a memory type mapping for a region of memory |
| 681 | * @start: start (physical address) of the region |
| 682 | * @end: end (physical address) of the region |
| 683 | */ |
| 684 | void io_free_memtype(resource_size_t start, resource_size_t end) |
| 685 | { |
| 686 | free_memtype(start, end); |
| 687 | } |
| 688 | |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 689 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
| 690 | unsigned long size, pgprot_t vma_prot) |
| 691 | { |
| 692 | return vma_prot; |
| 693 | } |
| 694 | |
Ingo Molnar | d092633 | 2008-07-18 00:26:59 +0200 | [diff] [blame] | 695 | #ifdef CONFIG_STRICT_DEVMEM |
Pavel Machek | 1f40a8b | 2014-12-28 17:15:24 +0100 | [diff] [blame] | 696 | /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */ |
Venki Pallipadi | 0124cec | 2008-04-26 11:32:12 -0700 | [diff] [blame] | 697 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
| 698 | { |
| 699 | return 1; |
| 700 | } |
| 701 | #else |
Ravikiran G Thirumalai | 9e41bff | 2008-10-30 13:59:21 -0700 | [diff] [blame] | 702 | /* This check is needed to avoid cache aliasing when PAT is enabled */ |
Venki Pallipadi | 0124cec | 2008-04-26 11:32:12 -0700 | [diff] [blame] | 703 | static inline int range_is_allowed(unsigned long pfn, unsigned long size) |
| 704 | { |
| 705 | u64 from = ((u64)pfn) << PAGE_SHIFT; |
| 706 | u64 to = from + size; |
| 707 | u64 cursor = from; |
| 708 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 709 | if (!pat_enabled()) |
Ravikiran G Thirumalai | 9e41bff | 2008-10-30 13:59:21 -0700 | [diff] [blame] | 710 | return 1; |
| 711 | |
Venki Pallipadi | 0124cec | 2008-04-26 11:32:12 -0700 | [diff] [blame] | 712 | while (cursor < to) { |
| 713 | if (!devmem_is_allowed(pfn)) { |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 714 | pr_info("x86/PAT: Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n", |
| 715 | current->comm, from, to - 1); |
Venki Pallipadi | 0124cec | 2008-04-26 11:32:12 -0700 | [diff] [blame] | 716 | return 0; |
| 717 | } |
| 718 | cursor += PAGE_SIZE; |
| 719 | pfn++; |
| 720 | } |
| 721 | return 1; |
| 722 | } |
Ingo Molnar | d092633 | 2008-07-18 00:26:59 +0200 | [diff] [blame] | 723 | #endif /* CONFIG_STRICT_DEVMEM */ |
Venki Pallipadi | 0124cec | 2008-04-26 11:32:12 -0700 | [diff] [blame] | 724 | |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 725 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, |
| 726 | unsigned long size, pgprot_t *vma_prot) |
| 727 | { |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 728 | enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB; |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 729 | |
Venki Pallipadi | 0124cec | 2008-04-26 11:32:12 -0700 | [diff] [blame] | 730 | if (!range_is_allowed(pfn, size)) |
| 731 | return 0; |
| 732 | |
Christoph Hellwig | 6b2f3d1 | 2009-10-27 11:05:28 +0100 | [diff] [blame] | 733 | if (file->f_flags & O_DSYNC) |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 734 | pcm = _PAGE_CACHE_MODE_UC_MINUS; |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 735 | |
| 736 | #ifdef CONFIG_X86_32 |
| 737 | /* |
| 738 | * On the PPro and successors, the MTRRs are used to set |
| 739 | * memory types for physical addresses outside main memory, |
| 740 | * so blindly setting UC or PWT on those pages is wrong. |
| 741 | * For Pentiums and earlier, the surround logic should disable |
| 742 | * caching for the high addresses through the KEN pin, but |
| 743 | * we maintain the tradition of paranoia in this code. |
| 744 | */ |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 745 | if (!pat_enabled() && |
Andreas Herrmann | cd7a4e9 | 2008-06-10 16:05:39 +0200 | [diff] [blame] | 746 | !(boot_cpu_has(X86_FEATURE_MTRR) || |
| 747 | boot_cpu_has(X86_FEATURE_K6_MTRR) || |
| 748 | boot_cpu_has(X86_FEATURE_CYRIX_ARR) || |
| 749 | boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) && |
| 750 | (pfn << PAGE_SHIFT) >= __pa(high_memory)) { |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 751 | pcm = _PAGE_CACHE_MODE_UC; |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 752 | } |
| 753 | #endif |
| 754 | |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 755 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 756 | cachemode2protval(pcm)); |
venkatesh.pallipadi@intel.com | f0970c1 | 2008-03-18 17:00:20 -0700 | [diff] [blame] | 757 | return 1; |
| 758 | } |
venkatesh.pallipadi@intel.com | e7f260a | 2008-03-18 17:00:21 -0700 | [diff] [blame] | 759 | |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 760 | /* |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 761 | * Change the memory type for the physial address range in kernel identity |
| 762 | * mapping space if that range is a part of identity map. |
| 763 | */ |
Juergen Gross | b14097b | 2014-11-03 14:01:58 +0100 | [diff] [blame] | 764 | int kernel_map_sync_memtype(u64 base, unsigned long size, |
| 765 | enum page_cache_mode pcm) |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 766 | { |
| 767 | unsigned long id_sz; |
| 768 | |
Dave Hansen | a25b931 | 2013-01-22 13:24:30 -0800 | [diff] [blame] | 769 | if (base > __pa(high_memory-1)) |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 770 | return 0; |
| 771 | |
Dave Hansen | 60f583d | 2013-03-07 08:31:51 -0800 | [diff] [blame] | 772 | /* |
| 773 | * some areas in the middle of the kernel identity range |
| 774 | * are not mapped, like the PCI space. |
| 775 | */ |
| 776 | if (!page_is_ram(base >> PAGE_SHIFT)) |
| 777 | return 0; |
| 778 | |
Dave Hansen | a25b931 | 2013-01-22 13:24:30 -0800 | [diff] [blame] | 779 | id_sz = (__pa(high_memory-1) <= base + size) ? |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 780 | __pa(high_memory) - base : |
| 781 | size; |
| 782 | |
Juergen Gross | b14097b | 2014-11-03 14:01:58 +0100 | [diff] [blame] | 783 | if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) { |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 784 | pr_info("x86/PAT: %s:%d ioremap_change_attr failed %s for [mem %#010Lx-%#010Lx]\n", |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 785 | current->comm, current->pid, |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 786 | cattr_name(pcm), |
Bjorn Helgaas | 365811d | 2012-05-29 15:06:29 -0700 | [diff] [blame] | 787 | base, (unsigned long long)(base + size-1)); |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 788 | return -EINVAL; |
| 789 | } |
| 790 | return 0; |
| 791 | } |
| 792 | |
| 793 | /* |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 794 | * Internal interface to reserve a range of physical memory with prot. |
| 795 | * Reserved non RAM regions only and after successful reserve_memtype, |
| 796 | * this func also keeps identity mapping (if any) in sync with this new prot. |
| 797 | */ |
venkatesh.pallipadi@intel.com | cdecff6 | 2009-01-09 16:13:12 -0800 | [diff] [blame] | 798 | static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot, |
| 799 | int strict_prot) |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 800 | { |
| 801 | int is_ram = 0; |
Venkatesh Pallipadi | 7880f74 | 2009-02-24 17:35:13 -0800 | [diff] [blame] | 802 | int ret; |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 803 | enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot); |
| 804 | enum page_cache_mode pcm = want_pcm; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 805 | |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 806 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 807 | |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 808 | /* |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 809 | * reserve_pfn_range() for RAM pages. We do not refcount to keep |
| 810 | * track of number of mappings of RAM pages. We can assert that |
| 811 | * the type requested matches the type of first page in the range. |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 812 | */ |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 813 | if (is_ram) { |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 814 | if (!pat_enabled()) |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 815 | return 0; |
| 816 | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 817 | pcm = lookup_memtype(paddr); |
| 818 | if (want_pcm != pcm) { |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 819 | pr_warn("x86/PAT: %s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n", |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 820 | current->comm, current->pid, |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 821 | cattr_name(want_pcm), |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 822 | (unsigned long long)paddr, |
Bjorn Helgaas | 365811d | 2012-05-29 15:06:29 -0700 | [diff] [blame] | 823 | (unsigned long long)(paddr + size - 1), |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 824 | cattr_name(pcm)); |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 825 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 826 | (~_PAGE_CACHE_MASK)) | |
| 827 | cachemode2protval(pcm)); |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 828 | } |
Pallipadi, Venkatesh | 4bb9c5c | 2009-03-12 17:45:27 -0700 | [diff] [blame] | 829 | return 0; |
Venkatesh Pallipadi | d886c73 | 2009-07-10 09:57:41 -0700 | [diff] [blame] | 830 | } |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 831 | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 832 | ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm); |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 833 | if (ret) |
| 834 | return ret; |
| 835 | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 836 | if (pcm != want_pcm) { |
Suresh Siddha | 1adcaaf | 2009-08-17 13:23:50 -0700 | [diff] [blame] | 837 | if (strict_prot || |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 838 | !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) { |
venkatesh.pallipadi@intel.com | cdecff6 | 2009-01-09 16:13:12 -0800 | [diff] [blame] | 839 | free_memtype(paddr, paddr + size); |
Luis R. Rodriguez | 9e76561 | 2015-05-26 10:28:11 +0200 | [diff] [blame] | 840 | pr_err("x86/PAT: %s:%d map pfn expected mapping type %s for [mem %#010Lx-%#010Lx], got %s\n", |
| 841 | current->comm, current->pid, |
| 842 | cattr_name(want_pcm), |
| 843 | (unsigned long long)paddr, |
| 844 | (unsigned long long)(paddr + size - 1), |
| 845 | cattr_name(pcm)); |
venkatesh.pallipadi@intel.com | cdecff6 | 2009-01-09 16:13:12 -0800 | [diff] [blame] | 846 | return -EINVAL; |
| 847 | } |
| 848 | /* |
| 849 | * We allow returning different type than the one requested in |
| 850 | * non strict case. |
| 851 | */ |
| 852 | *vma_prot = __pgprot((pgprot_val(*vma_prot) & |
| 853 | (~_PAGE_CACHE_MASK)) | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 854 | cachemode2protval(pcm)); |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 855 | } |
| 856 | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 857 | if (kernel_map_sync_memtype(paddr, size, pcm) < 0) { |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 858 | free_memtype(paddr, paddr + size); |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 859 | return -EINVAL; |
| 860 | } |
| 861 | return 0; |
| 862 | } |
| 863 | |
| 864 | /* |
| 865 | * Internal interface to free a range of physical memory. |
| 866 | * Frees non RAM regions only. |
| 867 | */ |
| 868 | static void free_pfn_range(u64 paddr, unsigned long size) |
| 869 | { |
| 870 | int is_ram; |
| 871 | |
Suresh Siddha | be03d9e | 2009-02-11 11:20:23 -0800 | [diff] [blame] | 872 | is_ram = pat_pagerange_is_ram(paddr, paddr + size); |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 873 | if (is_ram == 0) |
| 874 | free_memtype(paddr, paddr + size); |
| 875 | } |
| 876 | |
| 877 | /* |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 878 | * track_pfn_copy is called when vma that is covering the pfnmap gets |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 879 | * copied through copy_page_range(). |
| 880 | * |
| 881 | * If the vma has a linear pfn mapping for the entire range, we get the prot |
| 882 | * from pte and reserve the entire vma range with single reserve_pfn_range call. |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 883 | */ |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 884 | int track_pfn_copy(struct vm_area_struct *vma) |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 885 | { |
H. Peter Anvin | c1c15b6 | 2008-12-23 10:10:40 -0800 | [diff] [blame] | 886 | resource_size_t paddr; |
venkatesh.pallipadi@intel.com | 982d789 | 2008-12-19 13:47:28 -0800 | [diff] [blame] | 887 | unsigned long prot; |
Pallipadi, Venkatesh | 4b06504 | 2009-04-08 15:37:16 -0700 | [diff] [blame] | 888 | unsigned long vma_size = vma->vm_end - vma->vm_start; |
venkatesh.pallipadi@intel.com | cdecff6 | 2009-01-09 16:13:12 -0800 | [diff] [blame] | 889 | pgprot_t pgprot; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 890 | |
Konstantin Khlebnikov | b3b9c29 | 2012-10-08 16:28:34 -0700 | [diff] [blame] | 891 | if (vma->vm_flags & VM_PAT) { |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 892 | /* |
venkatesh.pallipadi@intel.com | 982d789 | 2008-12-19 13:47:28 -0800 | [diff] [blame] | 893 | * reserve the whole chunk covered by vma. We need the |
| 894 | * starting address and protection from pte. |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 895 | */ |
Pallipadi, Venkatesh | 4b06504 | 2009-04-08 15:37:16 -0700 | [diff] [blame] | 896 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 897 | WARN_ON_ONCE(1); |
venkatesh.pallipadi@intel.com | 982d789 | 2008-12-19 13:47:28 -0800 | [diff] [blame] | 898 | return -EINVAL; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 899 | } |
venkatesh.pallipadi@intel.com | cdecff6 | 2009-01-09 16:13:12 -0800 | [diff] [blame] | 900 | pgprot = __pgprot(prot); |
| 901 | return reserve_pfn_range(paddr, vma_size, &pgprot, 1); |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 902 | } |
| 903 | |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 904 | return 0; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 905 | } |
| 906 | |
| 907 | /* |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 908 | * prot is passed in as a parameter for the new mapping. If the vma has a |
| 909 | * linear pfn mapping for the entire range reserve the entire vma range with |
| 910 | * single reserve_pfn_range call. |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 911 | */ |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 912 | int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
Konstantin Khlebnikov | b3b9c29 | 2012-10-08 16:28:34 -0700 | [diff] [blame] | 913 | unsigned long pfn, unsigned long addr, unsigned long size) |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 914 | { |
Suresh Siddha | b1a86e1 | 2012-10-08 16:28:23 -0700 | [diff] [blame] | 915 | resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT; |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 916 | enum page_cache_mode pcm; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 917 | |
Suresh Siddha | b1a86e1 | 2012-10-08 16:28:23 -0700 | [diff] [blame] | 918 | /* reserve the whole chunk starting from paddr */ |
Konstantin Khlebnikov | b3b9c29 | 2012-10-08 16:28:34 -0700 | [diff] [blame] | 919 | if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) { |
| 920 | int ret; |
| 921 | |
| 922 | ret = reserve_pfn_range(paddr, size, prot, 0); |
| 923 | if (!ret) |
| 924 | vma->vm_flags |= VM_PAT; |
| 925 | return ret; |
| 926 | } |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 927 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 928 | if (!pat_enabled()) |
Venkatesh Pallipadi | 1087637 | 2009-07-10 09:57:40 -0700 | [diff] [blame] | 929 | return 0; |
| 930 | |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 931 | /* |
| 932 | * For anything smaller than the vma size we set prot based on the |
| 933 | * lookup. |
| 934 | */ |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 935 | pcm = lookup_memtype(paddr); |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 936 | |
| 937 | /* Check memtype for the remaining pages */ |
| 938 | while (size > PAGE_SIZE) { |
| 939 | size -= PAGE_SIZE; |
| 940 | paddr += PAGE_SIZE; |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 941 | if (pcm != lookup_memtype(paddr)) |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 942 | return -EINVAL; |
| 943 | } |
| 944 | |
| 945 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 946 | cachemode2protval(pcm)); |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 947 | |
| 948 | return 0; |
| 949 | } |
| 950 | |
| 951 | int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, |
| 952 | unsigned long pfn) |
| 953 | { |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 954 | enum page_cache_mode pcm; |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 955 | |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 956 | if (!pat_enabled()) |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 957 | return 0; |
| 958 | |
| 959 | /* Set prot based on lookup */ |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 960 | pcm = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT); |
Venkatesh Pallipadi | 1087637 | 2009-07-10 09:57:40 -0700 | [diff] [blame] | 961 | *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) | |
Juergen Gross | 2a37469 | 2014-11-03 14:01:55 +0100 | [diff] [blame] | 962 | cachemode2protval(pcm)); |
Venkatesh Pallipadi | 1087637 | 2009-07-10 09:57:40 -0700 | [diff] [blame] | 963 | |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 964 | return 0; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 965 | } |
| 966 | |
| 967 | /* |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 968 | * untrack_pfn is called while unmapping a pfnmap for a region. |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 969 | * untrack can be called for a specific region indicated by pfn and size or |
Suresh Siddha | b1a86e1 | 2012-10-08 16:28:23 -0700 | [diff] [blame] | 970 | * can be for the entire vma (in which case pfn, size are zero). |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 971 | */ |
Suresh Siddha | 5180da4 | 2012-10-08 16:28:29 -0700 | [diff] [blame] | 972 | void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, |
| 973 | unsigned long size) |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 974 | { |
H. Peter Anvin | c1c15b6 | 2008-12-23 10:10:40 -0800 | [diff] [blame] | 975 | resource_size_t paddr; |
Suresh Siddha | b1a86e1 | 2012-10-08 16:28:23 -0700 | [diff] [blame] | 976 | unsigned long prot; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 977 | |
Konstantin Khlebnikov | b3b9c29 | 2012-10-08 16:28:34 -0700 | [diff] [blame] | 978 | if (!(vma->vm_flags & VM_PAT)) |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 979 | return; |
Suresh Siddha | b1a86e1 | 2012-10-08 16:28:23 -0700 | [diff] [blame] | 980 | |
| 981 | /* free the chunk starting from pfn or the whole chunk */ |
| 982 | paddr = (resource_size_t)pfn << PAGE_SHIFT; |
| 983 | if (!paddr && !size) { |
| 984 | if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) { |
| 985 | WARN_ON_ONCE(1); |
| 986 | return; |
| 987 | } |
| 988 | |
| 989 | size = vma->vm_end - vma->vm_start; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 990 | } |
Suresh Siddha | b1a86e1 | 2012-10-08 16:28:23 -0700 | [diff] [blame] | 991 | free_pfn_range(paddr, size); |
Konstantin Khlebnikov | b3b9c29 | 2012-10-08 16:28:34 -0700 | [diff] [blame] | 992 | vma->vm_flags &= ~VM_PAT; |
venkatesh.pallipadi@intel.com | 5899329 | 2008-12-18 11:41:30 -0800 | [diff] [blame] | 993 | } |
| 994 | |
venkatesh.pallipadi@intel.com | 2520bd3 | 2008-12-18 11:41:32 -0800 | [diff] [blame] | 995 | pgprot_t pgprot_writecombine(pgprot_t prot) |
| 996 | { |
Borislav Petkov | 7202fdb | 2015-06-04 18:55:11 +0200 | [diff] [blame] | 997 | return __pgprot(pgprot_val(prot) | |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 998 | cachemode2protval(_PAGE_CACHE_MODE_WC)); |
venkatesh.pallipadi@intel.com | 2520bd3 | 2008-12-18 11:41:32 -0800 | [diff] [blame] | 999 | } |
Ingo Molnar | 92b9af9 | 2009-02-28 14:09:27 +0100 | [diff] [blame] | 1000 | EXPORT_SYMBOL_GPL(pgprot_writecombine); |
venkatesh.pallipadi@intel.com | 2520bd3 | 2008-12-18 11:41:32 -0800 | [diff] [blame] | 1001 | |
Toshi Kani | d1b4bfb | 2015-06-04 18:55:18 +0200 | [diff] [blame] | 1002 | pgprot_t pgprot_writethrough(pgprot_t prot) |
| 1003 | { |
| 1004 | return __pgprot(pgprot_val(prot) | |
| 1005 | cachemode2protval(_PAGE_CACHE_MODE_WT)); |
| 1006 | } |
| 1007 | EXPORT_SYMBOL_GPL(pgprot_writethrough); |
| 1008 | |
Andreas Herrmann | 012f09e | 2008-08-06 16:23:08 +0200 | [diff] [blame] | 1009 | #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT) |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1010 | |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1011 | static struct memtype *memtype_get_idx(loff_t pos) |
| 1012 | { |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 1013 | struct memtype *print_entry; |
| 1014 | int ret; |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1015 | |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 1016 | print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL); |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1017 | if (!print_entry) |
| 1018 | return NULL; |
| 1019 | |
| 1020 | spin_lock(&memtype_lock); |
Pallipadi, Venkatesh | 9e41a49 | 2010-02-10 15:26:07 -0800 | [diff] [blame] | 1021 | ret = rbt_memtype_copy_nth_element(print_entry, pos); |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1022 | spin_unlock(&memtype_lock); |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 1023 | |
venkatesh.pallipadi@intel.com | be5a0c1 | 2010-02-10 11:57:06 -0800 | [diff] [blame] | 1024 | if (!ret) { |
| 1025 | return print_entry; |
| 1026 | } else { |
| 1027 | kfree(print_entry); |
| 1028 | return NULL; |
| 1029 | } |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1030 | } |
| 1031 | |
| 1032 | static void *memtype_seq_start(struct seq_file *seq, loff_t *pos) |
| 1033 | { |
| 1034 | if (*pos == 0) { |
| 1035 | ++*pos; |
Rasmus Villemoes | 3736708 | 2014-11-28 22:03:41 +0100 | [diff] [blame] | 1036 | seq_puts(seq, "PAT memtype list:\n"); |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1037 | } |
| 1038 | |
| 1039 | return memtype_get_idx(*pos); |
| 1040 | } |
| 1041 | |
| 1042 | static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos) |
| 1043 | { |
| 1044 | ++*pos; |
| 1045 | return memtype_get_idx(*pos); |
| 1046 | } |
| 1047 | |
| 1048 | static void memtype_seq_stop(struct seq_file *seq, void *v) |
| 1049 | { |
| 1050 | } |
| 1051 | |
| 1052 | static int memtype_seq_show(struct seq_file *seq, void *v) |
| 1053 | { |
| 1054 | struct memtype *print_entry = (struct memtype *)v; |
| 1055 | |
| 1056 | seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type), |
| 1057 | print_entry->start, print_entry->end); |
| 1058 | kfree(print_entry); |
Ingo Molnar | ad2cde1 | 2008-09-30 13:20:45 +0200 | [diff] [blame] | 1059 | |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1060 | return 0; |
| 1061 | } |
| 1062 | |
Tobias Klauser | d535e43 | 2009-09-04 15:53:09 +0200 | [diff] [blame] | 1063 | static const struct seq_operations memtype_seq_ops = { |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1064 | .start = memtype_seq_start, |
| 1065 | .next = memtype_seq_next, |
| 1066 | .stop = memtype_seq_stop, |
| 1067 | .show = memtype_seq_show, |
| 1068 | }; |
| 1069 | |
| 1070 | static int memtype_seq_open(struct inode *inode, struct file *file) |
| 1071 | { |
| 1072 | return seq_open(file, &memtype_seq_ops); |
| 1073 | } |
| 1074 | |
| 1075 | static const struct file_operations memtype_fops = { |
| 1076 | .open = memtype_seq_open, |
| 1077 | .read = seq_read, |
| 1078 | .llseek = seq_lseek, |
| 1079 | .release = seq_release, |
| 1080 | }; |
| 1081 | |
| 1082 | static int __init pat_memtype_list_init(void) |
| 1083 | { |
Luis R. Rodriguez | cb32edf | 2015-05-26 10:28:15 +0200 | [diff] [blame] | 1084 | if (pat_enabled()) { |
Xiaotian Feng | dd4377b | 2009-11-26 19:53:48 +0800 | [diff] [blame] | 1085 | debugfs_create_file("pat_memtype_list", S_IRUSR, |
| 1086 | arch_debugfs_dir, NULL, &memtype_fops); |
| 1087 | } |
venkatesh.pallipadi@intel.com | fec0962 | 2008-07-18 16:08:14 -0700 | [diff] [blame] | 1088 | return 0; |
| 1089 | } |
| 1090 | |
| 1091 | late_initcall(pat_memtype_list_init); |
| 1092 | |
Andreas Herrmann | 012f09e | 2008-08-06 16:23:08 +0200 | [diff] [blame] | 1093 | #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */ |