blob: 5bd79c2b184fc0f5875d0a74f1956db721344e51 [file] [log] [blame]
Roland Dreier225c7b12007-05-08 18:00:38 -07001/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
Jack Morgenstein51a379d2008-07-25 10:32:52 -07005 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
Roland Dreier225c7b12007-05-08 18:00:38 -07006 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
7 *
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
13 *
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
16 * conditions are met:
17 *
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer.
21 *
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 * SOFTWARE.
35 */
36
37#ifndef MLX4_H
38#define MLX4_H
39
Michael S. Tsirkin525f5f42007-07-09 20:12:20 -070040#include <linux/mutex.h>
Roland Dreier225c7b12007-05-08 18:00:38 -070041#include <linux/radix-tree.h>
Jack Morgensteinee49bd92007-07-12 17:50:45 +030042#include <linux/timer.h>
Yevgeny Petrilin27bf91d2009-03-18 19:45:11 -070043#include <linux/workqueue.h>
Roland Dreier225c7b12007-05-08 18:00:38 -070044
45#include <linux/mlx4/device.h>
Roland Dreier37608ee2008-04-16 21:01:08 -070046#include <linux/mlx4/driver.h>
Roland Dreier225c7b12007-05-08 18:00:38 -070047#include <linux/mlx4/doorbell.h>
48
49#define DRV_NAME "mlx4_core"
50#define PFX DRV_NAME ": "
51#define DRV_VERSION "0.01"
52#define DRV_RELDATE "May 1, 2007"
53
54enum {
55 MLX4_HCR_BASE = 0x80680,
56 MLX4_HCR_SIZE = 0x0001c,
57 MLX4_CLR_INT_SIZE = 0x00008
58};
59
60enum {
Jack Morgensteine57ac0c2007-10-02 09:40:13 +020061 MLX4_MGM_ENTRY_SIZE = 0x100,
Roland Dreier225c7b12007-05-08 18:00:38 -070062 MLX4_QP_PER_MGM = 4 * (MLX4_MGM_ENTRY_SIZE / 16 - 2),
63 MLX4_MTT_ENTRY_PER_SEG = 8
64};
65
66enum {
Roland Dreier225c7b12007-05-08 18:00:38 -070067 MLX4_NUM_PDS = 1 << 15
68};
69
70enum {
71 MLX4_CMPT_TYPE_QP = 0,
72 MLX4_CMPT_TYPE_SRQ = 1,
73 MLX4_CMPT_TYPE_CQ = 2,
74 MLX4_CMPT_TYPE_EQ = 3,
75 MLX4_CMPT_NUM_TYPE
76};
77
78enum {
79 MLX4_CMPT_SHIFT = 24,
80 MLX4_NUM_CMPTS = MLX4_CMPT_NUM_TYPE << MLX4_CMPT_SHIFT
81};
82
83#ifdef CONFIG_MLX4_DEBUG
84extern int mlx4_debug_level;
Roland Dreier7b0f5df2008-11-04 11:18:56 -080085#else /* CONFIG_MLX4_DEBUG */
86#define mlx4_debug_level (0)
87#endif /* CONFIG_MLX4_DEBUG */
Roland Dreier225c7b12007-05-08 18:00:38 -070088
89#define mlx4_dbg(mdev, format, arg...) \
90 do { \
91 if (mlx4_debug_level) \
92 dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
93 } while (0)
94
Roland Dreier225c7b12007-05-08 18:00:38 -070095#define mlx4_err(mdev, format, arg...) \
96 dev_err(&mdev->pdev->dev, format, ## arg)
97#define mlx4_info(mdev, format, arg...) \
98 dev_info(&mdev->pdev->dev, format, ## arg)
99#define mlx4_warn(mdev, format, arg...) \
100 dev_warn(&mdev->pdev->dev, format, ## arg)
101
102struct mlx4_bitmap {
103 u32 last;
104 u32 top;
105 u32 max;
Yevgeny Petrilin93fc9e12008-10-22 10:25:29 -0700106 u32 reserved_top;
Roland Dreier225c7b12007-05-08 18:00:38 -0700107 u32 mask;
108 spinlock_t lock;
109 unsigned long *table;
110};
111
112struct mlx4_buddy {
113 unsigned long **bits;
Roland Dreiere4044cf2008-07-22 14:19:40 -0700114 unsigned int *num_free;
Roland Dreier225c7b12007-05-08 18:00:38 -0700115 int max_order;
116 spinlock_t lock;
117};
118
119struct mlx4_icm;
120
121struct mlx4_icm_table {
122 u64 virt;
123 int num_icm;
124 int num_obj;
125 int obj_size;
126 int lowmem;
Jack Morgenstein5b0bf5e2007-08-01 12:28:20 +0300127 int coherent;
Roland Dreier225c7b12007-05-08 18:00:38 -0700128 struct mutex mutex;
129 struct mlx4_icm **icm;
130};
131
132struct mlx4_eq {
133 struct mlx4_dev *dev;
134 void __iomem *doorbell;
135 int eqn;
136 u32 cons_index;
137 u16 irq;
138 u16 have_irq;
139 int nent;
140 struct mlx4_buf_list *page_list;
141 struct mlx4_mtt mtt;
142};
143
144struct mlx4_profile {
145 int num_qp;
146 int rdmarc_per_qp;
147 int num_srq;
148 int num_cq;
149 int num_mcg;
150 int num_mpt;
151 int num_mtt;
152};
153
154struct mlx4_fw {
155 u64 clr_int_base;
156 u64 catas_offset;
157 struct mlx4_icm *fw_icm;
158 struct mlx4_icm *aux_icm;
159 u32 catas_size;
160 u16 fw_pages;
161 u8 clr_int_bar;
162 u8 catas_bar;
163};
164
165struct mlx4_cmd {
166 struct pci_pool *pool;
167 void __iomem *hcr;
168 struct mutex hcr_mutex;
169 struct semaphore poll_sem;
170 struct semaphore event_sem;
171 int max_cmds;
172 spinlock_t context_lock;
173 int free_head;
174 struct mlx4_cmd_context *context;
175 u16 token_mask;
176 u8 use_events;
177 u8 toggle;
178};
179
180struct mlx4_uar_table {
181 struct mlx4_bitmap bitmap;
182};
183
184struct mlx4_mr_table {
185 struct mlx4_bitmap mpt_bitmap;
186 struct mlx4_buddy mtt_buddy;
187 u64 mtt_base;
188 u64 mpt_base;
189 struct mlx4_icm_table mtt_table;
190 struct mlx4_icm_table dmpt_table;
191};
192
193struct mlx4_cq_table {
194 struct mlx4_bitmap bitmap;
195 spinlock_t lock;
196 struct radix_tree_root tree;
197 struct mlx4_icm_table table;
198 struct mlx4_icm_table cmpt_table;
199};
200
201struct mlx4_eq_table {
202 struct mlx4_bitmap bitmap;
Yevgeny Petrilinb8dd7862008-12-22 07:15:03 -0800203 char *irq_names;
Roland Dreier225c7b12007-05-08 18:00:38 -0700204 void __iomem *clr_int;
Yevgeny Petrilinb8dd7862008-12-22 07:15:03 -0800205 void __iomem **uar_map;
Roland Dreier225c7b12007-05-08 18:00:38 -0700206 u32 clr_mask;
Yevgeny Petrilinb8dd7862008-12-22 07:15:03 -0800207 struct mlx4_eq *eq;
Roland Dreier225c7b12007-05-08 18:00:38 -0700208 u64 icm_virt;
209 struct page *icm_page;
210 dma_addr_t icm_dma;
211 struct mlx4_icm_table cmpt_table;
212 int have_irq;
213 u8 inta_pin;
214};
215
216struct mlx4_srq_table {
217 struct mlx4_bitmap bitmap;
218 spinlock_t lock;
219 struct radix_tree_root tree;
220 struct mlx4_icm_table table;
221 struct mlx4_icm_table cmpt_table;
222};
223
224struct mlx4_qp_table {
225 struct mlx4_bitmap bitmap;
226 u32 rdmarc_base;
227 int rdmarc_shift;
228 spinlock_t lock;
229 struct mlx4_icm_table qp_table;
230 struct mlx4_icm_table auxc_table;
231 struct mlx4_icm_table altc_table;
232 struct mlx4_icm_table rdmarc_table;
233 struct mlx4_icm_table cmpt_table;
234};
235
236struct mlx4_mcg_table {
237 struct mutex mutex;
238 struct mlx4_bitmap bitmap;
239 struct mlx4_icm_table table;
240};
241
242struct mlx4_catas_err {
243 u32 __iomem *map;
Jack Morgensteinee49bd92007-07-12 17:50:45 +0300244 struct timer_list timer;
245 struct list_head list;
Roland Dreier225c7b12007-05-08 18:00:38 -0700246};
247
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700248#define MLX4_MAX_MAC_NUM 128
249#define MLX4_MAC_TABLE_SIZE (MLX4_MAX_MAC_NUM << 3)
250
251struct mlx4_mac_table {
252 __be64 entries[MLX4_MAX_MAC_NUM];
253 int refs[MLX4_MAX_MAC_NUM];
254 struct mutex mutex;
255 int total;
256 int max;
257};
258
259#define MLX4_MAX_VLAN_NUM 128
260#define MLX4_VLAN_TABLE_SIZE (MLX4_MAX_VLAN_NUM << 2)
261
262struct mlx4_vlan_table {
263 __be32 entries[MLX4_MAX_VLAN_NUM];
264 int refs[MLX4_MAX_VLAN_NUM];
265 struct mutex mutex;
266 int total;
267 int max;
268};
269
270struct mlx4_port_info {
271 struct mlx4_dev *dev;
272 int port;
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700273 char dev_name[16];
274 struct device_attribute port_attr;
275 enum mlx4_port_type tmp_type;
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700276 struct mlx4_mac_table mac_table;
277 struct mlx4_vlan_table vlan_table;
278};
279
Yevgeny Petrilin27bf91d2009-03-18 19:45:11 -0700280struct mlx4_sense {
281 struct mlx4_dev *dev;
282 u8 do_sense_port[MLX4_MAX_PORTS + 1];
283 u8 sense_allowed[MLX4_MAX_PORTS + 1];
284 struct delayed_work sense_poll;
285};
286
Roland Dreier225c7b12007-05-08 18:00:38 -0700287struct mlx4_priv {
288 struct mlx4_dev dev;
289
290 struct list_head dev_list;
291 struct list_head ctx_list;
292 spinlock_t ctx_lock;
293
Yevgeny Petrilin62968832008-04-23 11:55:45 -0700294 struct list_head pgdir_list;
295 struct mutex pgdir_mutex;
296
Roland Dreier225c7b12007-05-08 18:00:38 -0700297 struct mlx4_fw fw;
298 struct mlx4_cmd cmd;
299
300 struct mlx4_bitmap pd_bitmap;
301 struct mlx4_uar_table uar_table;
302 struct mlx4_mr_table mr_table;
303 struct mlx4_cq_table cq_table;
304 struct mlx4_eq_table eq_table;
305 struct mlx4_srq_table srq_table;
306 struct mlx4_qp_table qp_table;
307 struct mlx4_mcg_table mcg_table;
308
309 struct mlx4_catas_err catas_err;
310
311 void __iomem *clr_base;
312
313 struct mlx4_uar driver_uar;
314 void __iomem *kar;
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700315 struct mlx4_port_info port[MLX4_MAX_PORTS + 1];
Yevgeny Petrilin27bf91d2009-03-18 19:45:11 -0700316 struct mlx4_sense sense;
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700317 struct mutex port_mutex;
Roland Dreier225c7b12007-05-08 18:00:38 -0700318};
319
320static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
321{
322 return container_of(dev, struct mlx4_priv, dev);
323}
324
Yevgeny Petrilin27bf91d2009-03-18 19:45:11 -0700325#define MLX4_SENSE_RANGE (HZ * 3)
326
327extern struct workqueue_struct *mlx4_wq;
328
Roland Dreier225c7b12007-05-08 18:00:38 -0700329u32 mlx4_bitmap_alloc(struct mlx4_bitmap *bitmap);
330void mlx4_bitmap_free(struct mlx4_bitmap *bitmap, u32 obj);
Yevgeny Petrilina3cdcbf2008-10-10 12:01:37 -0700331u32 mlx4_bitmap_alloc_range(struct mlx4_bitmap *bitmap, int cnt, int align);
332void mlx4_bitmap_free_range(struct mlx4_bitmap *bitmap, u32 obj, int cnt);
Yevgeny Petrilin93fc9e12008-10-22 10:25:29 -0700333int mlx4_bitmap_init(struct mlx4_bitmap *bitmap, u32 num, u32 mask,
334 u32 reserved_bot, u32 resetrved_top);
Roland Dreier225c7b12007-05-08 18:00:38 -0700335void mlx4_bitmap_cleanup(struct mlx4_bitmap *bitmap);
336
337int mlx4_reset(struct mlx4_dev *dev);
338
Yevgeny Petrilinb8dd7862008-12-22 07:15:03 -0800339int mlx4_alloc_eq_table(struct mlx4_dev *dev);
340void mlx4_free_eq_table(struct mlx4_dev *dev);
341
Roland Dreier225c7b12007-05-08 18:00:38 -0700342int mlx4_init_pd_table(struct mlx4_dev *dev);
343int mlx4_init_uar_table(struct mlx4_dev *dev);
344int mlx4_init_mr_table(struct mlx4_dev *dev);
345int mlx4_init_eq_table(struct mlx4_dev *dev);
346int mlx4_init_cq_table(struct mlx4_dev *dev);
347int mlx4_init_qp_table(struct mlx4_dev *dev);
348int mlx4_init_srq_table(struct mlx4_dev *dev);
349int mlx4_init_mcg_table(struct mlx4_dev *dev);
350
351void mlx4_cleanup_pd_table(struct mlx4_dev *dev);
352void mlx4_cleanup_uar_table(struct mlx4_dev *dev);
353void mlx4_cleanup_mr_table(struct mlx4_dev *dev);
354void mlx4_cleanup_eq_table(struct mlx4_dev *dev);
355void mlx4_cleanup_cq_table(struct mlx4_dev *dev);
356void mlx4_cleanup_qp_table(struct mlx4_dev *dev);
357void mlx4_cleanup_srq_table(struct mlx4_dev *dev);
358void mlx4_cleanup_mcg_table(struct mlx4_dev *dev);
359
Jack Morgensteinee49bd92007-07-12 17:50:45 +0300360void mlx4_start_catas_poll(struct mlx4_dev *dev);
361void mlx4_stop_catas_poll(struct mlx4_dev *dev);
Yevgeny Petrilin27bf91d2009-03-18 19:45:11 -0700362void mlx4_catas_init(void);
Jack Morgensteinee49bd92007-07-12 17:50:45 +0300363int mlx4_restart_one(struct pci_dev *pdev);
Roland Dreier225c7b12007-05-08 18:00:38 -0700364int mlx4_register_device(struct mlx4_dev *dev);
365void mlx4_unregister_device(struct mlx4_dev *dev);
Roland Dreier37608ee2008-04-16 21:01:08 -0700366void mlx4_dispatch_event(struct mlx4_dev *dev, enum mlx4_dev_event type, int port);
Roland Dreier225c7b12007-05-08 18:00:38 -0700367
368struct mlx4_dev_cap;
369struct mlx4_init_hca_param;
370
371u64 mlx4_make_profile(struct mlx4_dev *dev,
372 struct mlx4_profile *request,
373 struct mlx4_dev_cap *dev_cap,
374 struct mlx4_init_hca_param *init_hca);
375
376int mlx4_map_eq_icm(struct mlx4_dev *dev, u64 icm_virt);
377void mlx4_unmap_eq_icm(struct mlx4_dev *dev);
378
379int mlx4_cmd_init(struct mlx4_dev *dev);
380void mlx4_cmd_cleanup(struct mlx4_dev *dev);
381void mlx4_cmd_event(struct mlx4_dev *dev, u16 token, u8 status, u64 out_param);
382int mlx4_cmd_use_events(struct mlx4_dev *dev);
383void mlx4_cmd_use_polling(struct mlx4_dev *dev);
384
385void mlx4_cq_completion(struct mlx4_dev *dev, u32 cqn);
386void mlx4_cq_event(struct mlx4_dev *dev, u32 cqn, int event_type);
387
388void mlx4_qp_event(struct mlx4_dev *dev, u32 qpn, int event_type);
389
390void mlx4_srq_event(struct mlx4_dev *dev, u32 srqn, int event_type);
391
392void mlx4_handle_catas_err(struct mlx4_dev *dev);
393
Yevgeny Petrilin27bf91d2009-03-18 19:45:11 -0700394void mlx4_do_sense_ports(struct mlx4_dev *dev,
395 enum mlx4_port_type *stype,
396 enum mlx4_port_type *defaults);
397void mlx4_start_sense(struct mlx4_dev *dev);
398void mlx4_stop_sense(struct mlx4_dev *dev);
399void mlx4_sense_init(struct mlx4_dev *dev);
400int mlx4_check_port_params(struct mlx4_dev *dev,
401 enum mlx4_port_type *port_type);
402int mlx4_change_port_types(struct mlx4_dev *dev,
403 enum mlx4_port_type *port_types);
404
Yevgeny Petrilin2a2336f2008-10-22 11:44:46 -0700405void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
406void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
407
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700408int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port);
Jack Morgenstein9a5aa622008-11-28 21:29:46 -0800409int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);
Yevgeny Petrilin7ff93f82008-10-22 15:38:42 -0700410
Roland Dreier225c7b12007-05-08 18:00:38 -0700411#endif /* MLX4_H */