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Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
Paul Mackerras14cf11a2005-09-26 16:04:21 +10002 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
Paul Mackerras14cf11a2005-09-26 16:04:21 +100017#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100022#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
28#include <linux/init.h>
29#include <linux/prctl.h>
30#include <linux/init_task.h>
Paul Gortmaker4b16f8e2011-07-22 18:24:23 -040031#include <linux/export.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100032#include <linux/kallsyms.h>
33#include <linux/mqueue.h>
34#include <linux/hardirq.h>
Paul Mackerras06d67d52005-10-10 22:29:05 +100035#include <linux/utsname.h>
Steven Rostedt6794c782009-02-09 21:10:27 -080036#include <linux/ftrace.h>
Martin Schwidefsky79741dd2008-12-31 15:11:38 +010037#include <linux/kernel_stat.h>
Anton Blanchardd8390882009-02-22 01:50:03 +000038#include <linux/personality.h>
39#include <linux/random.h>
K.Prasad5aae8a52010-06-15 11:35:19 +053040#include <linux/hw_breakpoint.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100041
42#include <asm/pgtable.h>
43#include <asm/uaccess.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100044#include <asm/io.h>
45#include <asm/processor.h>
46#include <asm/mmu.h>
47#include <asm/prom.h>
Michael Ellerman76032de2005-11-07 13:12:03 +110048#include <asm/machdep.h>
Paul Mackerrasc6622f62006-02-24 10:06:59 +110049#include <asm/time.h>
David Howellsae3a1972012-03-28 18:30:02 +010050#include <asm/runlatch.h>
Arnd Bergmanna7f31842006-03-23 00:00:08 +010051#include <asm/syscalls.h>
David Howellsae3a1972012-03-28 18:30:02 +010052#include <asm/switch_to.h>
Michael Neulingfb096922013-02-13 16:21:37 +000053#include <asm/tm.h>
David Howellsae3a1972012-03-28 18:30:02 +010054#include <asm/debug.h>
Paul Mackerras06d67d52005-10-10 22:29:05 +100055#ifdef CONFIG_PPC64
56#include <asm/firmware.h>
Paul Mackerras06d67d52005-10-10 22:29:05 +100057#endif
Luis Machadod6a61bf2008-07-24 02:10:41 +100058#include <linux/kprobes.h>
59#include <linux/kdebug.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100060
Michael Neuling8b3c34c2013-02-13 16:21:32 +000061/* Transactional Memory debug */
62#ifdef TM_DEBUG_SW
63#define TM_DEBUG(x...) printk(KERN_INFO x)
64#else
65#define TM_DEBUG(x...) do { } while(0)
66#endif
67
Paul Mackerras14cf11a2005-09-26 16:04:21 +100068extern unsigned long _get_SP(void);
69
70#ifndef CONFIG_SMP
71struct task_struct *last_task_used_math = NULL;
72struct task_struct *last_task_used_altivec = NULL;
Michael Neulingce48b212008-06-25 14:07:18 +100073struct task_struct *last_task_used_vsx = NULL;
Paul Mackerras14cf11a2005-09-26 16:04:21 +100074struct task_struct *last_task_used_spe = NULL;
75#endif
76
Kevin Hao037f0ee2013-07-14 17:02:05 +080077#ifdef CONFIG_PPC_FPU
Paul Mackerras14cf11a2005-09-26 16:04:21 +100078/*
79 * Make sure the floating-point register state in the
80 * the thread_struct is up to date for task tsk.
81 */
82void flush_fp_to_thread(struct task_struct *tsk)
83{
84 if (tsk->thread.regs) {
85 /*
86 * We need to disable preemption here because if we didn't,
87 * another process could get scheduled after the regs->msr
88 * test but before we have finished saving the FP registers
89 * to the thread_struct. That process could take over the
90 * FPU, and then when we get scheduled again we would store
91 * bogus values for the remaining FP registers.
92 */
93 preempt_disable();
94 if (tsk->thread.regs->msr & MSR_FP) {
95#ifdef CONFIG_SMP
96 /*
97 * This should only ever be called for current or
98 * for a stopped child process. Since we save away
99 * the FP register state on context switch on SMP,
100 * there is something wrong if a stopped child appears
101 * to still have its FP state in the CPU registers.
102 */
103 BUG_ON(tsk != current);
104#endif
Kumar Gala0ee6c152007-08-28 21:15:53 -0500105 giveup_fpu(tsk);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000106 }
107 preempt_enable();
108 }
109}
Paul Mackerrasde56a942011-06-29 00:21:34 +0000110EXPORT_SYMBOL_GPL(flush_fp_to_thread);
Kevin Hao037f0ee2013-07-14 17:02:05 +0800111#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000112
113void enable_kernel_fp(void)
114{
115 WARN_ON(preemptible());
116
117#ifdef CONFIG_SMP
118 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
119 giveup_fpu(current);
120 else
121 giveup_fpu(NULL); /* just enables FP for kernel */
122#else
123 giveup_fpu(last_task_used_math);
124#endif /* CONFIG_SMP */
125}
126EXPORT_SYMBOL(enable_kernel_fp);
127
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000128#ifdef CONFIG_ALTIVEC
129void enable_kernel_altivec(void)
130{
131 WARN_ON(preemptible());
132
133#ifdef CONFIG_SMP
134 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
135 giveup_altivec(current);
136 else
Anton Blanchard35000872012-04-15 20:56:45 +0000137 giveup_altivec_notask();
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000138#else
139 giveup_altivec(last_task_used_altivec);
140#endif /* CONFIG_SMP */
141}
142EXPORT_SYMBOL(enable_kernel_altivec);
143
144/*
145 * Make sure the VMX/Altivec register state in the
146 * the thread_struct is up to date for task tsk.
147 */
148void flush_altivec_to_thread(struct task_struct *tsk)
149{
150 if (tsk->thread.regs) {
151 preempt_disable();
152 if (tsk->thread.regs->msr & MSR_VEC) {
153#ifdef CONFIG_SMP
154 BUG_ON(tsk != current);
155#endif
Kumar Gala0ee6c152007-08-28 21:15:53 -0500156 giveup_altivec(tsk);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000157 }
158 preempt_enable();
159 }
160}
Paul Mackerrasde56a942011-06-29 00:21:34 +0000161EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000162#endif /* CONFIG_ALTIVEC */
163
Michael Neulingce48b212008-06-25 14:07:18 +1000164#ifdef CONFIG_VSX
165#if 0
166/* not currently used, but some crazy RAID module might want to later */
167void enable_kernel_vsx(void)
168{
169 WARN_ON(preemptible());
170
171#ifdef CONFIG_SMP
172 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
173 giveup_vsx(current);
174 else
175 giveup_vsx(NULL); /* just enable vsx for kernel - force */
176#else
177 giveup_vsx(last_task_used_vsx);
178#endif /* CONFIG_SMP */
179}
180EXPORT_SYMBOL(enable_kernel_vsx);
181#endif
182
Michael Neuling7c292172008-07-11 16:29:12 +1000183void giveup_vsx(struct task_struct *tsk)
184{
185 giveup_fpu(tsk);
186 giveup_altivec(tsk);
187 __giveup_vsx(tsk);
188}
189
Michael Neulingce48b212008-06-25 14:07:18 +1000190void flush_vsx_to_thread(struct task_struct *tsk)
191{
192 if (tsk->thread.regs) {
193 preempt_disable();
194 if (tsk->thread.regs->msr & MSR_VSX) {
195#ifdef CONFIG_SMP
196 BUG_ON(tsk != current);
197#endif
198 giveup_vsx(tsk);
199 }
200 preempt_enable();
201 }
202}
Paul Mackerrasde56a942011-06-29 00:21:34 +0000203EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
Michael Neulingce48b212008-06-25 14:07:18 +1000204#endif /* CONFIG_VSX */
205
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000206#ifdef CONFIG_SPE
207
208void enable_kernel_spe(void)
209{
210 WARN_ON(preemptible());
211
212#ifdef CONFIG_SMP
213 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
214 giveup_spe(current);
215 else
216 giveup_spe(NULL); /* just enable SPE for kernel - force */
217#else
218 giveup_spe(last_task_used_spe);
219#endif /* __SMP __ */
220}
221EXPORT_SYMBOL(enable_kernel_spe);
222
223void flush_spe_to_thread(struct task_struct *tsk)
224{
225 if (tsk->thread.regs) {
226 preempt_disable();
227 if (tsk->thread.regs->msr & MSR_SPE) {
228#ifdef CONFIG_SMP
229 BUG_ON(tsk != current);
230#endif
yu liu685659e2011-06-14 18:34:25 -0500231 tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
Kumar Gala0ee6c152007-08-28 21:15:53 -0500232 giveup_spe(tsk);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000233 }
234 preempt_enable();
235 }
236}
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000237#endif /* CONFIG_SPE */
238
Paul Mackerras5388fb12006-01-11 22:11:39 +1100239#ifndef CONFIG_SMP
Paul Mackerras48abec02005-11-30 13:20:54 +1100240/*
241 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
242 * and the current task has some state, discard it.
243 */
Paul Mackerras5388fb12006-01-11 22:11:39 +1100244void discard_lazy_cpu_state(void)
Paul Mackerras48abec02005-11-30 13:20:54 +1100245{
Paul Mackerras48abec02005-11-30 13:20:54 +1100246 preempt_disable();
247 if (last_task_used_math == current)
248 last_task_used_math = NULL;
249#ifdef CONFIG_ALTIVEC
250 if (last_task_used_altivec == current)
251 last_task_used_altivec = NULL;
252#endif /* CONFIG_ALTIVEC */
Michael Neulingce48b212008-06-25 14:07:18 +1000253#ifdef CONFIG_VSX
254 if (last_task_used_vsx == current)
255 last_task_used_vsx = NULL;
256#endif /* CONFIG_VSX */
Paul Mackerras48abec02005-11-30 13:20:54 +1100257#ifdef CONFIG_SPE
258 if (last_task_used_spe == current)
259 last_task_used_spe = NULL;
260#endif
261 preempt_enable();
Paul Mackerras48abec02005-11-30 13:20:54 +1100262}
Paul Mackerras5388fb12006-01-11 22:11:39 +1100263#endif /* CONFIG_SMP */
Paul Mackerras48abec02005-11-30 13:20:54 +1100264
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000265#ifdef CONFIG_PPC_ADV_DEBUG_REGS
266void do_send_trap(struct pt_regs *regs, unsigned long address,
267 unsigned long error_code, int signal_code, int breakpt)
268{
269 siginfo_t info;
270
Ananth N Mavinakayanahalli41ab5262012-08-23 21:27:09 +0000271 current->thread.trap_nr = signal_code;
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000272 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
273 11, SIGSEGV) == NOTIFY_STOP)
274 return;
275
276 /* Deliver the signal to userspace */
277 info.si_signo = SIGTRAP;
278 info.si_errno = breakpt; /* breakpoint or watchpoint id */
279 info.si_code = signal_code;
280 info.si_addr = (void __user *)address;
281 force_sig_info(SIGTRAP, &info, current);
282}
283#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
Michael Neuling9422de32012-12-20 14:06:44 +0000284void do_break (struct pt_regs *regs, unsigned long address,
Luis Machadod6a61bf2008-07-24 02:10:41 +1000285 unsigned long error_code)
286{
287 siginfo_t info;
288
Ananth N Mavinakayanahalli41ab5262012-08-23 21:27:09 +0000289 current->thread.trap_nr = TRAP_HWBKPT;
Luis Machadod6a61bf2008-07-24 02:10:41 +1000290 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
291 11, SIGSEGV) == NOTIFY_STOP)
292 return;
293
Michael Neuling9422de32012-12-20 14:06:44 +0000294 if (debugger_break_match(regs))
Luis Machadod6a61bf2008-07-24 02:10:41 +1000295 return;
296
Michael Neuling9422de32012-12-20 14:06:44 +0000297 /* Clear the breakpoint */
298 hw_breakpoint_disable();
Luis Machadod6a61bf2008-07-24 02:10:41 +1000299
300 /* Deliver the signal to userspace */
301 info.si_signo = SIGTRAP;
302 info.si_errno = 0;
303 info.si_code = TRAP_HWBKPT;
304 info.si_addr = (void __user *)address;
305 force_sig_info(SIGTRAP, &info, current);
306}
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000307#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
Luis Machadod6a61bf2008-07-24 02:10:41 +1000308
Michael Neuling9422de32012-12-20 14:06:44 +0000309static DEFINE_PER_CPU(struct arch_hw_breakpoint, current_brk);
Michael Ellermana2ceff52008-03-28 19:11:48 +1100310
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000311#ifdef CONFIG_PPC_ADV_DEBUG_REGS
312/*
313 * Set the debug registers back to their default "safe" values.
314 */
315static void set_debug_reg_defaults(struct thread_struct *thread)
316{
317 thread->iac1 = thread->iac2 = 0;
318#if CONFIG_PPC_ADV_DEBUG_IACS > 2
319 thread->iac3 = thread->iac4 = 0;
320#endif
321 thread->dac1 = thread->dac2 = 0;
322#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
323 thread->dvc1 = thread->dvc2 = 0;
324#endif
325 thread->dbcr0 = 0;
326#ifdef CONFIG_BOOKE
327 /*
328 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
329 */
330 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
331 DBCR1_IAC3US | DBCR1_IAC4US;
332 /*
333 * Force Data Address Compare User/Supervisor bits to be User-only
334 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
335 */
336 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
337#else
338 thread->dbcr1 = 0;
339#endif
340}
341
342static void prime_debug_regs(struct thread_struct *thread)
343{
Scott Wood6cecf762013-05-13 14:14:53 +0000344 /*
345 * We could have inherited MSR_DE from userspace, since
346 * it doesn't get cleared on exception entry. Make sure
347 * MSR_DE is clear before we enable any debug events.
348 */
349 mtmsr(mfmsr() & ~MSR_DE);
350
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000351 mtspr(SPRN_IAC1, thread->iac1);
352 mtspr(SPRN_IAC2, thread->iac2);
353#if CONFIG_PPC_ADV_DEBUG_IACS > 2
354 mtspr(SPRN_IAC3, thread->iac3);
355 mtspr(SPRN_IAC4, thread->iac4);
356#endif
357 mtspr(SPRN_DAC1, thread->dac1);
358 mtspr(SPRN_DAC2, thread->dac2);
359#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
360 mtspr(SPRN_DVC1, thread->dvc1);
361 mtspr(SPRN_DVC2, thread->dvc2);
362#endif
363 mtspr(SPRN_DBCR0, thread->dbcr0);
364 mtspr(SPRN_DBCR1, thread->dbcr1);
365#ifdef CONFIG_BOOKE
366 mtspr(SPRN_DBCR2, thread->dbcr2);
367#endif
368}
369/*
370 * Unless neither the old or new thread are making use of the
371 * debug registers, set the debug registers from the values
372 * stored in the new thread.
373 */
374static void switch_booke_debug_regs(struct thread_struct *new_thread)
375{
376 if ((current->thread.dbcr0 & DBCR0_IDM)
377 || (new_thread->dbcr0 & DBCR0_IDM))
378 prime_debug_regs(new_thread);
379}
380#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
K.Prasade0780b72011-02-10 04:44:35 +0000381#ifndef CONFIG_HAVE_HW_BREAKPOINT
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000382static void set_debug_reg_defaults(struct thread_struct *thread)
383{
Michael Neuling9422de32012-12-20 14:06:44 +0000384 thread->hw_brk.address = 0;
385 thread->hw_brk.type = 0;
Michael Neulingb9818c32013-01-10 14:25:34 +0000386 set_breakpoint(&thread->hw_brk);
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000387}
K.Prasade0780b72011-02-10 04:44:35 +0000388#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000389#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
390
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000391#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Michael Neuling9422de32012-12-20 14:06:44 +0000392static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
393{
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000394 mtspr(SPRN_DAC1, dabr);
Dave Kleikamp221c1852010-03-05 10:43:24 +0000395#ifdef CONFIG_PPC_47x
396 isync();
397#endif
Michael Neuling9422de32012-12-20 14:06:44 +0000398 return 0;
399}
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000400#elif defined(CONFIG_PPC_BOOK3S)
Michael Neuling9422de32012-12-20 14:06:44 +0000401static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
402{
Michael Ellermancab0af92005-11-03 15:30:49 +1100403 mtspr(SPRN_DABR, dabr);
Michael Neuling82a9f162013-05-16 20:27:31 +0000404 if (cpu_has_feature(CPU_FTR_DABRX))
405 mtspr(SPRN_DABRX, dabrx);
Michael Ellermancab0af92005-11-03 15:30:49 +1100406 return 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000407}
Michael Neuling9422de32012-12-20 14:06:44 +0000408#else
409static inline int __set_dabr(unsigned long dabr, unsigned long dabrx)
410{
411 return -EINVAL;
412}
413#endif
414
415static inline int set_dabr(struct arch_hw_breakpoint *brk)
416{
417 unsigned long dabr, dabrx;
418
419 dabr = brk->address | (brk->type & HW_BRK_TYPE_DABR);
420 dabrx = ((brk->type >> 3) & 0x7);
421
422 if (ppc_md.set_dabr)
423 return ppc_md.set_dabr(dabr, dabrx);
424
425 return __set_dabr(dabr, dabrx);
426}
427
Michael Neulingbf99de32012-12-20 14:06:45 +0000428static inline int set_dawr(struct arch_hw_breakpoint *brk)
429{
Michael Neuling05d694e2013-01-24 15:02:58 +0000430 unsigned long dawr, dawrx, mrd;
Michael Neulingbf99de32012-12-20 14:06:45 +0000431
432 dawr = brk->address;
433
434 dawrx = (brk->type & (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)) \
435 << (63 - 58); //* read/write bits */
436 dawrx |= ((brk->type & (HW_BRK_TYPE_TRANSLATE)) >> 2) \
437 << (63 - 59); //* translate */
438 dawrx |= (brk->type & (HW_BRK_TYPE_PRIV_ALL)) \
439 >> 3; //* PRIM bits */
Michael Neuling05d694e2013-01-24 15:02:58 +0000440 /* dawr length is stored in field MDR bits 48:53. Matches range in
441 doublewords (64 bits) baised by -1 eg. 0b000000=1DW and
442 0b111111=64DW.
443 brk->len is in bytes.
444 This aligns up to double word size, shifts and does the bias.
445 */
446 mrd = ((brk->len + 7) >> 3) - 1;
447 dawrx |= (mrd & 0x3f) << (63 - 53);
Michael Neulingbf99de32012-12-20 14:06:45 +0000448
449 if (ppc_md.set_dawr)
450 return ppc_md.set_dawr(dawr, dawrx);
451 mtspr(SPRN_DAWR, dawr);
452 mtspr(SPRN_DAWRX, dawrx);
453 return 0;
454}
455
Michael Neulingb9818c32013-01-10 14:25:34 +0000456int set_breakpoint(struct arch_hw_breakpoint *brk)
Michael Neuling9422de32012-12-20 14:06:44 +0000457{
458 __get_cpu_var(current_brk) = *brk;
459
Michael Neulingbf99de32012-12-20 14:06:45 +0000460 if (cpu_has_feature(CPU_FTR_DAWR))
461 return set_dawr(brk);
462
Michael Neuling9422de32012-12-20 14:06:44 +0000463 return set_dabr(brk);
464}
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000465
Paul Mackerras06d67d52005-10-10 22:29:05 +1000466#ifdef CONFIG_PPC64
467DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000468#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000469
Michael Neuling9422de32012-12-20 14:06:44 +0000470static inline bool hw_brk_match(struct arch_hw_breakpoint *a,
471 struct arch_hw_breakpoint *b)
472{
473 if (a->address != b->address)
474 return false;
475 if (a->type != b->type)
476 return false;
477 if (a->len != b->len)
478 return false;
479 return true;
480}
Michael Neulingfb096922013-02-13 16:21:37 +0000481#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
482static inline void tm_reclaim_task(struct task_struct *tsk)
483{
484 /* We have to work out if we're switching from/to a task that's in the
485 * middle of a transaction.
486 *
487 * In switching we need to maintain a 2nd register state as
488 * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the
489 * checkpointed (tbegin) state in ckpt_regs and saves the transactional
490 * (current) FPRs into oldtask->thread.transact_fpr[].
491 *
492 * We also context switch (save) TFHAR/TEXASR/TFIAR in here.
493 */
494 struct thread_struct *thr = &tsk->thread;
495
496 if (!thr->regs)
497 return;
498
499 if (!MSR_TM_ACTIVE(thr->regs->msr))
500 goto out_and_saveregs;
501
502 /* Stash the original thread MSR, as giveup_fpu et al will
503 * modify it. We hold onto it to see whether the task used
504 * FP & vector regs.
505 */
506 thr->tm_orig_msr = thr->regs->msr;
507
508 TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "
509 "ccr=%lx, msr=%lx, trap=%lx)\n",
510 tsk->pid, thr->regs->nip,
511 thr->regs->ccr, thr->regs->msr,
512 thr->regs->trap);
513
514 tm_reclaim(thr, thr->regs->msr, TM_CAUSE_RESCHED);
515
516 TM_DEBUG("--- tm_reclaim on pid %d complete\n",
517 tsk->pid);
518
519out_and_saveregs:
520 /* Always save the regs here, even if a transaction's not active.
521 * This context-switches a thread's TM info SPRs. We do it here to
522 * be consistent with the restore path (in recheckpoint) which
523 * cannot happen later in _switch().
524 */
525 tm_save_sprs(thr);
526}
527
Michael Neulingbc2a9402013-02-13 16:21:40 +0000528static inline void tm_recheckpoint_new_task(struct task_struct *new)
Michael Neulingfb096922013-02-13 16:21:37 +0000529{
530 unsigned long msr;
531
532 if (!cpu_has_feature(CPU_FTR_TM))
533 return;
534
535 /* Recheckpoint the registers of the thread we're about to switch to.
536 *
537 * If the task was using FP, we non-lazily reload both the original and
538 * the speculative FP register states. This is because the kernel
539 * doesn't see if/when a TM rollback occurs, so if we take an FP
540 * unavoidable later, we are unable to determine which set of FP regs
541 * need to be restored.
542 */
543 if (!new->thread.regs)
544 return;
545
546 /* The TM SPRs are restored here, so that TEXASR.FS can be set
547 * before the trecheckpoint and no explosion occurs.
548 */
549 tm_restore_sprs(&new->thread);
550
551 if (!MSR_TM_ACTIVE(new->thread.regs->msr))
552 return;
553 msr = new->thread.tm_orig_msr;
554 /* Recheckpoint to restore original checkpointed register state. */
555 TM_DEBUG("*** tm_recheckpoint of pid %d "
556 "(new->msr 0x%lx, new->origmsr 0x%lx)\n",
557 new->pid, new->thread.regs->msr, msr);
558
559 /* This loads the checkpointed FP/VEC state, if used */
560 tm_recheckpoint(&new->thread, msr);
561
562 /* This loads the speculative FP/VEC state, if used */
563 if (msr & MSR_FP) {
564 do_load_up_transact_fpu(&new->thread);
565 new->thread.regs->msr |=
566 (MSR_FP | new->thread.fpexc_mode);
567 }
Michael Neulingf110c0c2013-04-09 16:18:55 +1000568#ifdef CONFIG_ALTIVEC
Michael Neulingfb096922013-02-13 16:21:37 +0000569 if (msr & MSR_VEC) {
570 do_load_up_transact_altivec(&new->thread);
571 new->thread.regs->msr |= MSR_VEC;
572 }
Michael Neulingf110c0c2013-04-09 16:18:55 +1000573#endif
Michael Neulingfb096922013-02-13 16:21:37 +0000574 /* We may as well turn on VSX too since all the state is restored now */
575 if (msr & MSR_VSX)
576 new->thread.regs->msr |= MSR_VSX;
577
578 TM_DEBUG("*** tm_recheckpoint of pid %d complete "
579 "(kernel msr 0x%lx)\n",
580 new->pid, mfmsr());
581}
582
583static inline void __switch_to_tm(struct task_struct *prev)
584{
585 if (cpu_has_feature(CPU_FTR_TM)) {
586 tm_enable();
587 tm_reclaim_task(prev);
588 }
589}
590#else
591#define tm_recheckpoint_new_task(new)
592#define __switch_to_tm(prev)
593#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
Michael Neuling9422de32012-12-20 14:06:44 +0000594
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000595struct task_struct *__switch_to(struct task_struct *prev,
596 struct task_struct *new)
597{
598 struct thread_struct *new_thread, *old_thread;
599 unsigned long flags;
600 struct task_struct *last;
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700601#ifdef CONFIG_PPC_BOOK3S_64
602 struct ppc64_tlb_batch *batch;
603#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000604
Michael Neulingc2d52642013-08-09 17:29:30 +1000605 /* Back up the TAR across context switches.
606 * Note that the TAR is not available for use in the kernel. (To
607 * provide this, the TAR should be backed up/restored on exception
608 * entry/exit instead, and be in pt_regs. FIXME, this should be in
609 * pt_regs anyway (for debug).)
610 * Save the TAR here before we do treclaim/trecheckpoint as these
611 * will change the TAR.
612 */
613 save_tar(&prev->thread);
614
Michael Neulingbc2a9402013-02-13 16:21:40 +0000615 __switch_to_tm(prev);
616
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000617#ifdef CONFIG_SMP
618 /* avoid complexity of lazy save/restore of fpu
619 * by just saving it every time we switch out if
620 * this task used the fpu during the last quantum.
621 *
622 * If it tries to use the fpu again, it'll trap and
623 * reload its fp regs. So we don't have to do a restore
624 * every switch, just a save.
625 * -- Cort
626 */
627 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
628 giveup_fpu(prev);
629#ifdef CONFIG_ALTIVEC
630 /*
631 * If the previous thread used altivec in the last quantum
632 * (thus changing altivec regs) then save them.
633 * We used to check the VRSAVE register but not all apps
634 * set it, so we don't rely on it now (and in fact we need
635 * to save & restore VSCR even if VRSAVE == 0). -- paulus
636 *
637 * On SMP we always save/restore altivec regs just to avoid the
638 * complexity of changing processors.
639 * -- Cort
640 */
641 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
642 giveup_altivec(prev);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000643#endif /* CONFIG_ALTIVEC */
Michael Neulingce48b212008-06-25 14:07:18 +1000644#ifdef CONFIG_VSX
645 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
Michael Neuling7c292172008-07-11 16:29:12 +1000646 /* VMX and FPU registers are already save here */
647 __giveup_vsx(prev);
Michael Neulingce48b212008-06-25 14:07:18 +1000648#endif /* CONFIG_VSX */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000649#ifdef CONFIG_SPE
650 /*
651 * If the previous thread used spe in the last quantum
652 * (thus changing spe regs) then save them.
653 *
654 * On SMP we always save/restore spe regs just to avoid the
655 * complexity of changing processors.
656 */
657 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
658 giveup_spe(prev);
Paul Mackerrasc0c0d992005-10-01 13:49:08 +1000659#endif /* CONFIG_SPE */
660
661#else /* CONFIG_SMP */
662#ifdef CONFIG_ALTIVEC
663 /* Avoid the trap. On smp this this never happens since
664 * we don't set last_task_used_altivec -- Cort
665 */
666 if (new->thread.regs && last_task_used_altivec == new)
667 new->thread.regs->msr |= MSR_VEC;
668#endif /* CONFIG_ALTIVEC */
Michael Neulingce48b212008-06-25 14:07:18 +1000669#ifdef CONFIG_VSX
670 if (new->thread.regs && last_task_used_vsx == new)
671 new->thread.regs->msr |= MSR_VSX;
672#endif /* CONFIG_VSX */
Paul Mackerrasc0c0d992005-10-01 13:49:08 +1000673#ifdef CONFIG_SPE
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000674 /* Avoid the trap. On smp this this never happens since
675 * we don't set last_task_used_spe
676 */
677 if (new->thread.regs && last_task_used_spe == new)
678 new->thread.regs->msr |= MSR_SPE;
679#endif /* CONFIG_SPE */
Paul Mackerrasc0c0d992005-10-01 13:49:08 +1000680
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000681#endif /* CONFIG_SMP */
682
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000683#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000684 switch_booke_debug_regs(&new->thread);
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000685#else
K.Prasad5aae8a52010-06-15 11:35:19 +0530686/*
687 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
688 * schedule DABR
689 */
690#ifndef CONFIG_HAVE_HW_BREAKPOINT
Michael Neuling9422de32012-12-20 14:06:44 +0000691 if (unlikely(hw_brk_match(&__get_cpu_var(current_brk), &new->thread.hw_brk)))
Michael Neulingb9818c32013-01-10 14:25:34 +0000692 set_breakpoint(&new->thread.hw_brk);
K.Prasad5aae8a52010-06-15 11:35:19 +0530693#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Luis Machadod6a61bf2008-07-24 02:10:41 +1000694#endif
695
Benjamin Herrenschmidtc6c9eac2009-09-08 14:16:58 +0000696
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000697 new_thread = &new->thread;
698 old_thread = &current->thread;
Paul Mackerras06d67d52005-10-10 22:29:05 +1000699
700#ifdef CONFIG_PPC64
701 /*
702 * Collect processor utilization data per process
703 */
704 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
705 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
706 long unsigned start_tb, current_tb;
707 start_tb = old_thread->start_tb;
708 cu->current_tb = current_tb = mfspr(SPRN_PURR);
709 old_thread->accum_tb += (current_tb - start_tb);
710 new_thread->start_tb = current_tb;
711 }
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700712#endif /* CONFIG_PPC64 */
713
714#ifdef CONFIG_PPC_BOOK3S_64
715 batch = &__get_cpu_var(ppc64_tlb_batch);
716 if (batch->active) {
717 current_thread_info()->local_flags |= _TLF_LAZY_MMU;
718 if (batch->index)
719 __flush_tlb_pending(batch);
720 batch->active = 0;
721 }
722#endif /* CONFIG_PPC_BOOK3S_64 */
Paul Mackerras06d67d52005-10-10 22:29:05 +1000723
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000724 local_irq_save(flags);
Paul Mackerrasc6622f62006-02-24 10:06:59 +1100725
Anton Blanchard44387e92008-03-17 15:27:09 +1100726 /*
727 * We can't take a PMU exception inside _switch() since there is a
728 * window where the kernel stack SLB and the kernel stack are out
729 * of sync. Hard disable here.
730 */
731 hard_irq_disable();
Michael Neulingbc2a9402013-02-13 16:21:40 +0000732
733 tm_recheckpoint_new_task(new);
734
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000735 last = _switch(old_thread, new_thread);
736
Peter Zijlstrad6bf29b2011-05-24 17:11:48 -0700737#ifdef CONFIG_PPC_BOOK3S_64
738 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
739 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
740 batch = &__get_cpu_var(ppc64_tlb_batch);
741 batch->active = 1;
742 }
743#endif /* CONFIG_PPC_BOOK3S_64 */
744
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000745 local_irq_restore(flags);
746
747 return last;
748}
749
Paul Mackerras06d67d52005-10-10 22:29:05 +1000750static int instructions_to_print = 16;
751
Paul Mackerras06d67d52005-10-10 22:29:05 +1000752static void show_instructions(struct pt_regs *regs)
753{
754 int i;
755 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
756 sizeof(int));
757
758 printk("Instruction dump:");
759
760 for (i = 0; i < instructions_to_print; i++) {
761 int instr;
762
763 if (!(i % 8))
764 printk("\n");
765
Scott Wood0de2d822007-09-28 04:38:55 +1000766#if !defined(CONFIG_BOOKE)
767 /* If executing with the IMMU off, adjust pc rather
768 * than print XXXXXXXX.
769 */
770 if (!(regs->msr & MSR_IR))
771 pc = (unsigned long)phys_to_virt(pc);
772#endif
773
Stephen Rothwellaf308372006-03-23 17:38:10 +1100774 /* We use __get_user here *only* to avoid an OOPS on a
775 * bad address because the pc *should* only be a
776 * kernel address.
777 */
Anton Blanchard00ae36d2006-10-13 12:17:16 +1000778 if (!__kernel_text_address(pc) ||
779 __get_user(instr, (unsigned int __user *)pc)) {
Ira Snyder40c8cef2012-01-06 12:34:07 +0000780 printk(KERN_CONT "XXXXXXXX ");
Paul Mackerras06d67d52005-10-10 22:29:05 +1000781 } else {
782 if (regs->nip == pc)
Ira Snyder40c8cef2012-01-06 12:34:07 +0000783 printk(KERN_CONT "<%08x> ", instr);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000784 else
Ira Snyder40c8cef2012-01-06 12:34:07 +0000785 printk(KERN_CONT "%08x ", instr);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000786 }
787
788 pc += sizeof(int);
789 }
790
791 printk("\n");
792}
793
794static struct regbit {
795 unsigned long bit;
796 const char *name;
797} msr_bits[] = {
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000798#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
799 {MSR_SF, "SF"},
800 {MSR_HV, "HV"},
801#endif
802 {MSR_VEC, "VEC"},
803 {MSR_VSX, "VSX"},
804#ifdef CONFIG_BOOKE
805 {MSR_CE, "CE"},
806#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +1000807 {MSR_EE, "EE"},
808 {MSR_PR, "PR"},
809 {MSR_FP, "FP"},
810 {MSR_ME, "ME"},
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000811#ifdef CONFIG_BOOKE
Kumar Gala1b983262008-11-19 04:39:53 +0000812 {MSR_DE, "DE"},
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000813#else
814 {MSR_SE, "SE"},
815 {MSR_BE, "BE"},
816#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +1000817 {MSR_IR, "IR"},
818 {MSR_DR, "DR"},
Anton Blanchard3bfd0c9c2011-11-24 19:35:57 +0000819 {MSR_PMM, "PMM"},
820#ifndef CONFIG_BOOKE
821 {MSR_RI, "RI"},
822 {MSR_LE, "LE"},
823#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +1000824 {0, NULL}
825};
826
827static void printbits(unsigned long val, struct regbit *bits)
828{
829 const char *sep = "";
830
831 printk("<");
832 for (; bits->bit; ++bits)
833 if (val & bits->bit) {
834 printk("%s%s", sep, bits->name);
835 sep = ",";
836 }
837 printk(">");
838}
839
840#ifdef CONFIG_PPC64
anton@samba.orgf6f7dde2007-03-20 20:38:19 -0500841#define REG "%016lx"
Paul Mackerras06d67d52005-10-10 22:29:05 +1000842#define REGS_PER_LINE 4
843#define LAST_VOLATILE 13
844#else
anton@samba.orgf6f7dde2007-03-20 20:38:19 -0500845#define REG "%08lx"
Paul Mackerras06d67d52005-10-10 22:29:05 +1000846#define REGS_PER_LINE 8
847#define LAST_VOLATILE 12
848#endif
849
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000850void show_regs(struct pt_regs * regs)
851{
852 int i, trap;
853
Tejun Heoa43cb952013-04-30 15:27:17 -0700854 show_regs_print_info(KERN_DEFAULT);
855
Paul Mackerras06d67d52005-10-10 22:29:05 +1000856 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
857 regs->nip, regs->link, regs->ctr);
858 printk("REGS: %p TRAP: %04lx %s (%s)\n",
Serge E. Hallyn96b644b2006-10-02 02:18:13 -0700859 regs, regs->trap, print_tainted(), init_utsname()->release);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000860 printk("MSR: "REG" ", regs->msr);
861 printbits(regs->msr, msr_bits);
anton@samba.orgf6f7dde2007-03-20 20:38:19 -0500862 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100863#ifdef CONFIG_PPC64
864 printk("SOFTE: %ld\n", regs->softe);
865#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000866 trap = TRAP(regs);
Michael Neuling5115a022011-07-14 19:25:12 +0000867 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
868 printk("CFAR: "REG"\n", regs->orig_gpr3);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000869 if (trap == 0x300 || trap == 0x600)
Kumar Galaba28c9a2011-10-06 02:53:38 +0000870#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
Kumar Gala14170782007-07-26 00:46:15 -0500871 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
872#else
Anton Blanchard70718542011-01-11 19:44:30 +0000873 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
Kumar Gala14170782007-07-26 00:46:15 -0500874#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000875
876 for (i = 0; i < 32; i++) {
Paul Mackerras06d67d52005-10-10 22:29:05 +1000877 if ((i % REGS_PER_LINE) == 0)
Kumar Galaa2367192009-06-18 22:29:55 +0000878 printk("\nGPR%02d: ", i);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000879 printk(REG " ", regs->gpr[i]);
880 if (i == LAST_VOLATILE && !FULL_REGS(regs))
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000881 break;
882 }
883 printk("\n");
884#ifdef CONFIG_KALLSYMS
885 /*
886 * Lookup NIP late so we have the best change of getting the
887 * above info out without failing
888 */
Benjamin Herrenschmidt058c78f2008-07-07 13:44:31 +1000889 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
890 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000891#endif
Michael Neulingafc07702013-02-13 16:21:34 +0000892#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
893 printk("PACATMSCRATCH [%llx]\n", get_paca()->tm_scratch);
894#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000895 show_stack(current, (unsigned long *) regs->gpr[1]);
Paul Mackerras06d67d52005-10-10 22:29:05 +1000896 if (!user_mode(regs))
897 show_instructions(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000898}
899
900void exit_thread(void)
901{
Paul Mackerras48abec02005-11-30 13:20:54 +1100902 discard_lazy_cpu_state();
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000903}
904
905void flush_thread(void)
906{
Paul Mackerras48abec02005-11-30 13:20:54 +1100907 discard_lazy_cpu_state();
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000908
K.Prasade0780b72011-02-10 04:44:35 +0000909#ifdef CONFIG_HAVE_HW_BREAKPOINT
K.Prasad5aae8a52010-06-15 11:35:19 +0530910 flush_ptrace_hw_breakpoint(current);
K.Prasade0780b72011-02-10 04:44:35 +0000911#else /* CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +0000912 set_debug_reg_defaults(&current->thread);
K.Prasade0780b72011-02-10 04:44:35 +0000913#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000914}
915
916void
917release_thread(struct task_struct *t)
918{
919}
920
921/*
Suresh Siddha55ccf3f2012-05-16 15:03:51 -0700922 * this gets called so that we can store coprocessor state into memory and
923 * copy the current task into the new thread.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000924 */
Suresh Siddha55ccf3f2012-05-16 15:03:51 -0700925int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000926{
Suresh Siddha55ccf3f2012-05-16 15:03:51 -0700927 flush_fp_to_thread(src);
928 flush_altivec_to_thread(src);
929 flush_vsx_to_thread(src);
930 flush_spe_to_thread(src);
Michael Ellerman330a1eb2013-06-28 18:15:16 +1000931
Suresh Siddha55ccf3f2012-05-16 15:03:51 -0700932 *dst = *src;
Michael Ellerman330a1eb2013-06-28 18:15:16 +1000933
934 clear_task_ebb(dst);
935
Suresh Siddha55ccf3f2012-05-16 15:03:51 -0700936 return 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000937}
938
939/*
940 * Copy a thread..
941 */
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +0000942extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
943
Alexey Dobriyan6f2c55b2009-04-02 16:56:59 -0700944int copy_thread(unsigned long clone_flags, unsigned long usp,
Al Viroafa86fc2012-10-22 22:51:14 -0400945 unsigned long arg, struct task_struct *p)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000946{
947 struct pt_regs *childregs, *kregs;
948 extern void ret_from_fork(void);
Al Viro58254e12012-09-12 18:32:42 -0400949 extern void ret_from_kernel_thread(void);
950 void (*f)(void);
Al Viro0cec6fd2006-01-12 01:06:02 -0800951 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000952
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000953 /* Copy registers */
954 sp -= sizeof(struct pt_regs);
955 childregs = (struct pt_regs *) sp;
Al Viroab758192012-10-21 22:33:39 -0400956 if (unlikely(p->flags & PF_KTHREAD)) {
Al Viro138d1ce2012-10-11 08:41:43 -0400957 struct thread_info *ti = (void *)task_stack_page(p);
Al Viro58254e12012-09-12 18:32:42 -0400958 memset(childregs, 0, sizeof(struct pt_regs));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000959 childregs->gpr[1] = sp + sizeof(struct pt_regs);
Al Viro53b50f92012-10-21 16:50:34 -0400960 childregs->gpr[14] = usp; /* function */
Al Viro58254e12012-09-12 18:32:42 -0400961#ifdef CONFIG_PPC64
Al Virob5e2fc12006-01-12 01:06:01 -0800962 clear_tsk_thread_flag(p, TIF_32BIT);
Al Viro138d1ce2012-10-11 08:41:43 -0400963 childregs->softe = 1;
Paul Mackerras06d67d52005-10-10 22:29:05 +1000964#endif
Al Viro58254e12012-09-12 18:32:42 -0400965 childregs->gpr[15] = arg;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000966 p->thread.regs = NULL; /* no user register state */
Al Viro138d1ce2012-10-11 08:41:43 -0400967 ti->flags |= _TIF_RESTOREALL;
Al Viro58254e12012-09-12 18:32:42 -0400968 f = ret_from_kernel_thread;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000969 } else {
Al Viroafa86fc2012-10-22 22:51:14 -0400970 struct pt_regs *regs = current_pt_regs();
Al Viro58254e12012-09-12 18:32:42 -0400971 CHECK_FULL_REGS(regs);
972 *childregs = *regs;
Al Viroea516b12012-10-21 22:28:43 -0400973 if (usp)
974 childregs->gpr[1] = usp;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000975 p->thread.regs = childregs;
Al Viro58254e12012-09-12 18:32:42 -0400976 childregs->gpr[3] = 0; /* Result from fork() */
Paul Mackerras06d67d52005-10-10 22:29:05 +1000977 if (clone_flags & CLONE_SETTLS) {
978#ifdef CONFIG_PPC64
Denis Kirjanov9904b002010-07-29 22:04:39 +0000979 if (!is_32bit_task())
Paul Mackerras06d67d52005-10-10 22:29:05 +1000980 childregs->gpr[13] = childregs->gpr[6];
981 else
982#endif
983 childregs->gpr[2] = childregs->gpr[6];
984 }
Al Viro58254e12012-09-12 18:32:42 -0400985
986 f = ret_from_fork;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000987 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000988 sp -= STACK_FRAME_OVERHEAD;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000989
990 /*
991 * The way this works is that at some point in the future
992 * some task will call _switch to switch to the new task.
993 * That will pop off the stack frame created below and start
994 * the new task running at ret_from_fork. The new task will
995 * do some house keeping and then return from the fork or clone
996 * system call, using the stack frame created above.
997 */
Li Zhongaf945cf2013-05-06 22:44:41 +0000998 ((unsigned long *)sp)[0] = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000999 sp -= sizeof(struct pt_regs);
1000 kregs = (struct pt_regs *) sp;
1001 sp -= STACK_FRAME_OVERHEAD;
1002 p->thread.ksp = sp;
Kumar Gala85218822008-04-28 16:21:22 +10001003 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
1004 _ALIGN_UP(sizeof(struct thread_info), 16);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001005
Oleg Nesterov28d170a2013-04-21 06:47:59 +00001006#ifdef CONFIG_HAVE_HW_BREAKPOINT
1007 p->thread.ptrace_bps[0] = NULL;
1008#endif
1009
Benjamin Herrenschmidt94491682009-06-02 21:17:45 +00001010#ifdef CONFIG_PPC_STD_MMU_64
Matt Evans44ae3ab2011-04-06 19:48:50 +00001011 if (mmu_has_feature(MMU_FTR_SLB)) {
Paul Mackerras1189be62007-10-11 20:37:10 +10001012 unsigned long sp_vsid;
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +11001013 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001014
Matt Evans44ae3ab2011-04-06 19:48:50 +00001015 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
Paul Mackerras1189be62007-10-11 20:37:10 +10001016 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
1017 << SLB_VSID_SHIFT_1T;
1018 else
1019 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
1020 << SLB_VSID_SHIFT;
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +11001021 sp_vsid |= SLB_VSID_KERNEL | llp;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001022 p->thread.ksp_vsid = sp_vsid;
1023 }
Benjamin Herrenschmidt747bea92009-07-23 23:15:27 +00001024#endif /* CONFIG_PPC_STD_MMU_64 */
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001025#ifdef CONFIG_PPC64
1026 if (cpu_has_feature(CPU_FTR_DSCR)) {
Anton Blanchard1021cb22012-09-03 16:49:47 +00001027 p->thread.dscr_inherit = current->thread.dscr_inherit;
1028 p->thread.dscr = current->thread.dscr;
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001029 }
Haren Myneni92779242012-12-06 21:49:56 +00001030 if (cpu_has_feature(CPU_FTR_HAS_PPR))
1031 p->thread.ppr = INIT_PPR;
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +00001032#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +10001033 /*
1034 * The PPC64 ABI makes use of a TOC to contain function
1035 * pointers. The function (ret_from_except) is actually a pointer
1036 * to the TOC entry. The first entry is a pointer to the actual
1037 * function.
Al Viro58254e12012-09-12 18:32:42 -04001038 */
Benjamin Herrenschmidt747bea92009-07-23 23:15:27 +00001039#ifdef CONFIG_PPC64
Al Viro58254e12012-09-12 18:32:42 -04001040 kregs->nip = *((unsigned long *)f);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001041#else
Al Viro58254e12012-09-12 18:32:42 -04001042 kregs->nip = (unsigned long)f;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001043#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001044 return 0;
1045}
1046
1047/*
1048 * Set up a thread for executing a new program
1049 */
Paul Mackerras06d67d52005-10-10 22:29:05 +10001050void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001051{
Michael Ellerman90eac722005-10-21 16:01:33 +10001052#ifdef CONFIG_PPC64
1053 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
1054#endif
1055
Paul Mackerras06d67d52005-10-10 22:29:05 +10001056 /*
1057 * If we exec out of a kernel thread then thread.regs will not be
1058 * set. Do it now.
1059 */
1060 if (!current->thread.regs) {
Al Viro0cec6fd2006-01-12 01:06:02 -08001061 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
1062 current->thread.regs = regs - 1;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001063 }
1064
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001065 memset(regs->gpr, 0, sizeof(regs->gpr));
1066 regs->ctr = 0;
1067 regs->link = 0;
1068 regs->xer = 0;
1069 regs->ccr = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001070 regs->gpr[1] = sp;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001071
Roland McGrath474f8192007-09-24 16:52:44 -07001072 /*
1073 * We have just cleared all the nonvolatile GPRs, so make
1074 * FULL_REGS(regs) return true. This is necessary to allow
1075 * ptrace to examine the thread immediately after exec.
1076 */
1077 regs->trap &= ~1UL;
1078
Paul Mackerras06d67d52005-10-10 22:29:05 +10001079#ifdef CONFIG_PPC32
1080 regs->mq = 0;
1081 regs->nip = start;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001082 regs->msr = MSR_USER;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001083#else
Denis Kirjanov9904b002010-07-29 22:04:39 +00001084 if (!is_32bit_task()) {
Michael Ellerman90eac722005-10-21 16:01:33 +10001085 unsigned long entry, toc;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001086
1087 /* start is a relocated pointer to the function descriptor for
1088 * the elf _start routine. The first entry in the function
1089 * descriptor is the entry address of _start and the second
1090 * entry is the TOC value we need to use.
1091 */
1092 __get_user(entry, (unsigned long __user *)start);
1093 __get_user(toc, (unsigned long __user *)start+1);
1094
1095 /* Check whether the e_entry function descriptor entries
1096 * need to be relocated before we can use them.
1097 */
1098 if (load_addr != 0) {
1099 entry += load_addr;
1100 toc += load_addr;
1101 }
1102 regs->nip = entry;
1103 regs->gpr[2] = toc;
1104 regs->msr = MSR_USER64;
Stephen Rothwelld4bf9a72005-10-13 13:40:54 +10001105 } else {
1106 regs->nip = start;
1107 regs->gpr[2] = 0;
1108 regs->msr = MSR_USER32;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001109 }
1110#endif
Paul Mackerras48abec02005-11-30 13:20:54 +11001111 discard_lazy_cpu_state();
Michael Neulingce48b212008-06-25 14:07:18 +10001112#ifdef CONFIG_VSX
1113 current->thread.used_vsr = 0;
1114#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001115 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
David Gibson25c8a782005-10-27 16:27:25 +10001116 current->thread.fpscr.val = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001117#ifdef CONFIG_ALTIVEC
1118 memset(current->thread.vr, 0, sizeof(current->thread.vr));
1119 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
Paul Mackerras06d67d52005-10-10 22:29:05 +10001120 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001121 current->thread.vrsave = 0;
1122 current->thread.used_vr = 0;
1123#endif /* CONFIG_ALTIVEC */
1124#ifdef CONFIG_SPE
1125 memset(current->thread.evr, 0, sizeof(current->thread.evr));
1126 current->thread.acc = 0;
1127 current->thread.spefscr = 0;
1128 current->thread.used_spe = 0;
1129#endif /* CONFIG_SPE */
Michael Neulingbc2a9402013-02-13 16:21:40 +00001130#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1131 if (cpu_has_feature(CPU_FTR_TM))
1132 regs->msr |= MSR_TM;
1133 current->thread.tm_tfhar = 0;
1134 current->thread.tm_texasr = 0;
1135 current->thread.tm_tfiar = 0;
1136#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001137}
1138
1139#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
1140 | PR_FP_EXC_RES | PR_FP_EXC_INV)
1141
1142int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
1143{
1144 struct pt_regs *regs = tsk->thread.regs;
1145
1146 /* This is a bit hairy. If we are an SPE enabled processor
1147 * (have embedded fp) we store the IEEE exception enable flags in
1148 * fpexc_mode. fpexc_mode is also used for setting FP exception
1149 * mode (asyn, precise, disabled) for 'Classic' FP. */
1150 if (val & PR_FP_EXC_SW_ENABLE) {
1151#ifdef CONFIG_SPE
Kumar Gala5e14d212007-09-13 01:44:20 -05001152 if (cpu_has_feature(CPU_FTR_SPE)) {
1153 tsk->thread.fpexc_mode = val &
1154 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
1155 return 0;
1156 } else {
1157 return -EINVAL;
1158 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001159#else
1160 return -EINVAL;
1161#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001162 }
Paul Mackerras06d67d52005-10-10 22:29:05 +10001163
1164 /* on a CONFIG_SPE this does not hurt us. The bits that
1165 * __pack_fe01 use do not overlap with bits used for
1166 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
1167 * on CONFIG_SPE implementations are reserved so writing to
1168 * them does not change anything */
1169 if (val > PR_FP_EXC_PRECISE)
1170 return -EINVAL;
1171 tsk->thread.fpexc_mode = __pack_fe01(val);
1172 if (regs != NULL && (regs->msr & MSR_FP) != 0)
1173 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
1174 | tsk->thread.fpexc_mode;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001175 return 0;
1176}
1177
1178int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
1179{
1180 unsigned int val;
1181
1182 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
1183#ifdef CONFIG_SPE
Kumar Gala5e14d212007-09-13 01:44:20 -05001184 if (cpu_has_feature(CPU_FTR_SPE))
1185 val = tsk->thread.fpexc_mode;
1186 else
1187 return -EINVAL;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001188#else
1189 return -EINVAL;
1190#endif
1191 else
1192 val = __unpack_fe01(tsk->thread.fpexc_mode);
1193 return put_user(val, (unsigned int __user *) adr);
1194}
1195
Paul Mackerrasfab5db92006-06-07 16:14:40 +10001196int set_endian(struct task_struct *tsk, unsigned int val)
1197{
1198 struct pt_regs *regs = tsk->thread.regs;
1199
1200 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
1201 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
1202 return -EINVAL;
1203
1204 if (regs == NULL)
1205 return -EINVAL;
1206
1207 if (val == PR_ENDIAN_BIG)
1208 regs->msr &= ~MSR_LE;
1209 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
1210 regs->msr |= MSR_LE;
1211 else
1212 return -EINVAL;
1213
1214 return 0;
1215}
1216
1217int get_endian(struct task_struct *tsk, unsigned long adr)
1218{
1219 struct pt_regs *regs = tsk->thread.regs;
1220 unsigned int val;
1221
1222 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
1223 !cpu_has_feature(CPU_FTR_REAL_LE))
1224 return -EINVAL;
1225
1226 if (regs == NULL)
1227 return -EINVAL;
1228
1229 if (regs->msr & MSR_LE) {
1230 if (cpu_has_feature(CPU_FTR_REAL_LE))
1231 val = PR_ENDIAN_LITTLE;
1232 else
1233 val = PR_ENDIAN_PPC_LITTLE;
1234 } else
1235 val = PR_ENDIAN_BIG;
1236
1237 return put_user(val, (unsigned int __user *)adr);
1238}
1239
Paul Mackerrase9370ae2006-06-07 16:15:39 +10001240int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
1241{
1242 tsk->thread.align_ctl = val;
1243 return 0;
1244}
1245
1246int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
1247{
1248 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
1249}
1250
Paul Mackerrasbb72c482007-02-19 11:42:42 +11001251static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1252 unsigned long nbytes)
1253{
1254 unsigned long stack_page;
1255 unsigned long cpu = task_cpu(p);
1256
1257 /*
1258 * Avoid crashing if the stack has overflowed and corrupted
1259 * task_cpu(p), which is in the thread_info struct.
1260 */
1261 if (cpu < NR_CPUS && cpu_possible(cpu)) {
1262 stack_page = (unsigned long) hardirq_ctx[cpu];
1263 if (sp >= stack_page + sizeof(struct thread_struct)
1264 && sp <= stack_page + THREAD_SIZE - nbytes)
1265 return 1;
1266
1267 stack_page = (unsigned long) softirq_ctx[cpu];
1268 if (sp >= stack_page + sizeof(struct thread_struct)
1269 && sp <= stack_page + THREAD_SIZE - nbytes)
1270 return 1;
1271 }
1272 return 0;
1273}
1274
Anton Blanchard2f251942006-03-27 11:46:18 +11001275int validate_sp(unsigned long sp, struct task_struct *p,
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001276 unsigned long nbytes)
1277{
Al Viro0cec6fd2006-01-12 01:06:02 -08001278 unsigned long stack_page = (unsigned long)task_stack_page(p);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001279
1280 if (sp >= stack_page + sizeof(struct thread_struct)
1281 && sp <= stack_page + THREAD_SIZE - nbytes)
1282 return 1;
1283
Paul Mackerrasbb72c482007-02-19 11:42:42 +11001284 return valid_irq_stack(sp, p, nbytes);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001285}
1286
Anton Blanchard2f251942006-03-27 11:46:18 +11001287EXPORT_SYMBOL(validate_sp);
1288
Paul Mackerras06d67d52005-10-10 22:29:05 +10001289unsigned long get_wchan(struct task_struct *p)
1290{
1291 unsigned long ip, sp;
1292 int count = 0;
1293
1294 if (!p || p == current || p->state == TASK_RUNNING)
1295 return 0;
1296
1297 sp = p->thread.ksp;
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001298 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
Paul Mackerras06d67d52005-10-10 22:29:05 +10001299 return 0;
1300
1301 do {
1302 sp = *(unsigned long *)sp;
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001303 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
Paul Mackerras06d67d52005-10-10 22:29:05 +10001304 return 0;
1305 if (count > 0) {
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001306 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
Paul Mackerras06d67d52005-10-10 22:29:05 +10001307 if (!in_sched_functions(ip))
1308 return ip;
1309 }
1310 } while (count++ < 16);
1311 return 0;
1312}
Paul Mackerras06d67d52005-10-10 22:29:05 +10001313
Johannes Bergc4d04be2008-11-20 03:24:07 +00001314static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001315
1316void show_stack(struct task_struct *tsk, unsigned long *stack)
1317{
Paul Mackerras06d67d52005-10-10 22:29:05 +10001318 unsigned long sp, ip, lr, newsp;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001319 int count = 0;
Paul Mackerras06d67d52005-10-10 22:29:05 +10001320 int firstframe = 1;
Steven Rostedt6794c782009-02-09 21:10:27 -08001321#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1322 int curr_frame = current->curr_ret_stack;
1323 extern void return_to_handler(void);
Steven Rostedt9135c3c2009-09-15 08:20:15 -07001324 unsigned long rth = (unsigned long)return_to_handler;
1325 unsigned long mrth = -1;
Steven Rostedt6794c782009-02-09 21:10:27 -08001326#ifdef CONFIG_PPC64
Steven Rostedt9135c3c2009-09-15 08:20:15 -07001327 extern void mod_return_to_handler(void);
1328 rth = *(unsigned long *)rth;
1329 mrth = (unsigned long)mod_return_to_handler;
1330 mrth = *(unsigned long *)mrth;
Steven Rostedt6794c782009-02-09 21:10:27 -08001331#endif
1332#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001333
1334 sp = (unsigned long) stack;
1335 if (tsk == NULL)
1336 tsk = current;
1337 if (sp == 0) {
1338 if (tsk == current)
1339 asm("mr %0,1" : "=r" (sp));
1340 else
1341 sp = tsk->thread.ksp;
1342 }
1343
Paul Mackerras06d67d52005-10-10 22:29:05 +10001344 lr = 0;
1345 printk("Call Trace:\n");
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001346 do {
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001347 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
Paul Mackerras06d67d52005-10-10 22:29:05 +10001348 return;
1349
1350 stack = (unsigned long *) sp;
1351 newsp = stack[0];
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001352 ip = stack[STACK_FRAME_LR_SAVE];
Paul Mackerras06d67d52005-10-10 22:29:05 +10001353 if (!firstframe || ip != lr) {
Benjamin Herrenschmidt058c78f2008-07-07 13:44:31 +10001354 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
Steven Rostedt6794c782009-02-09 21:10:27 -08001355#ifdef CONFIG_FUNCTION_GRAPH_TRACER
Steven Rostedt9135c3c2009-09-15 08:20:15 -07001356 if ((ip == rth || ip == mrth) && curr_frame >= 0) {
Steven Rostedt6794c782009-02-09 21:10:27 -08001357 printk(" (%pS)",
1358 (void *)current->ret_stack[curr_frame].ret);
1359 curr_frame--;
1360 }
1361#endif
Paul Mackerras06d67d52005-10-10 22:29:05 +10001362 if (firstframe)
1363 printk(" (unreliable)");
1364 printk("\n");
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001365 }
Paul Mackerras06d67d52005-10-10 22:29:05 +10001366 firstframe = 0;
1367
1368 /*
1369 * See if this is an exception frame.
1370 * We look for the "regshere" marker in the current frame.
1371 */
Benjamin Herrenschmidtec2b36b2008-04-17 14:34:59 +10001372 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1373 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
Paul Mackerras06d67d52005-10-10 22:29:05 +10001374 struct pt_regs *regs = (struct pt_regs *)
1375 (sp + STACK_FRAME_OVERHEAD);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001376 lr = regs->link;
Benjamin Herrenschmidt058c78f2008-07-07 13:44:31 +10001377 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1378 regs->trap, (void *)regs->nip, (void *)lr);
Paul Mackerras06d67d52005-10-10 22:29:05 +10001379 firstframe = 1;
1380 }
1381
1382 sp = newsp;
1383 } while (count++ < kstack_depth_to_print);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001384}
Paul Mackerras06d67d52005-10-10 22:29:05 +10001385
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001386#ifdef CONFIG_PPC64
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001387/* Called with hard IRQs off */
Michael Ellerman0e377392013-06-13 21:04:56 +10001388void notrace __ppc64_runlatch_on(void)
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001389{
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001390 struct thread_info *ti = current_thread_info();
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001391 unsigned long ctrl;
1392
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001393 ctrl = mfspr(SPRN_CTRLF);
1394 ctrl |= CTRL_RUNLATCH;
1395 mtspr(SPRN_CTRLT, ctrl);
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001396
Benjamin Herrenschmidtfae2e0f2012-04-11 10:42:15 +10001397 ti->local_flags |= _TLF_RUNLATCH;
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001398}
1399
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001400/* Called with hard IRQs off */
Michael Ellerman0e377392013-06-13 21:04:56 +10001401void notrace __ppc64_runlatch_off(void)
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001402{
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001403 struct thread_info *ti = current_thread_info();
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001404 unsigned long ctrl;
1405
Benjamin Herrenschmidtfae2e0f2012-04-11 10:42:15 +10001406 ti->local_flags &= ~_TLF_RUNLATCH;
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001407
Anton Blanchard4138d652010-08-06 03:28:19 +00001408 ctrl = mfspr(SPRN_CTRLF);
1409 ctrl &= ~CTRL_RUNLATCH;
1410 mtspr(SPRN_CTRLT, ctrl);
Anton Blanchardcb2c9b22006-02-13 14:48:35 +11001411}
Benjamin Herrenschmidtfe1952f2012-03-01 12:45:27 +11001412#endif /* CONFIG_PPC64 */
Benjamin Herrenschmidtf6a61682008-04-18 16:56:17 +10001413
Anton Blanchardd8390882009-02-22 01:50:03 +00001414unsigned long arch_align_stack(unsigned long sp)
1415{
1416 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1417 sp -= get_random_int() & ~PAGE_MASK;
1418 return sp & ~0xf;
1419}
Anton Blanchard912f9ee2009-02-22 01:50:04 +00001420
1421static inline unsigned long brk_rnd(void)
1422{
1423 unsigned long rnd = 0;
1424
1425 /* 8MB for 32bit, 1GB for 64bit */
1426 if (is_32bit_task())
1427 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1428 else
1429 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1430
1431 return rnd << PAGE_SHIFT;
1432}
1433
1434unsigned long arch_randomize_brk(struct mm_struct *mm)
1435{
Anton Blanchard8bbde7a2009-09-21 16:52:35 +00001436 unsigned long base = mm->brk;
1437 unsigned long ret;
1438
Kumar Galace7a35c2009-10-16 07:05:17 +00001439#ifdef CONFIG_PPC_STD_MMU_64
Anton Blanchard8bbde7a2009-09-21 16:52:35 +00001440 /*
1441 * If we are using 1TB segments and we are allowed to randomise
1442 * the heap, we can put it above 1TB so it is backed by a 1TB
1443 * segment. Otherwise the heap will be in the bottom 1TB
1444 * which always uses 256MB segments and this may result in a
1445 * performance penalty.
1446 */
1447 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1448 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1449#endif
1450
1451 ret = PAGE_ALIGN(base + brk_rnd());
Anton Blanchard912f9ee2009-02-22 01:50:04 +00001452
1453 if (ret < mm->brk)
1454 return mm->brk;
1455
1456 return ret;
1457}
Anton Blanchard501cb162009-02-22 01:50:07 +00001458
1459unsigned long randomize_et_dyn(unsigned long base)
1460{
1461 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1462
1463 if (ret < base)
1464 return base;
1465
1466 return ret;
1467}