blob: 51cc492c2e35f7473ce31ed87a4ff1b9e26ff908 [file] [log] [blame]
Len Brown26717172010-03-08 14:07:30 -05001/*
2 * intel_idle.c - native hardware idle loop for modern Intel processors
3 *
Len Brownfab04b22013-11-09 00:30:17 -05004 * Copyright (c) 2013, Intel Corporation.
Len Brown26717172010-03-08 14:07:30 -05005 * Len Brown <len.brown@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21/*
22 * intel_idle is a cpuidle driver that loads on specific Intel processors
23 * in lieu of the legacy ACPI processor_idle driver. The intent is to
24 * make Linux more efficient on these processors, as intel_idle knows
25 * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
26 */
27
28/*
29 * Design Assumptions
30 *
31 * All CPUs have same idle states as boot CPU
32 *
33 * Chipset BM_STS (bus master status) bit is a NOP
34 * for preventing entry into deep C-stats
35 */
36
37/*
38 * Known limitations
39 *
40 * The driver currently initializes for_each_online_cpu() upon modprobe.
41 * It it unaware of subsequent processors hot-added to the system.
42 * This means that if you boot with maxcpus=n and later online
43 * processors above n, those processors will use C1 only.
44 *
45 * ACPI has a .suspend hack to turn off deep c-statees during suspend
46 * to avoid complications with the lapic timer workaround.
47 * Have not seen issues with suspend, but may need same workaround here.
48 *
Len Brown26717172010-03-08 14:07:30 -050049 */
50
51/* un-comment DEBUG to enable pr_debug() statements */
52#define DEBUG
53
Joe Perches654d08a2017-06-09 12:29:20 -070054#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
55
Len Brown26717172010-03-08 14:07:30 -050056#include <linux/kernel.h>
57#include <linux/cpuidle.h>
Thomas Gleixner76962ca2015-04-03 02:02:34 +020058#include <linux/tick.h>
Len Brown26717172010-03-08 14:07:30 -050059#include <trace/events/power.h>
60#include <linux/sched.h>
Peter Zijlstra893b2aa2022-10-27 13:55:09 -070061#include <linux/sched/smt.h>
Shaohua Li2a2d31c2011-01-10 09:38:12 +080062#include <linux/notifier.h>
63#include <linux/cpu.h>
Paul Gortmaker02c4fae2016-06-17 01:28:33 -040064#include <linux/moduleparam.h>
Andi Kleenb66b8b92012-01-26 00:09:07 +010065#include <asm/cpu_device_id.h>
Dave Hansendb73c5a2016-06-02 17:19:32 -070066#include <asm/intel-family.h>
Peter Zijlstra893b2aa2022-10-27 13:55:09 -070067#include <asm/nospec-branch.h>
H. Peter Anvinbc83ccc2010-09-17 15:36:40 -070068#include <asm/mwait.h>
Len Brown14796fc2011-01-18 20:48:27 -050069#include <asm/msr.h>
Len Brown26717172010-03-08 14:07:30 -050070
Len Brownd70e28f2016-03-13 00:33:48 -050071#define INTEL_IDLE_VERSION "0.4.1"
Len Brown26717172010-03-08 14:07:30 -050072
Len Brown26717172010-03-08 14:07:30 -050073static struct cpuidle_driver intel_idle_driver = {
74 .name = "intel_idle",
75 .owner = THIS_MODULE,
76};
77/* intel_idle.max_cstate=0 disables driver */
Len Brown137ecc72013-02-01 21:35:35 -050078static int max_cstate = CPUIDLE_STATE_MAX - 1;
Len Brown26717172010-03-08 14:07:30 -050079
Len Brownc4236282010-05-28 02:22:03 -040080static unsigned int mwait_substates;
Len Brown26717172010-03-08 14:07:30 -050081
Shaohua Li2a2d31c2011-01-10 09:38:12 +080082#define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
Len Brown26717172010-03-08 14:07:30 -050083/* Reliable LAPIC Timer States, bit 1 for C1 etc. */
Len Brownd13780d2010-07-07 00:12:03 -040084static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */
Len Brown26717172010-03-08 14:07:30 -050085
Andi Kleenb66b8b92012-01-26 00:09:07 +010086struct idle_cpu {
87 struct cpuidle_state *state_table;
88
89 /*
90 * Hardware C-state auto-demotion may not always be optimal.
91 * Indicate which enable bits to clear here.
92 */
93 unsigned long auto_demotion_disable_flags;
Len Brown8c058d532014-07-31 15:21:24 -040094 bool byt_auto_demotion_disable_flag;
Len Brown32e95182013-02-02 01:31:56 -050095 bool disable_promotion_to_c1e;
Andi Kleenb66b8b92012-01-26 00:09:07 +010096};
97
98static const struct idle_cpu *icpu;
Namhyung Kim3265eba2010-08-08 03:10:03 +090099static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530100static int intel_idle(struct cpuidle_device *dev,
101 struct cpuidle_driver *drv, int index);
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700102static int intel_idle_ibrs(struct cpuidle_device *dev,
103 struct cpuidle_driver *drv, int index);
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200104static void intel_idle_s2idle(struct cpuidle_device *dev,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100105 struct cpuidle_driver *drv, int index);
Len Brown26717172010-03-08 14:07:30 -0500106static struct cpuidle_state *cpuidle_state_table;
107
108/*
Len Brown956d0332011-01-12 02:51:20 -0500109 * Set this flag for states where the HW flushes the TLB for us
110 * and so we don't need cross-calls to keep it consistent.
111 * If this flag is set, SW flushes the TLB, so even if the
112 * HW doesn't do the flushing, this flag is safe to use.
113 */
114#define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
115
116/*
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700117 * Disable IBRS across idle (when KERNEL_IBRS), is exclusive vs IRQ_ENABLE
118 * above.
119 */
120#define CPUIDLE_FLAG_IBRS BIT(16)
121
122/*
Len Brownb1beab42013-01-31 19:55:37 -0500123 * MWAIT takes an 8-bit "hint" in EAX "suggesting"
124 * the C-state (top nibble) and sub-state (bottom nibble)
125 * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc.
126 *
127 * We store the hint at the top of our "flags" for each state.
128 */
129#define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
130#define MWAIT2flg(eax) ((eax & 0xFF) << 24)
131
132/*
Len Brown26717172010-03-08 14:07:30 -0500133 * States are indexed by the cstate number,
134 * which is also the index into the MWAIT hint array.
135 * Thus C0 is a dummy.
136 */
Jiang Liuba0dc812014-01-09 15:30:26 +0800137static struct cpuidle_state nehalem_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500138 {
Len Brownde09cdd2017-02-28 16:32:44 -0500139 .name = "C1",
Len Brown26717172010-03-08 14:07:30 -0500140 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100141 .flags = MWAIT2flg(0x00),
Len Brown26717172010-03-08 14:07:30 -0500142 .exit_latency = 3,
Len Brown26717172010-03-08 14:07:30 -0500143 .target_residency = 6,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100144 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200145 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500146 {
Len Brownde09cdd2017-02-28 16:32:44 -0500147 .name = "C1E",
Len Brown32e95182013-02-02 01:31:56 -0500148 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100149 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500150 .exit_latency = 10,
151 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100152 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200153 .enter_s2idle = intel_idle_s2idle, },
Len Brown32e95182013-02-02 01:31:56 -0500154 {
Len Brownde09cdd2017-02-28 16:32:44 -0500155 .name = "C3",
Len Brown26717172010-03-08 14:07:30 -0500156 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100157 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500158 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500159 .target_residency = 80,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100160 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200161 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500162 {
Len Brownde09cdd2017-02-28 16:32:44 -0500163 .name = "C6",
Len Brown26717172010-03-08 14:07:30 -0500164 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100165 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500166 .exit_latency = 200,
Len Brown26717172010-03-08 14:07:30 -0500167 .target_residency = 800,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100168 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200169 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500170 {
171 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500172};
173
Jiang Liuba0dc812014-01-09 15:30:26 +0800174static struct cpuidle_state snb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500175 {
Len Brownde09cdd2017-02-28 16:32:44 -0500176 .name = "C1",
Len Brownd13780d2010-07-07 00:12:03 -0400177 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100178 .flags = MWAIT2flg(0x00),
Len Brown32e95182013-02-02 01:31:56 -0500179 .exit_latency = 2,
180 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100181 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200182 .enter_s2idle = intel_idle_s2idle, },
Len Brown32e95182013-02-02 01:31:56 -0500183 {
Len Brownde09cdd2017-02-28 16:32:44 -0500184 .name = "C1E",
Len Brown32e95182013-02-02 01:31:56 -0500185 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100186 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500187 .exit_latency = 10,
188 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100189 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200190 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500191 {
Len Brownde09cdd2017-02-28 16:32:44 -0500192 .name = "C3",
Len Brownd13780d2010-07-07 00:12:03 -0400193 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100194 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400195 .exit_latency = 80,
Len Brownddbd5502010-12-13 18:28:22 -0500196 .target_residency = 211,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100197 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200198 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500199 {
Len Brownde09cdd2017-02-28 16:32:44 -0500200 .name = "C6",
Len Brownd13780d2010-07-07 00:12:03 -0400201 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100202 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400203 .exit_latency = 104,
Len Brownddbd5502010-12-13 18:28:22 -0500204 .target_residency = 345,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100205 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200206 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500207 {
Len Brownde09cdd2017-02-28 16:32:44 -0500208 .name = "C7",
Len Brownd13780d2010-07-07 00:12:03 -0400209 .desc = "MWAIT 0x30",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100210 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400211 .exit_latency = 109,
Len Brownddbd5502010-12-13 18:28:22 -0500212 .target_residency = 345,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100213 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200214 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500215 {
216 .enter = NULL }
Len Brownd13780d2010-07-07 00:12:03 -0400217};
218
Len Brown718987d2014-02-14 02:30:00 -0500219static struct cpuidle_state byt_cstates[] = {
220 {
Len Brownde09cdd2017-02-28 16:32:44 -0500221 .name = "C1",
Len Brown718987d2014-02-14 02:30:00 -0500222 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100223 .flags = MWAIT2flg(0x00),
Len Brown718987d2014-02-14 02:30:00 -0500224 .exit_latency = 1,
225 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100226 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200227 .enter_s2idle = intel_idle_s2idle, },
Len Brown718987d2014-02-14 02:30:00 -0500228 {
Len Brownde09cdd2017-02-28 16:32:44 -0500229 .name = "C6N",
Len Brown718987d2014-02-14 02:30:00 -0500230 .desc = "MWAIT 0x58",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100231 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd7ef7672015-03-24 23:23:20 -0400232 .exit_latency = 300,
Len Brown718987d2014-02-14 02:30:00 -0500233 .target_residency = 275,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100234 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200235 .enter_s2idle = intel_idle_s2idle, },
Len Brown718987d2014-02-14 02:30:00 -0500236 {
Len Brownde09cdd2017-02-28 16:32:44 -0500237 .name = "C6S",
Len Brown718987d2014-02-14 02:30:00 -0500238 .desc = "MWAIT 0x52",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100239 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd7ef7672015-03-24 23:23:20 -0400240 .exit_latency = 500,
Len Brown718987d2014-02-14 02:30:00 -0500241 .target_residency = 560,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100242 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200243 .enter_s2idle = intel_idle_s2idle, },
Len Brown718987d2014-02-14 02:30:00 -0500244 {
Len Brownde09cdd2017-02-28 16:32:44 -0500245 .name = "C7",
Len Brown718987d2014-02-14 02:30:00 -0500246 .desc = "MWAIT 0x60",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100247 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown718987d2014-02-14 02:30:00 -0500248 .exit_latency = 1200,
Len Brownd7ef7672015-03-24 23:23:20 -0400249 .target_residency = 4000,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100250 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200251 .enter_s2idle = intel_idle_s2idle, },
Len Brown718987d2014-02-14 02:30:00 -0500252 {
Len Brownde09cdd2017-02-28 16:32:44 -0500253 .name = "C7S",
Len Brown718987d2014-02-14 02:30:00 -0500254 .desc = "MWAIT 0x64",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100255 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown718987d2014-02-14 02:30:00 -0500256 .exit_latency = 10000,
257 .target_residency = 20000,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100258 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200259 .enter_s2idle = intel_idle_s2idle, },
Len Brown718987d2014-02-14 02:30:00 -0500260 {
261 .enter = NULL }
262};
263
Len Browncab07a52015-03-27 20:54:01 -0400264static struct cpuidle_state cht_cstates[] = {
265 {
Len Brownde09cdd2017-02-28 16:32:44 -0500266 .name = "C1",
Len Browncab07a52015-03-27 20:54:01 -0400267 .desc = "MWAIT 0x00",
268 .flags = MWAIT2flg(0x00),
269 .exit_latency = 1,
270 .target_residency = 1,
271 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200272 .enter_s2idle = intel_idle_s2idle, },
Len Browncab07a52015-03-27 20:54:01 -0400273 {
Len Brownde09cdd2017-02-28 16:32:44 -0500274 .name = "C6N",
Len Browncab07a52015-03-27 20:54:01 -0400275 .desc = "MWAIT 0x58",
276 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
277 .exit_latency = 80,
278 .target_residency = 275,
279 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200280 .enter_s2idle = intel_idle_s2idle, },
Len Browncab07a52015-03-27 20:54:01 -0400281 {
Len Brownde09cdd2017-02-28 16:32:44 -0500282 .name = "C6S",
Len Browncab07a52015-03-27 20:54:01 -0400283 .desc = "MWAIT 0x52",
284 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
285 .exit_latency = 200,
286 .target_residency = 560,
287 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200288 .enter_s2idle = intel_idle_s2idle, },
Len Browncab07a52015-03-27 20:54:01 -0400289 {
Len Brownde09cdd2017-02-28 16:32:44 -0500290 .name = "C7",
Len Browncab07a52015-03-27 20:54:01 -0400291 .desc = "MWAIT 0x60",
292 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
293 .exit_latency = 1200,
294 .target_residency = 4000,
295 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200296 .enter_s2idle = intel_idle_s2idle, },
Len Browncab07a52015-03-27 20:54:01 -0400297 {
Len Brownde09cdd2017-02-28 16:32:44 -0500298 .name = "C7S",
Len Browncab07a52015-03-27 20:54:01 -0400299 .desc = "MWAIT 0x64",
300 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
301 .exit_latency = 10000,
302 .target_residency = 20000,
303 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200304 .enter_s2idle = intel_idle_s2idle, },
Len Browncab07a52015-03-27 20:54:01 -0400305 {
306 .enter = NULL }
307};
308
Jiang Liuba0dc812014-01-09 15:30:26 +0800309static struct cpuidle_state ivb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500310 {
Len Brownde09cdd2017-02-28 16:32:44 -0500311 .name = "C1",
Len Brown6edab082012-06-01 19:45:32 -0400312 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100313 .flags = MWAIT2flg(0x00),
Len Brown6edab082012-06-01 19:45:32 -0400314 .exit_latency = 1,
315 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100316 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200317 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500318 {
Len Brownde09cdd2017-02-28 16:32:44 -0500319 .name = "C1E",
Len Brown32e95182013-02-02 01:31:56 -0500320 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100321 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500322 .exit_latency = 10,
323 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100324 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200325 .enter_s2idle = intel_idle_s2idle, },
Len Brown32e95182013-02-02 01:31:56 -0500326 {
Len Brownde09cdd2017-02-28 16:32:44 -0500327 .name = "C3",
Len Brown6edab082012-06-01 19:45:32 -0400328 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100329 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400330 .exit_latency = 59,
331 .target_residency = 156,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100332 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200333 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500334 {
Len Brownde09cdd2017-02-28 16:32:44 -0500335 .name = "C6",
Len Brown6edab082012-06-01 19:45:32 -0400336 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100337 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400338 .exit_latency = 80,
339 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100340 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200341 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500342 {
Len Brownde09cdd2017-02-28 16:32:44 -0500343 .name = "C7",
Len Brown6edab082012-06-01 19:45:32 -0400344 .desc = "MWAIT 0x30",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100345 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400346 .exit_latency = 87,
347 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100348 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200349 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500350 {
351 .enter = NULL }
Len Brown6edab082012-06-01 19:45:32 -0400352};
353
Len Brown0138d8f2014-04-04 01:21:07 -0400354static struct cpuidle_state ivt_cstates[] = {
355 {
Len Brownde09cdd2017-02-28 16:32:44 -0500356 .name = "C1",
Len Brown0138d8f2014-04-04 01:21:07 -0400357 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100358 .flags = MWAIT2flg(0x00),
Len Brown0138d8f2014-04-04 01:21:07 -0400359 .exit_latency = 1,
360 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100361 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200362 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400363 {
Len Brownde09cdd2017-02-28 16:32:44 -0500364 .name = "C1E",
Len Brown0138d8f2014-04-04 01:21:07 -0400365 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100366 .flags = MWAIT2flg(0x01),
Len Brown0138d8f2014-04-04 01:21:07 -0400367 .exit_latency = 10,
368 .target_residency = 80,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100369 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200370 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400371 {
Len Brownde09cdd2017-02-28 16:32:44 -0500372 .name = "C3",
Len Brown0138d8f2014-04-04 01:21:07 -0400373 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100374 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400375 .exit_latency = 59,
376 .target_residency = 156,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100377 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200378 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400379 {
Len Brownde09cdd2017-02-28 16:32:44 -0500380 .name = "C6",
Len Brown0138d8f2014-04-04 01:21:07 -0400381 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100382 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400383 .exit_latency = 82,
384 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100385 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200386 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400387 {
388 .enter = NULL }
389};
390
391static struct cpuidle_state ivt_cstates_4s[] = {
392 {
Len Brownde09cdd2017-02-28 16:32:44 -0500393 .name = "C1",
Len Brown0138d8f2014-04-04 01:21:07 -0400394 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100395 .flags = MWAIT2flg(0x00),
Len Brown0138d8f2014-04-04 01:21:07 -0400396 .exit_latency = 1,
397 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100398 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200399 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400400 {
Len Brownde09cdd2017-02-28 16:32:44 -0500401 .name = "C1E",
Len Brown0138d8f2014-04-04 01:21:07 -0400402 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100403 .flags = MWAIT2flg(0x01),
Len Brown0138d8f2014-04-04 01:21:07 -0400404 .exit_latency = 10,
405 .target_residency = 250,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100406 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200407 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400408 {
Len Brownde09cdd2017-02-28 16:32:44 -0500409 .name = "C3",
Len Brown0138d8f2014-04-04 01:21:07 -0400410 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100411 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400412 .exit_latency = 59,
413 .target_residency = 300,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100414 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200415 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400416 {
Len Brownde09cdd2017-02-28 16:32:44 -0500417 .name = "C6",
Len Brown0138d8f2014-04-04 01:21:07 -0400418 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100419 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400420 .exit_latency = 84,
421 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100422 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200423 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400424 {
425 .enter = NULL }
426};
427
428static struct cpuidle_state ivt_cstates_8s[] = {
429 {
Len Brownde09cdd2017-02-28 16:32:44 -0500430 .name = "C1",
Len Brown0138d8f2014-04-04 01:21:07 -0400431 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100432 .flags = MWAIT2flg(0x00),
Len Brown0138d8f2014-04-04 01:21:07 -0400433 .exit_latency = 1,
434 .target_residency = 1,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100435 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200436 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400437 {
Len Brownde09cdd2017-02-28 16:32:44 -0500438 .name = "C1E",
Len Brown0138d8f2014-04-04 01:21:07 -0400439 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100440 .flags = MWAIT2flg(0x01),
Len Brown0138d8f2014-04-04 01:21:07 -0400441 .exit_latency = 10,
442 .target_residency = 500,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100443 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200444 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400445 {
Len Brownde09cdd2017-02-28 16:32:44 -0500446 .name = "C3",
Len Brown0138d8f2014-04-04 01:21:07 -0400447 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100448 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400449 .exit_latency = 59,
450 .target_residency = 600,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100451 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200452 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400453 {
Len Brownde09cdd2017-02-28 16:32:44 -0500454 .name = "C6",
Len Brown0138d8f2014-04-04 01:21:07 -0400455 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100456 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown0138d8f2014-04-04 01:21:07 -0400457 .exit_latency = 88,
458 .target_residency = 700,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100459 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200460 .enter_s2idle = intel_idle_s2idle, },
Len Brown0138d8f2014-04-04 01:21:07 -0400461 {
462 .enter = NULL }
463};
464
Jiang Liuba0dc812014-01-09 15:30:26 +0800465static struct cpuidle_state hsw_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500466 {
Len Brownde09cdd2017-02-28 16:32:44 -0500467 .name = "C1",
Len Brown85a4d2d2013-01-31 14:40:49 -0500468 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100469 .flags = MWAIT2flg(0x00),
Len Brown85a4d2d2013-01-31 14:40:49 -0500470 .exit_latency = 2,
471 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100472 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200473 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500474 {
Len Brownde09cdd2017-02-28 16:32:44 -0500475 .name = "C1E",
Len Brown32e95182013-02-02 01:31:56 -0500476 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100477 .flags = MWAIT2flg(0x01),
Len Brown32e95182013-02-02 01:31:56 -0500478 .exit_latency = 10,
479 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100480 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200481 .enter_s2idle = intel_idle_s2idle, },
Len Brown32e95182013-02-02 01:31:56 -0500482 {
Len Brownde09cdd2017-02-28 16:32:44 -0500483 .name = "C3",
Len Brown85a4d2d2013-01-31 14:40:49 -0500484 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100485 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown85a4d2d2013-01-31 14:40:49 -0500486 .exit_latency = 33,
487 .target_residency = 100,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100488 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200489 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500490 {
Len Brownde09cdd2017-02-28 16:32:44 -0500491 .name = "C6",
Len Brown85a4d2d2013-01-31 14:40:49 -0500492 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100493 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown85a4d2d2013-01-31 14:40:49 -0500494 .exit_latency = 133,
495 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100496 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200497 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500498 {
Len Brownde09cdd2017-02-28 16:32:44 -0500499 .name = "C7s",
Len Brown85a4d2d2013-01-31 14:40:49 -0500500 .desc = "MWAIT 0x32",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100501 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown85a4d2d2013-01-31 14:40:49 -0500502 .exit_latency = 166,
503 .target_residency = 500,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100504 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200505 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500506 {
Len Brownde09cdd2017-02-28 16:32:44 -0500507 .name = "C8",
Len Brown86239ce2013-02-27 13:18:50 -0500508 .desc = "MWAIT 0x40",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100509 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown86239ce2013-02-27 13:18:50 -0500510 .exit_latency = 300,
511 .target_residency = 900,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100512 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200513 .enter_s2idle = intel_idle_s2idle, },
Len Brown86239ce2013-02-27 13:18:50 -0500514 {
Len Brownde09cdd2017-02-28 16:32:44 -0500515 .name = "C9",
Len Brown86239ce2013-02-27 13:18:50 -0500516 .desc = "MWAIT 0x50",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100517 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown86239ce2013-02-27 13:18:50 -0500518 .exit_latency = 600,
519 .target_residency = 1800,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100520 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200521 .enter_s2idle = intel_idle_s2idle, },
Len Brown86239ce2013-02-27 13:18:50 -0500522 {
Len Brownde09cdd2017-02-28 16:32:44 -0500523 .name = "C10",
Len Brown86239ce2013-02-27 13:18:50 -0500524 .desc = "MWAIT 0x60",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100525 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown86239ce2013-02-27 13:18:50 -0500526 .exit_latency = 2600,
527 .target_residency = 7700,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100528 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200529 .enter_s2idle = intel_idle_s2idle, },
Len Brown86239ce2013-02-27 13:18:50 -0500530 {
Len Browne022e7e2013-02-01 23:37:30 -0500531 .enter = NULL }
Len Brown85a4d2d2013-01-31 14:40:49 -0500532};
Len Browna138b562014-02-04 23:56:40 -0500533static struct cpuidle_state bdw_cstates[] = {
534 {
Len Brownde09cdd2017-02-28 16:32:44 -0500535 .name = "C1",
Len Browna138b562014-02-04 23:56:40 -0500536 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100537 .flags = MWAIT2flg(0x00),
Len Browna138b562014-02-04 23:56:40 -0500538 .exit_latency = 2,
539 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100540 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200541 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500542 {
Len Brownde09cdd2017-02-28 16:32:44 -0500543 .name = "C1E",
Len Browna138b562014-02-04 23:56:40 -0500544 .desc = "MWAIT 0x01",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100545 .flags = MWAIT2flg(0x01),
Len Browna138b562014-02-04 23:56:40 -0500546 .exit_latency = 10,
547 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100548 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200549 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500550 {
Len Brownde09cdd2017-02-28 16:32:44 -0500551 .name = "C3",
Len Browna138b562014-02-04 23:56:40 -0500552 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100553 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500554 .exit_latency = 40,
555 .target_residency = 100,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100556 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200557 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500558 {
Len Brownde09cdd2017-02-28 16:32:44 -0500559 .name = "C6",
Len Browna138b562014-02-04 23:56:40 -0500560 .desc = "MWAIT 0x20",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100561 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500562 .exit_latency = 133,
563 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100564 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200565 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500566 {
Len Brownde09cdd2017-02-28 16:32:44 -0500567 .name = "C7s",
Len Browna138b562014-02-04 23:56:40 -0500568 .desc = "MWAIT 0x32",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100569 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500570 .exit_latency = 166,
571 .target_residency = 500,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100572 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200573 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500574 {
Len Brownde09cdd2017-02-28 16:32:44 -0500575 .name = "C8",
Len Browna138b562014-02-04 23:56:40 -0500576 .desc = "MWAIT 0x40",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100577 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500578 .exit_latency = 300,
579 .target_residency = 900,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100580 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200581 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500582 {
Len Brownde09cdd2017-02-28 16:32:44 -0500583 .name = "C9",
Len Browna138b562014-02-04 23:56:40 -0500584 .desc = "MWAIT 0x50",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100585 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500586 .exit_latency = 600,
587 .target_residency = 1800,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100588 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200589 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500590 {
Len Brownde09cdd2017-02-28 16:32:44 -0500591 .name = "C10",
Len Browna138b562014-02-04 23:56:40 -0500592 .desc = "MWAIT 0x60",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100593 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Browna138b562014-02-04 23:56:40 -0500594 .exit_latency = 2600,
595 .target_residency = 7700,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100596 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200597 .enter_s2idle = intel_idle_s2idle, },
Len Browna138b562014-02-04 23:56:40 -0500598 {
599 .enter = NULL }
600};
Len Brown85a4d2d2013-01-31 14:40:49 -0500601
Len Brown493f1332015-03-25 23:20:37 -0400602static struct cpuidle_state skl_cstates[] = {
603 {
Len Brownde09cdd2017-02-28 16:32:44 -0500604 .name = "C1",
Len Brown493f1332015-03-25 23:20:37 -0400605 .desc = "MWAIT 0x00",
606 .flags = MWAIT2flg(0x00),
607 .exit_latency = 2,
608 .target_residency = 2,
609 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200610 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400611 {
Len Brownde09cdd2017-02-28 16:32:44 -0500612 .name = "C1E",
Len Brown493f1332015-03-25 23:20:37 -0400613 .desc = "MWAIT 0x01",
614 .flags = MWAIT2flg(0x01),
615 .exit_latency = 10,
616 .target_residency = 20,
617 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200618 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400619 {
Len Brownde09cdd2017-02-28 16:32:44 -0500620 .name = "C3",
Len Brown493f1332015-03-25 23:20:37 -0400621 .desc = "MWAIT 0x10",
622 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
623 .exit_latency = 70,
624 .target_residency = 100,
625 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200626 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400627 {
Len Brownde09cdd2017-02-28 16:32:44 -0500628 .name = "C6",
Len Brown493f1332015-03-25 23:20:37 -0400629 .desc = "MWAIT 0x20",
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700630 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
Len Brown135919a2015-09-09 13:35:05 -0400631 .exit_latency = 85,
Len Brown493f1332015-03-25 23:20:37 -0400632 .target_residency = 200,
633 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200634 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400635 {
Len Brownde09cdd2017-02-28 16:32:44 -0500636 .name = "C7s",
Len Brown493f1332015-03-25 23:20:37 -0400637 .desc = "MWAIT 0x33",
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700638 .flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
Len Brown493f1332015-03-25 23:20:37 -0400639 .exit_latency = 124,
640 .target_residency = 800,
641 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200642 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400643 {
Len Brownde09cdd2017-02-28 16:32:44 -0500644 .name = "C8",
Len Brown493f1332015-03-25 23:20:37 -0400645 .desc = "MWAIT 0x40",
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700646 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
Len Brown135919a2015-09-09 13:35:05 -0400647 .exit_latency = 200,
Len Brown493f1332015-03-25 23:20:37 -0400648 .target_residency = 800,
649 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200650 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400651 {
Len Brownde09cdd2017-02-28 16:32:44 -0500652 .name = "C9",
Len Brown135919a2015-09-09 13:35:05 -0400653 .desc = "MWAIT 0x50",
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700654 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
Len Brown135919a2015-09-09 13:35:05 -0400655 .exit_latency = 480,
656 .target_residency = 5000,
657 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200658 .enter_s2idle = intel_idle_s2idle, },
Len Brown135919a2015-09-09 13:35:05 -0400659 {
Len Brownde09cdd2017-02-28 16:32:44 -0500660 .name = "C10",
Len Brown493f1332015-03-25 23:20:37 -0400661 .desc = "MWAIT 0x60",
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700662 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
Len Brown493f1332015-03-25 23:20:37 -0400663 .exit_latency = 890,
664 .target_residency = 5000,
665 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200666 .enter_s2idle = intel_idle_s2idle, },
Len Brown493f1332015-03-25 23:20:37 -0400667 {
668 .enter = NULL }
669};
670
Len Brownf9e71652016-04-06 17:00:58 -0400671static struct cpuidle_state skx_cstates[] = {
672 {
Len Brownde09cdd2017-02-28 16:32:44 -0500673 .name = "C1",
Len Brownf9e71652016-04-06 17:00:58 -0400674 .desc = "MWAIT 0x00",
675 .flags = MWAIT2flg(0x00),
676 .exit_latency = 2,
677 .target_residency = 2,
678 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200679 .enter_s2idle = intel_idle_s2idle, },
Len Brownf9e71652016-04-06 17:00:58 -0400680 {
Len Brownde09cdd2017-02-28 16:32:44 -0500681 .name = "C1E",
Len Brownf9e71652016-04-06 17:00:58 -0400682 .desc = "MWAIT 0x01",
683 .flags = MWAIT2flg(0x01),
684 .exit_latency = 10,
685 .target_residency = 20,
686 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200687 .enter_s2idle = intel_idle_s2idle, },
Len Brownf9e71652016-04-06 17:00:58 -0400688 {
Len Brownde09cdd2017-02-28 16:32:44 -0500689 .name = "C6",
Len Brownf9e71652016-04-06 17:00:58 -0400690 .desc = "MWAIT 0x20",
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700691 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
Len Brownf9e71652016-04-06 17:00:58 -0400692 .exit_latency = 133,
693 .target_residency = 600,
694 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200695 .enter_s2idle = intel_idle_s2idle, },
Len Brownf9e71652016-04-06 17:00:58 -0400696 {
697 .enter = NULL }
698};
699
Jiang Liuba0dc812014-01-09 15:30:26 +0800700static struct cpuidle_state atom_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500701 {
Len Brownde09cdd2017-02-28 16:32:44 -0500702 .name = "C1E",
Len Brown26717172010-03-08 14:07:30 -0500703 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100704 .flags = MWAIT2flg(0x00),
Len Brown32e95182013-02-02 01:31:56 -0500705 .exit_latency = 10,
706 .target_residency = 20,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100707 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200708 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500709 {
Len Brownde09cdd2017-02-28 16:32:44 -0500710 .name = "C2",
Len Brown26717172010-03-08 14:07:30 -0500711 .desc = "MWAIT 0x10",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100712 .flags = MWAIT2flg(0x10),
Len Brown26717172010-03-08 14:07:30 -0500713 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500714 .target_residency = 80,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100715 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200716 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500717 {
Len Brownde09cdd2017-02-28 16:32:44 -0500718 .name = "C4",
Len Brown26717172010-03-08 14:07:30 -0500719 .desc = "MWAIT 0x30",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100720 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500721 .exit_latency = 100,
Len Brown26717172010-03-08 14:07:30 -0500722 .target_residency = 400,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100723 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200724 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500725 {
Len Brownde09cdd2017-02-28 16:32:44 -0500726 .name = "C6",
Len Brown7fcca7d2010-10-05 13:43:14 -0400727 .desc = "MWAIT 0x52",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100728 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown7fcca7d2010-10-05 13:43:14 -0400729 .exit_latency = 140,
Len Brown7fcca7d2010-10-05 13:43:14 -0400730 .target_residency = 560,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100731 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200732 .enter_s2idle = intel_idle_s2idle, },
Len Browne022e7e2013-02-01 23:37:30 -0500733 {
734 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500735};
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300736static struct cpuidle_state tangier_cstates[] = {
737 {
Len Brownde09cdd2017-02-28 16:32:44 -0500738 .name = "C1",
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300739 .desc = "MWAIT 0x00",
740 .flags = MWAIT2flg(0x00),
741 .exit_latency = 1,
742 .target_residency = 4,
743 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200744 .enter_s2idle = intel_idle_s2idle, },
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300745 {
Len Brownde09cdd2017-02-28 16:32:44 -0500746 .name = "C4",
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300747 .desc = "MWAIT 0x30",
748 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED,
749 .exit_latency = 100,
750 .target_residency = 400,
751 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200752 .enter_s2idle = intel_idle_s2idle, },
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300753 {
Len Brownde09cdd2017-02-28 16:32:44 -0500754 .name = "C6",
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300755 .desc = "MWAIT 0x52",
756 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
757 .exit_latency = 140,
758 .target_residency = 560,
759 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200760 .enter_s2idle = intel_idle_s2idle, },
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300761 {
Len Brownde09cdd2017-02-28 16:32:44 -0500762 .name = "C7",
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300763 .desc = "MWAIT 0x60",
764 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
765 .exit_latency = 1200,
766 .target_residency = 4000,
767 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200768 .enter_s2idle = intel_idle_s2idle, },
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300769 {
Len Brownde09cdd2017-02-28 16:32:44 -0500770 .name = "C9",
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300771 .desc = "MWAIT 0x64",
772 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
773 .exit_latency = 10000,
774 .target_residency = 20000,
775 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200776 .enter_s2idle = intel_idle_s2idle, },
Andy Shevchenko5e7ec262016-10-25 17:11:39 +0300777 {
778 .enter = NULL }
779};
Jiang Liu88390992014-01-09 15:30:27 +0800780static struct cpuidle_state avn_cstates[] = {
Len Brownfab04b22013-11-09 00:30:17 -0500781 {
Len Brownde09cdd2017-02-28 16:32:44 -0500782 .name = "C1",
Len Brownfab04b22013-11-09 00:30:17 -0500783 .desc = "MWAIT 0x00",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100784 .flags = MWAIT2flg(0x00),
Len Brownfab04b22013-11-09 00:30:17 -0500785 .exit_latency = 2,
786 .target_residency = 2,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100787 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200788 .enter_s2idle = intel_idle_s2idle, },
Len Brownfab04b22013-11-09 00:30:17 -0500789 {
Len Brownde09cdd2017-02-28 16:32:44 -0500790 .name = "C6",
Len Brownfab04b22013-11-09 00:30:17 -0500791 .desc = "MWAIT 0x51",
Daniel Lezcanob82b6cc2014-11-12 16:03:50 +0100792 .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownfab04b22013-11-09 00:30:17 -0500793 .exit_latency = 15,
794 .target_residency = 45,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100795 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200796 .enter_s2idle = intel_idle_s2idle, },
Jiang Liu88390992014-01-09 15:30:27 +0800797 {
798 .enter = NULL }
Len Brownfab04b22013-11-09 00:30:17 -0500799};
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -0700800static struct cpuidle_state knl_cstates[] = {
801 {
Len Brownde09cdd2017-02-28 16:32:44 -0500802 .name = "C1",
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -0700803 .desc = "MWAIT 0x00",
804 .flags = MWAIT2flg(0x00),
805 .exit_latency = 1,
806 .target_residency = 2,
807 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200808 .enter_s2idle = intel_idle_s2idle },
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -0700809 {
Len Brownde09cdd2017-02-28 16:32:44 -0500810 .name = "C6",
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -0700811 .desc = "MWAIT 0x10",
812 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
813 .exit_latency = 120,
814 .target_residency = 500,
815 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200816 .enter_s2idle = intel_idle_s2idle },
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -0700817 {
818 .enter = NULL }
819};
Len Brown26717172010-03-08 14:07:30 -0500820
Len Brown5dcef692016-04-06 17:00:47 -0400821static struct cpuidle_state bxt_cstates[] = {
822 {
Len Brownde09cdd2017-02-28 16:32:44 -0500823 .name = "C1",
Len Brown5dcef692016-04-06 17:00:47 -0400824 .desc = "MWAIT 0x00",
825 .flags = MWAIT2flg(0x00),
826 .exit_latency = 2,
827 .target_residency = 2,
828 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200829 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400830 {
Len Brownde09cdd2017-02-28 16:32:44 -0500831 .name = "C1E",
Len Brown5dcef692016-04-06 17:00:47 -0400832 .desc = "MWAIT 0x01",
833 .flags = MWAIT2flg(0x01),
834 .exit_latency = 10,
835 .target_residency = 20,
836 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200837 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400838 {
Len Brownde09cdd2017-02-28 16:32:44 -0500839 .name = "C6",
Len Brown5dcef692016-04-06 17:00:47 -0400840 .desc = "MWAIT 0x20",
841 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
842 .exit_latency = 133,
843 .target_residency = 133,
844 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200845 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400846 {
Len Brownde09cdd2017-02-28 16:32:44 -0500847 .name = "C7s",
Len Brown5dcef692016-04-06 17:00:47 -0400848 .desc = "MWAIT 0x31",
849 .flags = MWAIT2flg(0x31) | CPUIDLE_FLAG_TLB_FLUSHED,
850 .exit_latency = 155,
851 .target_residency = 155,
852 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200853 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400854 {
Len Brownde09cdd2017-02-28 16:32:44 -0500855 .name = "C8",
Len Brown5dcef692016-04-06 17:00:47 -0400856 .desc = "MWAIT 0x40",
857 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
858 .exit_latency = 1000,
859 .target_residency = 1000,
860 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200861 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400862 {
Len Brownde09cdd2017-02-28 16:32:44 -0500863 .name = "C9",
Len Brown5dcef692016-04-06 17:00:47 -0400864 .desc = "MWAIT 0x50",
865 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
866 .exit_latency = 2000,
867 .target_residency = 2000,
868 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200869 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400870 {
Len Brownde09cdd2017-02-28 16:32:44 -0500871 .name = "C10",
Len Brown5dcef692016-04-06 17:00:47 -0400872 .desc = "MWAIT 0x60",
873 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
874 .exit_latency = 10000,
875 .target_residency = 10000,
876 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200877 .enter_s2idle = intel_idle_s2idle, },
Len Brown5dcef692016-04-06 17:00:47 -0400878 {
879 .enter = NULL }
880};
881
Jacob Pan0080d652016-06-17 01:28:34 -0400882static struct cpuidle_state dnv_cstates[] = {
883 {
Len Brownde09cdd2017-02-28 16:32:44 -0500884 .name = "C1",
Jacob Pan0080d652016-06-17 01:28:34 -0400885 .desc = "MWAIT 0x00",
886 .flags = MWAIT2flg(0x00),
887 .exit_latency = 2,
888 .target_residency = 2,
889 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200890 .enter_s2idle = intel_idle_s2idle, },
Jacob Pan0080d652016-06-17 01:28:34 -0400891 {
Len Brownde09cdd2017-02-28 16:32:44 -0500892 .name = "C1E",
Jacob Pan0080d652016-06-17 01:28:34 -0400893 .desc = "MWAIT 0x01",
894 .flags = MWAIT2flg(0x01),
895 .exit_latency = 10,
896 .target_residency = 20,
897 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200898 .enter_s2idle = intel_idle_s2idle, },
Jacob Pan0080d652016-06-17 01:28:34 -0400899 {
Len Brownde09cdd2017-02-28 16:32:44 -0500900 .name = "C6",
Jacob Pan0080d652016-06-17 01:28:34 -0400901 .desc = "MWAIT 0x20",
902 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
903 .exit_latency = 50,
904 .target_residency = 500,
905 .enter = &intel_idle,
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200906 .enter_s2idle = intel_idle_s2idle, },
Jacob Pan0080d652016-06-17 01:28:34 -0400907 {
908 .enter = NULL }
909};
910
Len Brown26717172010-03-08 14:07:30 -0500911/**
912 * intel_idle
913 * @dev: cpuidle_device
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530914 * @drv: cpuidle driver
Deepthi Dharware978aa72011-10-28 16:20:09 +0530915 * @index: index of cpuidle state
Len Brown26717172010-03-08 14:07:30 -0500916 *
Yanmin Zhang63ff07b2012-01-10 15:48:21 -0800917 * Must be called under local_irq_disable().
Len Brown26717172010-03-08 14:07:30 -0500918 */
Chris Metcalf6727ad92016-10-07 17:02:55 -0700919static __cpuidle int intel_idle(struct cpuidle_device *dev,
920 struct cpuidle_driver *drv, int index)
Len Brown26717172010-03-08 14:07:30 -0500921{
922 unsigned long ecx = 1; /* break on interrupt flag */
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530923 struct cpuidle_state *state = &drv->states[index];
Len Brownb1beab42013-01-31 19:55:37 -0500924 unsigned long eax = flg2MWAIT(state->flags);
Len Brown26717172010-03-08 14:07:30 -0500925 unsigned int cstate;
Andy Lutomirski67535732017-11-04 04:16:12 -0700926 int cpu = smp_processor_id();
Len Brown26717172010-03-08 14:07:30 -0500927
928 cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
929
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400930 /*
Andy Lutomirski67535732017-11-04 04:16:12 -0700931 * leave_mm() to avoid costly and often unnecessary wakeups
932 * for flushing the user TLB's associated with the active mm.
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400933 */
Andy Lutomirski67535732017-11-04 04:16:12 -0700934 if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
935 leave_mm(cpu);
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400936
Len Brown26717172010-03-08 14:07:30 -0500937 if (!(lapic_timer_reliable_states & (1 << (cstate))))
Thomas Gleixnerf6cee192015-04-03 02:14:23 +0200938 tick_broadcast_enter();
Len Brown26717172010-03-08 14:07:30 -0500939
Peter Zijlstra16824252013-12-12 15:08:36 +0100940 mwait_idle_with_hints(eax, ecx);
Len Brown26717172010-03-08 14:07:30 -0500941
Len Brown26717172010-03-08 14:07:30 -0500942 if (!(lapic_timer_reliable_states & (1 << (cstate))))
Thomas Gleixnerf6cee192015-04-03 02:14:23 +0200943 tick_broadcast_exit();
Len Brown26717172010-03-08 14:07:30 -0500944
Deepthi Dharware978aa72011-10-28 16:20:09 +0530945 return index;
Len Brown26717172010-03-08 14:07:30 -0500946}
947
Peter Zijlstra893b2aa2022-10-27 13:55:09 -0700948static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev,
949 struct cpuidle_driver *drv, int index)
950{
951 bool smt_active = sched_smt_active();
952 u64 spec_ctrl = spec_ctrl_current();
953 int ret;
954
955 if (smt_active)
956 wrmsrl(MSR_IA32_SPEC_CTRL, 0);
957
958 ret = intel_idle(dev, drv, index);
959
960 if (smt_active)
961 wrmsrl(MSR_IA32_SPEC_CTRL, spec_ctrl);
962
963 return ret;
964}
965
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100966/**
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200967 * intel_idle_s2idle - simplified "enter" callback routine for suspend-to-idle
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100968 * @dev: cpuidle_device
969 * @drv: cpuidle driver
970 * @index: state index
971 */
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +0200972static void intel_idle_s2idle(struct cpuidle_device *dev,
Rafael J. Wysocki5fe2e522015-02-11 05:04:17 +0100973 struct cpuidle_driver *drv, int index)
974{
975 unsigned long ecx = 1; /* break on interrupt flag */
976 unsigned long eax = flg2MWAIT(drv->states[index].flags);
977
978 mwait_idle_with_hints(eax, ecx);
979}
980
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +0100981static void __setup_broadcast_timer(bool on)
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800982{
Thomas Gleixner76962ca2015-04-03 02:02:34 +0200983 if (on)
984 tick_broadcast_enable();
985 else
986 tick_broadcast_disable();
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800987}
988
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +0100989static void auto_demotion_disable(void)
Len Brown14796fc2011-01-18 20:48:27 -0500990{
991 unsigned long long msr_bits;
992
Len Brown6cfb2372017-01-07 23:23:25 -0500993 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);
Andi Kleenb66b8b92012-01-26 00:09:07 +0100994 msr_bits &= ~(icpu->auto_demotion_disable_flags);
Len Brown6cfb2372017-01-07 23:23:25 -0500995 wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits);
Len Brown14796fc2011-01-18 20:48:27 -0500996}
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +0100997static void c1e_promotion_disable(void)
Len Brown32e95182013-02-02 01:31:56 -0500998{
999 unsigned long long msr_bits;
1000
1001 rdmsrl(MSR_IA32_POWER_CTL, msr_bits);
1002 msr_bits &= ~0x2;
1003 wrmsrl(MSR_IA32_POWER_CTL, msr_bits);
1004}
Len Brown14796fc2011-01-18 20:48:27 -05001005
Andi Kleenb66b8b92012-01-26 00:09:07 +01001006static const struct idle_cpu idle_cpu_nehalem = {
1007 .state_table = nehalem_cstates,
Andi Kleenb66b8b92012-01-26 00:09:07 +01001008 .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
Len Brown32e95182013-02-02 01:31:56 -05001009 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +01001010};
1011
1012static const struct idle_cpu idle_cpu_atom = {
1013 .state_table = atom_cstates,
1014};
1015
Andy Shevchenko5e7ec262016-10-25 17:11:39 +03001016static const struct idle_cpu idle_cpu_tangier = {
1017 .state_table = tangier_cstates,
1018};
1019
Andi Kleenb66b8b92012-01-26 00:09:07 +01001020static const struct idle_cpu idle_cpu_lincroft = {
1021 .state_table = atom_cstates,
1022 .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
1023};
1024
1025static const struct idle_cpu idle_cpu_snb = {
1026 .state_table = snb_cstates,
Len Brown32e95182013-02-02 01:31:56 -05001027 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +01001028};
1029
Len Brown718987d2014-02-14 02:30:00 -05001030static const struct idle_cpu idle_cpu_byt = {
1031 .state_table = byt_cstates,
1032 .disable_promotion_to_c1e = true,
Len Brown8c058d532014-07-31 15:21:24 -04001033 .byt_auto_demotion_disable_flag = true,
Len Brown718987d2014-02-14 02:30:00 -05001034};
1035
Len Browncab07a52015-03-27 20:54:01 -04001036static const struct idle_cpu idle_cpu_cht = {
1037 .state_table = cht_cstates,
1038 .disable_promotion_to_c1e = true,
1039 .byt_auto_demotion_disable_flag = true,
1040};
1041
Len Brown6edab082012-06-01 19:45:32 -04001042static const struct idle_cpu idle_cpu_ivb = {
1043 .state_table = ivb_cstates,
Len Brown32e95182013-02-02 01:31:56 -05001044 .disable_promotion_to_c1e = true,
Len Brown6edab082012-06-01 19:45:32 -04001045};
1046
Len Brown0138d8f2014-04-04 01:21:07 -04001047static const struct idle_cpu idle_cpu_ivt = {
1048 .state_table = ivt_cstates,
1049 .disable_promotion_to_c1e = true,
1050};
1051
Len Brown85a4d2d2013-01-31 14:40:49 -05001052static const struct idle_cpu idle_cpu_hsw = {
1053 .state_table = hsw_cstates,
Len Brown32e95182013-02-02 01:31:56 -05001054 .disable_promotion_to_c1e = true,
Len Brown85a4d2d2013-01-31 14:40:49 -05001055};
1056
Len Browna138b562014-02-04 23:56:40 -05001057static const struct idle_cpu idle_cpu_bdw = {
1058 .state_table = bdw_cstates,
1059 .disable_promotion_to_c1e = true,
1060};
1061
Len Brown493f1332015-03-25 23:20:37 -04001062static const struct idle_cpu idle_cpu_skl = {
1063 .state_table = skl_cstates,
1064 .disable_promotion_to_c1e = true,
1065};
1066
Len Brownf9e71652016-04-06 17:00:58 -04001067static const struct idle_cpu idle_cpu_skx = {
1068 .state_table = skx_cstates,
1069 .disable_promotion_to_c1e = true,
1070};
Len Brown493f1332015-03-25 23:20:37 -04001071
Len Brownfab04b22013-11-09 00:30:17 -05001072static const struct idle_cpu idle_cpu_avn = {
1073 .state_table = avn_cstates,
1074 .disable_promotion_to_c1e = true,
1075};
1076
Dasaratharaman Chandramouli281baf72014-09-04 17:22:54 -07001077static const struct idle_cpu idle_cpu_knl = {
1078 .state_table = knl_cstates,
1079};
1080
Len Brown5dcef692016-04-06 17:00:47 -04001081static const struct idle_cpu idle_cpu_bxt = {
1082 .state_table = bxt_cstates,
1083 .disable_promotion_to_c1e = true,
1084};
1085
Jacob Pan0080d652016-06-17 01:28:34 -04001086static const struct idle_cpu idle_cpu_dnv = {
1087 .state_table = dnv_cstates,
1088 .disable_promotion_to_c1e = true,
1089};
1090
Andi Kleenb66b8b92012-01-26 00:09:07 +01001091#define ICPU(model, cpu) \
Len Browna3439992017-11-09 02:19:39 -05001092 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&cpu }
Andi Kleenb66b8b92012-01-26 00:09:07 +01001093
Mathias Kraused5cdc3c2015-03-25 22:15:14 +01001094static const struct x86_cpu_id intel_idle_ids[] __initconst = {
Dave Hansendb73c5a2016-06-02 17:19:32 -07001095 ICPU(INTEL_FAM6_NEHALEM_EP, idle_cpu_nehalem),
1096 ICPU(INTEL_FAM6_NEHALEM, idle_cpu_nehalem),
Dave Hansen4b3b2342016-06-29 12:27:37 -07001097 ICPU(INTEL_FAM6_NEHALEM_G, idle_cpu_nehalem),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001098 ICPU(INTEL_FAM6_WESTMERE, idle_cpu_nehalem),
1099 ICPU(INTEL_FAM6_WESTMERE_EP, idle_cpu_nehalem),
1100 ICPU(INTEL_FAM6_NEHALEM_EX, idle_cpu_nehalem),
Peter Zijlstraeb8921e2018-08-07 10:17:27 -07001101 ICPU(INTEL_FAM6_ATOM_BONNELL, idle_cpu_atom),
1102 ICPU(INTEL_FAM6_ATOM_BONNELL_MID, idle_cpu_lincroft),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001103 ICPU(INTEL_FAM6_WESTMERE_EX, idle_cpu_nehalem),
1104 ICPU(INTEL_FAM6_SANDYBRIDGE, idle_cpu_snb),
1105 ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb),
Peter Zijlstraeb8921e2018-08-07 10:17:27 -07001106 ICPU(INTEL_FAM6_ATOM_SALTWELL, idle_cpu_atom),
1107 ICPU(INTEL_FAM6_ATOM_SILVERMONT, idle_cpu_byt),
1108 ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, idle_cpu_tangier),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001109 ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht),
1110 ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb),
1111 ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt),
1112 ICPU(INTEL_FAM6_HASWELL_CORE, idle_cpu_hsw),
1113 ICPU(INTEL_FAM6_HASWELL_X, idle_cpu_hsw),
1114 ICPU(INTEL_FAM6_HASWELL_ULT, idle_cpu_hsw),
1115 ICPU(INTEL_FAM6_HASWELL_GT3E, idle_cpu_hsw),
Peter Zijlstraeb8921e2018-08-07 10:17:27 -07001116 ICPU(INTEL_FAM6_ATOM_SILVERMONT_X, idle_cpu_avn),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001117 ICPU(INTEL_FAM6_BROADWELL_CORE, idle_cpu_bdw),
1118 ICPU(INTEL_FAM6_BROADWELL_GT3E, idle_cpu_bdw),
1119 ICPU(INTEL_FAM6_BROADWELL_X, idle_cpu_bdw),
1120 ICPU(INTEL_FAM6_BROADWELL_XEON_D, idle_cpu_bdw),
1121 ICPU(INTEL_FAM6_SKYLAKE_MOBILE, idle_cpu_skl),
1122 ICPU(INTEL_FAM6_SKYLAKE_DESKTOP, idle_cpu_skl),
1123 ICPU(INTEL_FAM6_KABYLAKE_MOBILE, idle_cpu_skl),
1124 ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, idle_cpu_skl),
1125 ICPU(INTEL_FAM6_SKYLAKE_X, idle_cpu_skx),
1126 ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl),
Piotr Luca2c1bc62016-10-13 17:30:58 +02001127 ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl),
Dave Hansendb73c5a2016-06-02 17:19:32 -07001128 ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt),
Peter Zijlstraeb8921e2018-08-07 10:17:27 -07001129 ICPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, idle_cpu_bxt),
1130 ICPU(INTEL_FAM6_ATOM_GOLDMONT_X, idle_cpu_dnv),
Andi Kleenb66b8b92012-01-26 00:09:07 +01001131 {}
1132};
Andi Kleenb66b8b92012-01-26 00:09:07 +01001133
Len Brown26717172010-03-08 14:07:30 -05001134/*
1135 * intel_idle_probe()
1136 */
Bartlomiej Zolnierkiewicz00f3e752013-08-30 12:27:45 +02001137static int __init intel_idle_probe(void)
Len Brown26717172010-03-08 14:07:30 -05001138{
Len Brownc4236282010-05-28 02:22:03 -04001139 unsigned int eax, ebx, ecx;
Andi Kleenb66b8b92012-01-26 00:09:07 +01001140 const struct x86_cpu_id *id;
Len Brown26717172010-03-08 14:07:30 -05001141
1142 if (max_cstate == 0) {
Joe Perches654d08a2017-06-09 12:29:20 -07001143 pr_debug("disabled\n");
Len Brown26717172010-03-08 14:07:30 -05001144 return -EPERM;
1145 }
1146
Andi Kleenb66b8b92012-01-26 00:09:07 +01001147 id = x86_match_cpu(intel_idle_ids);
1148 if (!id) {
1149 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
1150 boot_cpu_data.x86 == 6)
Joe Perches654d08a2017-06-09 12:29:20 -07001151 pr_debug("does not run on family %d model %d\n",
1152 boot_cpu_data.x86, boot_cpu_data.x86_model);
Len Brown26717172010-03-08 14:07:30 -05001153 return -ENODEV;
Andi Kleenb66b8b92012-01-26 00:09:07 +01001154 }
Len Brown26717172010-03-08 14:07:30 -05001155
Len Browna3439992017-11-09 02:19:39 -05001156 if (!boot_cpu_has(X86_FEATURE_MWAIT)) {
1157 pr_debug("Please enable MWAIT in BIOS SETUP\n");
1158 return -ENODEV;
1159 }
1160
Len Brown26717172010-03-08 14:07:30 -05001161 if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
1162 return -ENODEV;
1163
Len Brownc4236282010-05-28 02:22:03 -04001164 cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
Len Brown26717172010-03-08 14:07:30 -05001165
1166 if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
Thomas Renninger5c2a9f02011-12-04 22:17:29 +01001167 !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
1168 !mwait_substates)
Len Brown26717172010-03-08 14:07:30 -05001169 return -ENODEV;
Len Brown26717172010-03-08 14:07:30 -05001170
Joe Perches654d08a2017-06-09 12:29:20 -07001171 pr_debug("MWAIT substates: 0x%x\n", mwait_substates);
Len Brown26717172010-03-08 14:07:30 -05001172
Andi Kleenb66b8b92012-01-26 00:09:07 +01001173 icpu = (const struct idle_cpu *)id->driver_data;
1174 cpuidle_state_table = icpu->state_table;
Len Brown26717172010-03-08 14:07:30 -05001175
Joe Perches654d08a2017-06-09 12:29:20 -07001176 pr_debug("v" INTEL_IDLE_VERSION " model 0x%X\n",
1177 boot_cpu_data.x86_model);
Len Brown26717172010-03-08 14:07:30 -05001178
Len Brown26717172010-03-08 14:07:30 -05001179 return 0;
1180}
1181
1182/*
1183 * intel_idle_cpuidle_devices_uninit()
Richard Cochranca424892016-04-06 17:00:53 -04001184 * Unregisters the cpuidle devices.
Len Brown26717172010-03-08 14:07:30 -05001185 */
1186static void intel_idle_cpuidle_devices_uninit(void)
1187{
1188 int i;
1189 struct cpuidle_device *dev;
1190
1191 for_each_online_cpu(i) {
1192 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
1193 cpuidle_unregister_device(dev);
1194 }
Len Brown26717172010-03-08 14:07:30 -05001195}
Len Brown0138d8f2014-04-04 01:21:07 -04001196
1197/*
Len Brownd70e28f2016-03-13 00:33:48 -05001198 * ivt_idle_state_table_update(void)
1199 *
1200 * Tune IVT multi-socket targets
1201 * Assumption: num_sockets == (max_package_num + 1)
1202 */
1203static void ivt_idle_state_table_update(void)
1204{
1205 /* IVT uses a different table for 1-2, 3-4, and > 4 sockets */
1206 int cpu, package_num, num_sockets = 1;
1207
1208 for_each_online_cpu(cpu) {
1209 package_num = topology_physical_package_id(cpu);
1210 if (package_num + 1 > num_sockets) {
1211 num_sockets = package_num + 1;
1212
1213 if (num_sockets > 4) {
1214 cpuidle_state_table = ivt_cstates_8s;
1215 return;
1216 }
1217 }
1218 }
1219
1220 if (num_sockets > 2)
1221 cpuidle_state_table = ivt_cstates_4s;
1222
1223 /* else, 1 and 2 socket systems use default ivt_cstates */
1224}
Len Brown5dcef692016-04-06 17:00:47 -04001225
1226/*
1227 * Translate IRTL (Interrupt Response Time Limit) MSR to usec
1228 */
1229
1230static unsigned int irtl_ns_units[] = {
1231 1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
1232
1233static unsigned long long irtl_2_usec(unsigned long long irtl)
1234{
1235 unsigned long long ns;
1236
Jan Beulich3451ab32016-06-27 00:35:12 -06001237 if (!irtl)
1238 return 0;
1239
Jan Beulichbef45092016-06-27 00:35:48 -06001240 ns = irtl_ns_units[(irtl >> 10) & 0x7];
Len Brown5dcef692016-04-06 17:00:47 -04001241
1242 return div64_u64((irtl & 0x3FF) * ns, 1000);
1243}
1244/*
1245 * bxt_idle_state_table_update(void)
1246 *
1247 * On BXT, we trust the IRTL to show the definitive maximum latency
1248 * We use the same value for target_residency.
1249 */
1250static void bxt_idle_state_table_update(void)
1251{
1252 unsigned long long msr;
Jan Beulich3451ab32016-06-27 00:35:12 -06001253 unsigned int usec;
Len Brown5dcef692016-04-06 17:00:47 -04001254
1255 rdmsrl(MSR_PKGC6_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001256 usec = irtl_2_usec(msr);
1257 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001258 bxt_cstates[2].exit_latency = usec;
1259 bxt_cstates[2].target_residency = usec;
1260 }
1261
1262 rdmsrl(MSR_PKGC7_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001263 usec = irtl_2_usec(msr);
1264 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001265 bxt_cstates[3].exit_latency = usec;
1266 bxt_cstates[3].target_residency = usec;
1267 }
1268
1269 rdmsrl(MSR_PKGC8_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001270 usec = irtl_2_usec(msr);
1271 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001272 bxt_cstates[4].exit_latency = usec;
1273 bxt_cstates[4].target_residency = usec;
1274 }
1275
1276 rdmsrl(MSR_PKGC9_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001277 usec = irtl_2_usec(msr);
1278 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001279 bxt_cstates[5].exit_latency = usec;
1280 bxt_cstates[5].target_residency = usec;
1281 }
1282
1283 rdmsrl(MSR_PKGC10_IRTL, msr);
Jan Beulich3451ab32016-06-27 00:35:12 -06001284 usec = irtl_2_usec(msr);
1285 if (usec) {
Len Brown5dcef692016-04-06 17:00:47 -04001286 bxt_cstates[6].exit_latency = usec;
1287 bxt_cstates[6].target_residency = usec;
1288 }
1289
1290}
Len Brownd70e28f2016-03-13 00:33:48 -05001291/*
1292 * sklh_idle_state_table_update(void)
1293 *
1294 * On SKL-H (model 0x5e) disable C8 and C9 if:
1295 * C10 is enabled and SGX disabled
1296 */
1297static void sklh_idle_state_table_update(void)
1298{
1299 unsigned long long msr;
1300 unsigned int eax, ebx, ecx, edx;
1301
1302
1303 /* if PC10 disabled via cmdline intel_idle.max_cstate=7 or shallower */
1304 if (max_cstate <= 7)
1305 return;
1306
1307 /* if PC10 not present in CPUID.MWAIT.EDX */
1308 if ((mwait_substates & (0xF << 28)) == 0)
1309 return;
1310
Len Brown6cfb2372017-01-07 23:23:25 -05001311 rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr);
Len Brownd70e28f2016-03-13 00:33:48 -05001312
1313 /* PC10 is not enabled in PKG C-state limit */
1314 if ((msr & 0xF) != 8)
1315 return;
1316
1317 ecx = 0;
1318 cpuid(7, &eax, &ebx, &ecx, &edx);
1319
1320 /* if SGX is present */
1321 if (ebx & (1 << 2)) {
1322
1323 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
1324
1325 /* if SGX is enabled */
1326 if (msr & (1 << 18))
1327 return;
1328 }
1329
1330 skl_cstates[5].disabled = 1; /* C8-SKL */
1331 skl_cstates[6].disabled = 1; /* C9-SKL */
1332}
1333/*
Len Brown0138d8f2014-04-04 01:21:07 -04001334 * intel_idle_state_table_update()
1335 *
1336 * Update the default state_table for this CPU-id
Len Brown0138d8f2014-04-04 01:21:07 -04001337 */
Len Brownd70e28f2016-03-13 00:33:48 -05001338
1339static void intel_idle_state_table_update(void)
Len Brown0138d8f2014-04-04 01:21:07 -04001340{
Len Brownd70e28f2016-03-13 00:33:48 -05001341 switch (boot_cpu_data.x86_model) {
Len Brown0138d8f2014-04-04 01:21:07 -04001342
Dave Hansendb73c5a2016-06-02 17:19:32 -07001343 case INTEL_FAM6_IVYBRIDGE_X:
Len Brownd70e28f2016-03-13 00:33:48 -05001344 ivt_idle_state_table_update();
1345 break;
Dave Hansendb73c5a2016-06-02 17:19:32 -07001346 case INTEL_FAM6_ATOM_GOLDMONT:
Peter Zijlstraeb8921e2018-08-07 10:17:27 -07001347 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
Len Brown5dcef692016-04-06 17:00:47 -04001348 bxt_idle_state_table_update();
1349 break;
Dave Hansendb73c5a2016-06-02 17:19:32 -07001350 case INTEL_FAM6_SKYLAKE_DESKTOP:
Len Brownd70e28f2016-03-13 00:33:48 -05001351 sklh_idle_state_table_update();
1352 break;
Len Brown0138d8f2014-04-04 01:21:07 -04001353 }
Len Brown0138d8f2014-04-04 01:21:07 -04001354}
1355
Len Brown26717172010-03-08 14:07:30 -05001356/*
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301357 * intel_idle_cpuidle_driver_init()
1358 * allocate, initialize cpuidle_states
1359 */
Richard Cochran5469c822016-04-06 17:00:49 -04001360static void __init intel_idle_cpuidle_driver_init(void)
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301361{
1362 int cstate;
1363 struct cpuidle_driver *drv = &intel_idle_driver;
1364
Len Brown0138d8f2014-04-04 01:21:07 -04001365 intel_idle_state_table_update();
1366
Rafael J. Wysocki1b39e3f2017-08-29 03:14:37 +02001367 cpuidle_poll_state_init(drv);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301368 drv->state_count = 1;
1369
Len Browne022e7e2013-02-01 23:37:30 -05001370 for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) {
Len Brown24bfa952014-02-14 00:50:34 -05001371 int num_substates, mwait_hint, mwait_cstate;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301372
Len Brown7dd0e0a2015-05-27 17:11:37 -04001373 if ((cpuidle_state_table[cstate].enter == NULL) &&
Rafael J. Wysocki28ba0862017-08-10 00:14:45 +02001374 (cpuidle_state_table[cstate].enter_s2idle == NULL))
Len Browne022e7e2013-02-01 23:37:30 -05001375 break;
1376
1377 if (cstate + 1 > max_cstate) {
Joe Perches654d08a2017-06-09 12:29:20 -07001378 pr_info("max_cstate %d reached\n", max_cstate);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301379 break;
1380 }
1381
Len Browne022e7e2013-02-01 23:37:30 -05001382 mwait_hint = flg2MWAIT(cpuidle_state_table[cstate].flags);
1383 mwait_cstate = MWAIT_HINT2CSTATE(mwait_hint);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301384
Len Brown24bfa952014-02-14 00:50:34 -05001385 /* number of sub-states for this state in CPUID.MWAIT */
Len Browne022e7e2013-02-01 23:37:30 -05001386 num_substates = (mwait_substates >> ((mwait_cstate + 1) * 4))
1387 & MWAIT_SUBSTATE_MASK;
1388
Len Brown24bfa952014-02-14 00:50:34 -05001389 /* if NO sub-states for this state in CPUID, skip it */
1390 if (num_substates == 0)
Len Browne022e7e2013-02-01 23:37:30 -05001391 continue;
1392
Len Brownd70e28f2016-03-13 00:33:48 -05001393 /* if state marked as disabled, skip it */
1394 if (cpuidle_state_table[cstate].disabled != 0) {
Joe Perches654d08a2017-06-09 12:29:20 -07001395 pr_debug("state %s is disabled\n",
1396 cpuidle_state_table[cstate].name);
Len Brownd70e28f2016-03-13 00:33:48 -05001397 continue;
1398 }
1399
1400
Len Browne022e7e2013-02-01 23:37:30 -05001401 if (((mwait_cstate + 1) > 2) &&
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301402 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
1403 mark_tsc_unstable("TSC halts in idle"
1404 " states deeper than C2");
1405
Peter Zijlstra893b2aa2022-10-27 13:55:09 -07001406 if (cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS) &&
1407 cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_IBRS) {
1408 drv->states[drv->state_count].enter = intel_idle_ibrs;
1409 }
1410
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301411 drv->states[drv->state_count] = /* structure copy */
1412 cpuidle_state_table[cstate];
1413
1414 drv->state_count += 1;
1415 }
1416
Len Brown8c058d532014-07-31 15:21:24 -04001417 if (icpu->byt_auto_demotion_disable_flag) {
1418 wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
1419 wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
1420 }
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301421}
1422
1423
1424/*
Thomas Renninger65b7f832012-01-17 22:40:08 +01001425 * intel_idle_cpu_init()
Len Brown26717172010-03-08 14:07:30 -05001426 * allocate, initialize, register cpuidle_devices
Thomas Renninger65b7f832012-01-17 22:40:08 +01001427 * @cpu: cpu/core to initialize
Len Brown26717172010-03-08 14:07:30 -05001428 */
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001429static int intel_idle_cpu_init(unsigned int cpu)
Len Brown26717172010-03-08 14:07:30 -05001430{
Len Brown26717172010-03-08 14:07:30 -05001431 struct cpuidle_device *dev;
1432
Thomas Renninger65b7f832012-01-17 22:40:08 +01001433 dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
Thomas Renninger65b7f832012-01-17 22:40:08 +01001434 dev->cpu = cpu;
Len Brown26717172010-03-08 14:07:30 -05001435
Thomas Renninger65b7f832012-01-17 22:40:08 +01001436 if (cpuidle_register_device(dev)) {
Joe Perches654d08a2017-06-09 12:29:20 -07001437 pr_debug("cpuidle_register_device %d failed!\n", cpu);
Thomas Renninger65b7f832012-01-17 22:40:08 +01001438 return -EIO;
Len Brown26717172010-03-08 14:07:30 -05001439 }
1440
Andi Kleenb66b8b92012-01-26 00:09:07 +01001441 if (icpu->auto_demotion_disable_flags)
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001442 auto_demotion_disable();
Thomas Renninger65b7f832012-01-17 22:40:08 +01001443
Bartlomiej Zolnierkiewiczdbf87ab2013-12-20 19:47:28 +01001444 if (icpu->disable_promotion_to_c1e)
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001445 c1e_promotion_disable();
1446
1447 return 0;
1448}
1449
1450static int intel_idle_cpu_online(unsigned int cpu)
1451{
1452 struct cpuidle_device *dev;
1453
1454 if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
1455 __setup_broadcast_timer(true);
1456
1457 /*
1458 * Some systems can hotplug a cpu at runtime after
1459 * the kernel has booted, we have to initialize the
1460 * driver in this case
1461 */
1462 dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
1463 if (!dev->registered)
1464 return intel_idle_cpu_init(cpu);
Bartlomiej Zolnierkiewiczdbf87ab2013-12-20 19:47:28 +01001465
Len Brown26717172010-03-08 14:07:30 -05001466 return 0;
1467}
Len Brown26717172010-03-08 14:07:30 -05001468
1469static int __init intel_idle_init(void)
1470{
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001471 int retval;
Len Brown26717172010-03-08 14:07:30 -05001472
Thomas Renningerd1896042010-11-03 17:06:14 +01001473 /* Do not load intel_idle at all for now if idle= is passed */
1474 if (boot_option_idle_override != IDLE_NO_OVERRIDE)
1475 return -ENODEV;
1476
Len Brown26717172010-03-08 14:07:30 -05001477 retval = intel_idle_probe();
1478 if (retval)
1479 return retval;
1480
Richard Cochrane9df69c2016-04-06 17:00:52 -04001481 intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
1482 if (intel_idle_cpuidle_devices == NULL)
1483 return -ENOMEM;
1484
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +05301485 intel_idle_cpuidle_driver_init();
Len Brown26717172010-03-08 14:07:30 -05001486 retval = cpuidle_register_driver(&intel_idle_driver);
1487 if (retval) {
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +02001488 struct cpuidle_driver *drv = cpuidle_get_driver();
Joe Perches654d08a2017-06-09 12:29:20 -07001489 printk(KERN_DEBUG pr_fmt("intel_idle yielding to %s\n"),
1490 drv ? drv->name : "none");
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001491 goto init_driver_fail;
Len Brown26717172010-03-08 14:07:30 -05001492 }
1493
Richard Cochran2259a812016-04-06 17:00:54 -04001494 if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
1495 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
Richard Cochran2259a812016-04-06 17:00:54 -04001496
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001497 retval = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "idle/intel:online",
1498 intel_idle_cpu_online, NULL);
1499 if (retval < 0)
1500 goto hp_setup_fail;
Len Brown26717172010-03-08 14:07:30 -05001501
Joe Perches654d08a2017-06-09 12:29:20 -07001502 pr_debug("lapic_timer_reliable_states 0x%x\n",
1503 lapic_timer_reliable_states);
Richard Cochran2259a812016-04-06 17:00:54 -04001504
Len Brown26717172010-03-08 14:07:30 -05001505 return 0;
Sebastian Andrzej Siewiorfb1013a2016-11-29 10:51:43 +01001506
1507hp_setup_fail:
1508 intel_idle_cpuidle_devices_uninit();
1509 cpuidle_unregister_driver(&intel_idle_driver);
1510init_driver_fail:
1511 free_percpu(intel_idle_cpuidle_devices);
1512 return retval;
1513
Len Brown26717172010-03-08 14:07:30 -05001514}
Paul Gortmaker02c4fae2016-06-17 01:28:33 -04001515device_initcall(intel_idle_init);
Len Brown26717172010-03-08 14:07:30 -05001516
Paul Gortmaker02c4fae2016-06-17 01:28:33 -04001517/*
1518 * We are not really modular, but we used to support that. Meaning we also
1519 * support "intel_idle.max_cstate=..." at boot and also a read-only export of
1520 * it at /sys/module/intel_idle/parameters/max_cstate -- so using module_param
1521 * is the easiest way (currently) to continue doing that.
1522 */
Len Brown26717172010-03-08 14:07:30 -05001523module_param(max_cstate, int, 0444);