Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1 | /* |
| 2 | * intel_idle.c - native hardware idle loop for modern Intel processors |
| 3 | * |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 4 | * Copyright (c) 2013, Intel Corporation. |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 5 | * Len Brown <len.brown@intel.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms and conditions of the GNU General Public License, |
| 9 | * version 2, as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program; if not, write to the Free Software Foundation, Inc., |
| 18 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * intel_idle is a cpuidle driver that loads on specific Intel processors |
| 23 | * in lieu of the legacy ACPI processor_idle driver. The intent is to |
| 24 | * make Linux more efficient on these processors, as intel_idle knows |
| 25 | * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs. |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * Design Assumptions |
| 30 | * |
| 31 | * All CPUs have same idle states as boot CPU |
| 32 | * |
| 33 | * Chipset BM_STS (bus master status) bit is a NOP |
| 34 | * for preventing entry into deep C-stats |
| 35 | */ |
| 36 | |
| 37 | /* |
| 38 | * Known limitations |
| 39 | * |
| 40 | * The driver currently initializes for_each_online_cpu() upon modprobe. |
| 41 | * It it unaware of subsequent processors hot-added to the system. |
| 42 | * This means that if you boot with maxcpus=n and later online |
| 43 | * processors above n, those processors will use C1 only. |
| 44 | * |
| 45 | * ACPI has a .suspend hack to turn off deep c-statees during suspend |
| 46 | * to avoid complications with the lapic timer workaround. |
| 47 | * Have not seen issues with suspend, but may need same workaround here. |
| 48 | * |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 49 | */ |
| 50 | |
| 51 | /* un-comment DEBUG to enable pr_debug() statements */ |
| 52 | #define DEBUG |
| 53 | |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 54 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 55 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 56 | #include <linux/kernel.h> |
| 57 | #include <linux/cpuidle.h> |
Thomas Gleixner | 76962ca | 2015-04-03 02:02:34 +0200 | [diff] [blame] | 58 | #include <linux/tick.h> |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 59 | #include <trace/events/power.h> |
| 60 | #include <linux/sched.h> |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 61 | #include <linux/sched/smt.h> |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 62 | #include <linux/notifier.h> |
| 63 | #include <linux/cpu.h> |
Paul Gortmaker | 02c4fae | 2016-06-17 01:28:33 -0400 | [diff] [blame] | 64 | #include <linux/moduleparam.h> |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 65 | #include <asm/cpu_device_id.h> |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 66 | #include <asm/intel-family.h> |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 67 | #include <asm/nospec-branch.h> |
H. Peter Anvin | bc83ccc | 2010-09-17 15:36:40 -0700 | [diff] [blame] | 68 | #include <asm/mwait.h> |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 69 | #include <asm/msr.h> |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 70 | |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 71 | #define INTEL_IDLE_VERSION "0.4.1" |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 72 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 73 | static struct cpuidle_driver intel_idle_driver = { |
| 74 | .name = "intel_idle", |
| 75 | .owner = THIS_MODULE, |
| 76 | }; |
| 77 | /* intel_idle.max_cstate=0 disables driver */ |
Len Brown | 137ecc7 | 2013-02-01 21:35:35 -0500 | [diff] [blame] | 78 | static int max_cstate = CPUIDLE_STATE_MAX - 1; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 79 | |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 80 | static unsigned int mwait_substates; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 81 | |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 82 | #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 83 | /* Reliable LAPIC Timer States, bit 1 for C1 etc. */ |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 84 | static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */ |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 85 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 86 | struct idle_cpu { |
| 87 | struct cpuidle_state *state_table; |
| 88 | |
| 89 | /* |
| 90 | * Hardware C-state auto-demotion may not always be optimal. |
| 91 | * Indicate which enable bits to clear here. |
| 92 | */ |
| 93 | unsigned long auto_demotion_disable_flags; |
Len Brown | 8c058d53 | 2014-07-31 15:21:24 -0400 | [diff] [blame] | 94 | bool byt_auto_demotion_disable_flag; |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 95 | bool disable_promotion_to_c1e; |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 96 | }; |
| 97 | |
| 98 | static const struct idle_cpu *icpu; |
Namhyung Kim | 3265eba | 2010-08-08 03:10:03 +0900 | [diff] [blame] | 99 | static struct cpuidle_device __percpu *intel_idle_cpuidle_devices; |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 100 | static int intel_idle(struct cpuidle_device *dev, |
| 101 | struct cpuidle_driver *drv, int index); |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 102 | static int intel_idle_ibrs(struct cpuidle_device *dev, |
| 103 | struct cpuidle_driver *drv, int index); |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 104 | static void intel_idle_s2idle(struct cpuidle_device *dev, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 105 | struct cpuidle_driver *drv, int index); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 106 | static struct cpuidle_state *cpuidle_state_table; |
| 107 | |
| 108 | /* |
Len Brown | 956d033 | 2011-01-12 02:51:20 -0500 | [diff] [blame] | 109 | * Set this flag for states where the HW flushes the TLB for us |
| 110 | * and so we don't need cross-calls to keep it consistent. |
| 111 | * If this flag is set, SW flushes the TLB, so even if the |
| 112 | * HW doesn't do the flushing, this flag is safe to use. |
| 113 | */ |
| 114 | #define CPUIDLE_FLAG_TLB_FLUSHED 0x10000 |
| 115 | |
| 116 | /* |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 117 | * Disable IBRS across idle (when KERNEL_IBRS), is exclusive vs IRQ_ENABLE |
| 118 | * above. |
| 119 | */ |
| 120 | #define CPUIDLE_FLAG_IBRS BIT(16) |
| 121 | |
| 122 | /* |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame] | 123 | * MWAIT takes an 8-bit "hint" in EAX "suggesting" |
| 124 | * the C-state (top nibble) and sub-state (bottom nibble) |
| 125 | * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc. |
| 126 | * |
| 127 | * We store the hint at the top of our "flags" for each state. |
| 128 | */ |
| 129 | #define flg2MWAIT(flags) (((flags) >> 24) & 0xFF) |
| 130 | #define MWAIT2flg(eax) ((eax & 0xFF) << 24) |
| 131 | |
| 132 | /* |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 133 | * States are indexed by the cstate number, |
| 134 | * which is also the index into the MWAIT hint array. |
| 135 | * Thus C0 is a dummy. |
| 136 | */ |
Jiang Liu | ba0dc81 | 2014-01-09 15:30:26 +0800 | [diff] [blame] | 137 | static struct cpuidle_state nehalem_cstates[] = { |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 138 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 139 | .name = "C1", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 140 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 141 | .flags = MWAIT2flg(0x00), |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 142 | .exit_latency = 3, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 143 | .target_residency = 6, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 144 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 145 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 146 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 147 | .name = "C1E", |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 148 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 149 | .flags = MWAIT2flg(0x01), |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 150 | .exit_latency = 10, |
| 151 | .target_residency = 20, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 152 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 153 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 154 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 155 | .name = "C3", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 156 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 157 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 158 | .exit_latency = 20, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 159 | .target_residency = 80, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 160 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 161 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 162 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 163 | .name = "C6", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 164 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 165 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 166 | .exit_latency = 200, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 167 | .target_residency = 800, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 168 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 169 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 170 | { |
| 171 | .enter = NULL } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 172 | }; |
| 173 | |
Jiang Liu | ba0dc81 | 2014-01-09 15:30:26 +0800 | [diff] [blame] | 174 | static struct cpuidle_state snb_cstates[] = { |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 175 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 176 | .name = "C1", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 177 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 178 | .flags = MWAIT2flg(0x00), |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 179 | .exit_latency = 2, |
| 180 | .target_residency = 2, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 181 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 182 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 183 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 184 | .name = "C1E", |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 185 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 186 | .flags = MWAIT2flg(0x01), |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 187 | .exit_latency = 10, |
| 188 | .target_residency = 20, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 189 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 190 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 191 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 192 | .name = "C3", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 193 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 194 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 195 | .exit_latency = 80, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 196 | .target_residency = 211, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 197 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 198 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 199 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 200 | .name = "C6", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 201 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 202 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 203 | .exit_latency = 104, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 204 | .target_residency = 345, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 205 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 206 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 207 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 208 | .name = "C7", |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 209 | .desc = "MWAIT 0x30", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 210 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 211 | .exit_latency = 109, |
Len Brown | ddbd550 | 2010-12-13 18:28:22 -0500 | [diff] [blame] | 212 | .target_residency = 345, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 213 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 214 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 215 | { |
| 216 | .enter = NULL } |
Len Brown | d13780d | 2010-07-07 00:12:03 -0400 | [diff] [blame] | 217 | }; |
| 218 | |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 219 | static struct cpuidle_state byt_cstates[] = { |
| 220 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 221 | .name = "C1", |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 222 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 223 | .flags = MWAIT2flg(0x00), |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 224 | .exit_latency = 1, |
| 225 | .target_residency = 1, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 226 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 227 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 228 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 229 | .name = "C6N", |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 230 | .desc = "MWAIT 0x58", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 231 | .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d7ef767 | 2015-03-24 23:23:20 -0400 | [diff] [blame] | 232 | .exit_latency = 300, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 233 | .target_residency = 275, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 234 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 235 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 236 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 237 | .name = "C6S", |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 238 | .desc = "MWAIT 0x52", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 239 | .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | d7ef767 | 2015-03-24 23:23:20 -0400 | [diff] [blame] | 240 | .exit_latency = 500, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 241 | .target_residency = 560, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 242 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 243 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 244 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 245 | .name = "C7", |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 246 | .desc = "MWAIT 0x60", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 247 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 248 | .exit_latency = 1200, |
Len Brown | d7ef767 | 2015-03-24 23:23:20 -0400 | [diff] [blame] | 249 | .target_residency = 4000, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 250 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 251 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 252 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 253 | .name = "C7S", |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 254 | .desc = "MWAIT 0x64", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 255 | .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 256 | .exit_latency = 10000, |
| 257 | .target_residency = 20000, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 258 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 259 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 260 | { |
| 261 | .enter = NULL } |
| 262 | }; |
| 263 | |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 264 | static struct cpuidle_state cht_cstates[] = { |
| 265 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 266 | .name = "C1", |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 267 | .desc = "MWAIT 0x00", |
| 268 | .flags = MWAIT2flg(0x00), |
| 269 | .exit_latency = 1, |
| 270 | .target_residency = 1, |
| 271 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 272 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 273 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 274 | .name = "C6N", |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 275 | .desc = "MWAIT 0x58", |
| 276 | .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 277 | .exit_latency = 80, |
| 278 | .target_residency = 275, |
| 279 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 280 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 281 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 282 | .name = "C6S", |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 283 | .desc = "MWAIT 0x52", |
| 284 | .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 285 | .exit_latency = 200, |
| 286 | .target_residency = 560, |
| 287 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 288 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 289 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 290 | .name = "C7", |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 291 | .desc = "MWAIT 0x60", |
| 292 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 293 | .exit_latency = 1200, |
| 294 | .target_residency = 4000, |
| 295 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 296 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 297 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 298 | .name = "C7S", |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 299 | .desc = "MWAIT 0x64", |
| 300 | .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 301 | .exit_latency = 10000, |
| 302 | .target_residency = 20000, |
| 303 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 304 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 305 | { |
| 306 | .enter = NULL } |
| 307 | }; |
| 308 | |
Jiang Liu | ba0dc81 | 2014-01-09 15:30:26 +0800 | [diff] [blame] | 309 | static struct cpuidle_state ivb_cstates[] = { |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 310 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 311 | .name = "C1", |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 312 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 313 | .flags = MWAIT2flg(0x00), |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 314 | .exit_latency = 1, |
| 315 | .target_residency = 1, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 316 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 317 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 318 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 319 | .name = "C1E", |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 320 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 321 | .flags = MWAIT2flg(0x01), |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 322 | .exit_latency = 10, |
| 323 | .target_residency = 20, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 324 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 325 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 326 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 327 | .name = "C3", |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 328 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 329 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 330 | .exit_latency = 59, |
| 331 | .target_residency = 156, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 332 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 333 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 334 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 335 | .name = "C6", |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 336 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 337 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 338 | .exit_latency = 80, |
| 339 | .target_residency = 300, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 340 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 341 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 342 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 343 | .name = "C7", |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 344 | .desc = "MWAIT 0x30", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 345 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 346 | .exit_latency = 87, |
| 347 | .target_residency = 300, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 348 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 349 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 350 | { |
| 351 | .enter = NULL } |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 352 | }; |
| 353 | |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 354 | static struct cpuidle_state ivt_cstates[] = { |
| 355 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 356 | .name = "C1", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 357 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 358 | .flags = MWAIT2flg(0x00), |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 359 | .exit_latency = 1, |
| 360 | .target_residency = 1, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 361 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 362 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 363 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 364 | .name = "C1E", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 365 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 366 | .flags = MWAIT2flg(0x01), |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 367 | .exit_latency = 10, |
| 368 | .target_residency = 80, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 369 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 370 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 371 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 372 | .name = "C3", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 373 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 374 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 375 | .exit_latency = 59, |
| 376 | .target_residency = 156, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 377 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 378 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 379 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 380 | .name = "C6", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 381 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 382 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 383 | .exit_latency = 82, |
| 384 | .target_residency = 300, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 385 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 386 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 387 | { |
| 388 | .enter = NULL } |
| 389 | }; |
| 390 | |
| 391 | static struct cpuidle_state ivt_cstates_4s[] = { |
| 392 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 393 | .name = "C1", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 394 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 395 | .flags = MWAIT2flg(0x00), |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 396 | .exit_latency = 1, |
| 397 | .target_residency = 1, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 398 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 399 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 400 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 401 | .name = "C1E", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 402 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 403 | .flags = MWAIT2flg(0x01), |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 404 | .exit_latency = 10, |
| 405 | .target_residency = 250, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 406 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 407 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 408 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 409 | .name = "C3", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 410 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 411 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 412 | .exit_latency = 59, |
| 413 | .target_residency = 300, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 414 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 415 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 416 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 417 | .name = "C6", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 418 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 419 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 420 | .exit_latency = 84, |
| 421 | .target_residency = 400, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 422 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 423 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 424 | { |
| 425 | .enter = NULL } |
| 426 | }; |
| 427 | |
| 428 | static struct cpuidle_state ivt_cstates_8s[] = { |
| 429 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 430 | .name = "C1", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 431 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 432 | .flags = MWAIT2flg(0x00), |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 433 | .exit_latency = 1, |
| 434 | .target_residency = 1, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 435 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 436 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 437 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 438 | .name = "C1E", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 439 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 440 | .flags = MWAIT2flg(0x01), |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 441 | .exit_latency = 10, |
| 442 | .target_residency = 500, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 443 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 444 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 445 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 446 | .name = "C3", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 447 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 448 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 449 | .exit_latency = 59, |
| 450 | .target_residency = 600, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 451 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 452 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 453 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 454 | .name = "C6", |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 455 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 456 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 457 | .exit_latency = 88, |
| 458 | .target_residency = 700, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 459 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 460 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 461 | { |
| 462 | .enter = NULL } |
| 463 | }; |
| 464 | |
Jiang Liu | ba0dc81 | 2014-01-09 15:30:26 +0800 | [diff] [blame] | 465 | static struct cpuidle_state hsw_cstates[] = { |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 466 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 467 | .name = "C1", |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 468 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 469 | .flags = MWAIT2flg(0x00), |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 470 | .exit_latency = 2, |
| 471 | .target_residency = 2, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 472 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 473 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 474 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 475 | .name = "C1E", |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 476 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 477 | .flags = MWAIT2flg(0x01), |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 478 | .exit_latency = 10, |
| 479 | .target_residency = 20, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 480 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 481 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 482 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 483 | .name = "C3", |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 484 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 485 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 486 | .exit_latency = 33, |
| 487 | .target_residency = 100, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 488 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 489 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 490 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 491 | .name = "C6", |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 492 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 493 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 494 | .exit_latency = 133, |
| 495 | .target_residency = 400, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 496 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 497 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 498 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 499 | .name = "C7s", |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 500 | .desc = "MWAIT 0x32", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 501 | .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 502 | .exit_latency = 166, |
| 503 | .target_residency = 500, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 504 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 505 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 506 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 507 | .name = "C8", |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 508 | .desc = "MWAIT 0x40", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 509 | .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 510 | .exit_latency = 300, |
| 511 | .target_residency = 900, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 512 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 513 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 514 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 515 | .name = "C9", |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 516 | .desc = "MWAIT 0x50", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 517 | .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 518 | .exit_latency = 600, |
| 519 | .target_residency = 1800, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 520 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 521 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 522 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 523 | .name = "C10", |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 524 | .desc = "MWAIT 0x60", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 525 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 526 | .exit_latency = 2600, |
| 527 | .target_residency = 7700, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 528 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 529 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 86239ce | 2013-02-27 13:18:50 -0500 | [diff] [blame] | 530 | { |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 531 | .enter = NULL } |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 532 | }; |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 533 | static struct cpuidle_state bdw_cstates[] = { |
| 534 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 535 | .name = "C1", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 536 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 537 | .flags = MWAIT2flg(0x00), |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 538 | .exit_latency = 2, |
| 539 | .target_residency = 2, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 540 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 541 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 542 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 543 | .name = "C1E", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 544 | .desc = "MWAIT 0x01", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 545 | .flags = MWAIT2flg(0x01), |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 546 | .exit_latency = 10, |
| 547 | .target_residency = 20, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 548 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 549 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 550 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 551 | .name = "C3", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 552 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 553 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 554 | .exit_latency = 40, |
| 555 | .target_residency = 100, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 556 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 557 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 558 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 559 | .name = "C6", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 560 | .desc = "MWAIT 0x20", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 561 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 562 | .exit_latency = 133, |
| 563 | .target_residency = 400, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 564 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 565 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 566 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 567 | .name = "C7s", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 568 | .desc = "MWAIT 0x32", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 569 | .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 570 | .exit_latency = 166, |
| 571 | .target_residency = 500, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 572 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 573 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 574 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 575 | .name = "C8", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 576 | .desc = "MWAIT 0x40", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 577 | .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 578 | .exit_latency = 300, |
| 579 | .target_residency = 900, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 580 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 581 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 582 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 583 | .name = "C9", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 584 | .desc = "MWAIT 0x50", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 585 | .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 586 | .exit_latency = 600, |
| 587 | .target_residency = 1800, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 588 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 589 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 590 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 591 | .name = "C10", |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 592 | .desc = "MWAIT 0x60", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 593 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 594 | .exit_latency = 2600, |
| 595 | .target_residency = 7700, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 596 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 597 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 598 | { |
| 599 | .enter = NULL } |
| 600 | }; |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 601 | |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 602 | static struct cpuidle_state skl_cstates[] = { |
| 603 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 604 | .name = "C1", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 605 | .desc = "MWAIT 0x00", |
| 606 | .flags = MWAIT2flg(0x00), |
| 607 | .exit_latency = 2, |
| 608 | .target_residency = 2, |
| 609 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 610 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 611 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 612 | .name = "C1E", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 613 | .desc = "MWAIT 0x01", |
| 614 | .flags = MWAIT2flg(0x01), |
| 615 | .exit_latency = 10, |
| 616 | .target_residency = 20, |
| 617 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 618 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 619 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 620 | .name = "C3", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 621 | .desc = "MWAIT 0x10", |
| 622 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 623 | .exit_latency = 70, |
| 624 | .target_residency = 100, |
| 625 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 626 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 627 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 628 | .name = "C6", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 629 | .desc = "MWAIT 0x20", |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 630 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS, |
Len Brown | 135919a | 2015-09-09 13:35:05 -0400 | [diff] [blame] | 631 | .exit_latency = 85, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 632 | .target_residency = 200, |
| 633 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 634 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 635 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 636 | .name = "C7s", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 637 | .desc = "MWAIT 0x33", |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 638 | .flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 639 | .exit_latency = 124, |
| 640 | .target_residency = 800, |
| 641 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 642 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 643 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 644 | .name = "C8", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 645 | .desc = "MWAIT 0x40", |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 646 | .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS, |
Len Brown | 135919a | 2015-09-09 13:35:05 -0400 | [diff] [blame] | 647 | .exit_latency = 200, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 648 | .target_residency = 800, |
| 649 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 650 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 651 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 652 | .name = "C9", |
Len Brown | 135919a | 2015-09-09 13:35:05 -0400 | [diff] [blame] | 653 | .desc = "MWAIT 0x50", |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 654 | .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS, |
Len Brown | 135919a | 2015-09-09 13:35:05 -0400 | [diff] [blame] | 655 | .exit_latency = 480, |
| 656 | .target_residency = 5000, |
| 657 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 658 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 135919a | 2015-09-09 13:35:05 -0400 | [diff] [blame] | 659 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 660 | .name = "C10", |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 661 | .desc = "MWAIT 0x60", |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 662 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 663 | .exit_latency = 890, |
| 664 | .target_residency = 5000, |
| 665 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 666 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 667 | { |
| 668 | .enter = NULL } |
| 669 | }; |
| 670 | |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 671 | static struct cpuidle_state skx_cstates[] = { |
| 672 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 673 | .name = "C1", |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 674 | .desc = "MWAIT 0x00", |
| 675 | .flags = MWAIT2flg(0x00), |
| 676 | .exit_latency = 2, |
| 677 | .target_residency = 2, |
| 678 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 679 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 680 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 681 | .name = "C1E", |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 682 | .desc = "MWAIT 0x01", |
| 683 | .flags = MWAIT2flg(0x01), |
| 684 | .exit_latency = 10, |
| 685 | .target_residency = 20, |
| 686 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 687 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 688 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 689 | .name = "C6", |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 690 | .desc = "MWAIT 0x20", |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 691 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS, |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 692 | .exit_latency = 133, |
| 693 | .target_residency = 600, |
| 694 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 695 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 696 | { |
| 697 | .enter = NULL } |
| 698 | }; |
| 699 | |
Jiang Liu | ba0dc81 | 2014-01-09 15:30:26 +0800 | [diff] [blame] | 700 | static struct cpuidle_state atom_cstates[] = { |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 701 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 702 | .name = "C1E", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 703 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 704 | .flags = MWAIT2flg(0x00), |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 705 | .exit_latency = 10, |
| 706 | .target_residency = 20, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 707 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 708 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 709 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 710 | .name = "C2", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 711 | .desc = "MWAIT 0x10", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 712 | .flags = MWAIT2flg(0x10), |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 713 | .exit_latency = 20, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 714 | .target_residency = 80, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 715 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 716 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 717 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 718 | .name = "C4", |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 719 | .desc = "MWAIT 0x30", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 720 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 721 | .exit_latency = 100, |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 722 | .target_residency = 400, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 723 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 724 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 725 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 726 | .name = "C6", |
Len Brown | 7fcca7d | 2010-10-05 13:43:14 -0400 | [diff] [blame] | 727 | .desc = "MWAIT 0x52", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 728 | .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | 7fcca7d | 2010-10-05 13:43:14 -0400 | [diff] [blame] | 729 | .exit_latency = 140, |
Len Brown | 7fcca7d | 2010-10-05 13:43:14 -0400 | [diff] [blame] | 730 | .target_residency = 560, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 731 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 732 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 733 | { |
| 734 | .enter = NULL } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 735 | }; |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 736 | static struct cpuidle_state tangier_cstates[] = { |
| 737 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 738 | .name = "C1", |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 739 | .desc = "MWAIT 0x00", |
| 740 | .flags = MWAIT2flg(0x00), |
| 741 | .exit_latency = 1, |
| 742 | .target_residency = 4, |
| 743 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 744 | .enter_s2idle = intel_idle_s2idle, }, |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 745 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 746 | .name = "C4", |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 747 | .desc = "MWAIT 0x30", |
| 748 | .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 749 | .exit_latency = 100, |
| 750 | .target_residency = 400, |
| 751 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 752 | .enter_s2idle = intel_idle_s2idle, }, |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 753 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 754 | .name = "C6", |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 755 | .desc = "MWAIT 0x52", |
| 756 | .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 757 | .exit_latency = 140, |
| 758 | .target_residency = 560, |
| 759 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 760 | .enter_s2idle = intel_idle_s2idle, }, |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 761 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 762 | .name = "C7", |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 763 | .desc = "MWAIT 0x60", |
| 764 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 765 | .exit_latency = 1200, |
| 766 | .target_residency = 4000, |
| 767 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 768 | .enter_s2idle = intel_idle_s2idle, }, |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 769 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 770 | .name = "C9", |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 771 | .desc = "MWAIT 0x64", |
| 772 | .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 773 | .exit_latency = 10000, |
| 774 | .target_residency = 20000, |
| 775 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 776 | .enter_s2idle = intel_idle_s2idle, }, |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 777 | { |
| 778 | .enter = NULL } |
| 779 | }; |
Jiang Liu | 8839099 | 2014-01-09 15:30:27 +0800 | [diff] [blame] | 780 | static struct cpuidle_state avn_cstates[] = { |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 781 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 782 | .name = "C1", |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 783 | .desc = "MWAIT 0x00", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 784 | .flags = MWAIT2flg(0x00), |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 785 | .exit_latency = 2, |
| 786 | .target_residency = 2, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 787 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 788 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 789 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 790 | .name = "C6", |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 791 | .desc = "MWAIT 0x51", |
Daniel Lezcano | b82b6cc | 2014-11-12 16:03:50 +0100 | [diff] [blame] | 792 | .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TLB_FLUSHED, |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 793 | .exit_latency = 15, |
| 794 | .target_residency = 45, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 795 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 796 | .enter_s2idle = intel_idle_s2idle, }, |
Jiang Liu | 8839099 | 2014-01-09 15:30:27 +0800 | [diff] [blame] | 797 | { |
| 798 | .enter = NULL } |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 799 | }; |
Dasaratharaman Chandramouli | 281baf7 | 2014-09-04 17:22:54 -0700 | [diff] [blame] | 800 | static struct cpuidle_state knl_cstates[] = { |
| 801 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 802 | .name = "C1", |
Dasaratharaman Chandramouli | 281baf7 | 2014-09-04 17:22:54 -0700 | [diff] [blame] | 803 | .desc = "MWAIT 0x00", |
| 804 | .flags = MWAIT2flg(0x00), |
| 805 | .exit_latency = 1, |
| 806 | .target_residency = 2, |
| 807 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 808 | .enter_s2idle = intel_idle_s2idle }, |
Dasaratharaman Chandramouli | 281baf7 | 2014-09-04 17:22:54 -0700 | [diff] [blame] | 809 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 810 | .name = "C6", |
Dasaratharaman Chandramouli | 281baf7 | 2014-09-04 17:22:54 -0700 | [diff] [blame] | 811 | .desc = "MWAIT 0x10", |
| 812 | .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 813 | .exit_latency = 120, |
| 814 | .target_residency = 500, |
| 815 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 816 | .enter_s2idle = intel_idle_s2idle }, |
Dasaratharaman Chandramouli | 281baf7 | 2014-09-04 17:22:54 -0700 | [diff] [blame] | 817 | { |
| 818 | .enter = NULL } |
| 819 | }; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 820 | |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 821 | static struct cpuidle_state bxt_cstates[] = { |
| 822 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 823 | .name = "C1", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 824 | .desc = "MWAIT 0x00", |
| 825 | .flags = MWAIT2flg(0x00), |
| 826 | .exit_latency = 2, |
| 827 | .target_residency = 2, |
| 828 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 829 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 830 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 831 | .name = "C1E", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 832 | .desc = "MWAIT 0x01", |
| 833 | .flags = MWAIT2flg(0x01), |
| 834 | .exit_latency = 10, |
| 835 | .target_residency = 20, |
| 836 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 837 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 838 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 839 | .name = "C6", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 840 | .desc = "MWAIT 0x20", |
| 841 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 842 | .exit_latency = 133, |
| 843 | .target_residency = 133, |
| 844 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 845 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 846 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 847 | .name = "C7s", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 848 | .desc = "MWAIT 0x31", |
| 849 | .flags = MWAIT2flg(0x31) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 850 | .exit_latency = 155, |
| 851 | .target_residency = 155, |
| 852 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 853 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 854 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 855 | .name = "C8", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 856 | .desc = "MWAIT 0x40", |
| 857 | .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 858 | .exit_latency = 1000, |
| 859 | .target_residency = 1000, |
| 860 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 861 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 862 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 863 | .name = "C9", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 864 | .desc = "MWAIT 0x50", |
| 865 | .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 866 | .exit_latency = 2000, |
| 867 | .target_residency = 2000, |
| 868 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 869 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 870 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 871 | .name = "C10", |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 872 | .desc = "MWAIT 0x60", |
| 873 | .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 874 | .exit_latency = 10000, |
| 875 | .target_residency = 10000, |
| 876 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 877 | .enter_s2idle = intel_idle_s2idle, }, |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 878 | { |
| 879 | .enter = NULL } |
| 880 | }; |
| 881 | |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 882 | static struct cpuidle_state dnv_cstates[] = { |
| 883 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 884 | .name = "C1", |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 885 | .desc = "MWAIT 0x00", |
| 886 | .flags = MWAIT2flg(0x00), |
| 887 | .exit_latency = 2, |
| 888 | .target_residency = 2, |
| 889 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 890 | .enter_s2idle = intel_idle_s2idle, }, |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 891 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 892 | .name = "C1E", |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 893 | .desc = "MWAIT 0x01", |
| 894 | .flags = MWAIT2flg(0x01), |
| 895 | .exit_latency = 10, |
| 896 | .target_residency = 20, |
| 897 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 898 | .enter_s2idle = intel_idle_s2idle, }, |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 899 | { |
Len Brown | de09cdd | 2017-02-28 16:32:44 -0500 | [diff] [blame] | 900 | .name = "C6", |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 901 | .desc = "MWAIT 0x20", |
| 902 | .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED, |
| 903 | .exit_latency = 50, |
| 904 | .target_residency = 500, |
| 905 | .enter = &intel_idle, |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 906 | .enter_s2idle = intel_idle_s2idle, }, |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 907 | { |
| 908 | .enter = NULL } |
| 909 | }; |
| 910 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 911 | /** |
| 912 | * intel_idle |
| 913 | * @dev: cpuidle_device |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 914 | * @drv: cpuidle driver |
Deepthi Dharwar | e978aa7 | 2011-10-28 16:20:09 +0530 | [diff] [blame] | 915 | * @index: index of cpuidle state |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 916 | * |
Yanmin Zhang | 63ff07b | 2012-01-10 15:48:21 -0800 | [diff] [blame] | 917 | * Must be called under local_irq_disable(). |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 918 | */ |
Chris Metcalf | 6727ad9 | 2016-10-07 17:02:55 -0700 | [diff] [blame] | 919 | static __cpuidle int intel_idle(struct cpuidle_device *dev, |
| 920 | struct cpuidle_driver *drv, int index) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 921 | { |
| 922 | unsigned long ecx = 1; /* break on interrupt flag */ |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 923 | struct cpuidle_state *state = &drv->states[index]; |
Len Brown | b1beab4 | 2013-01-31 19:55:37 -0500 | [diff] [blame] | 924 | unsigned long eax = flg2MWAIT(state->flags); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 925 | unsigned int cstate; |
Andy Lutomirski | 6753573 | 2017-11-04 04:16:12 -0700 | [diff] [blame] | 926 | int cpu = smp_processor_id(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 927 | |
| 928 | cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1; |
| 929 | |
Suresh Siddha | 6110a1f | 2010-09-30 21:19:07 -0400 | [diff] [blame] | 930 | /* |
Andy Lutomirski | 6753573 | 2017-11-04 04:16:12 -0700 | [diff] [blame] | 931 | * leave_mm() to avoid costly and often unnecessary wakeups |
| 932 | * for flushing the user TLB's associated with the active mm. |
Suresh Siddha | 6110a1f | 2010-09-30 21:19:07 -0400 | [diff] [blame] | 933 | */ |
Andy Lutomirski | 6753573 | 2017-11-04 04:16:12 -0700 | [diff] [blame] | 934 | if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED) |
| 935 | leave_mm(cpu); |
Suresh Siddha | 6110a1f | 2010-09-30 21:19:07 -0400 | [diff] [blame] | 936 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 937 | if (!(lapic_timer_reliable_states & (1 << (cstate)))) |
Thomas Gleixner | f6cee19 | 2015-04-03 02:14:23 +0200 | [diff] [blame] | 938 | tick_broadcast_enter(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 939 | |
Peter Zijlstra | 1682425 | 2013-12-12 15:08:36 +0100 | [diff] [blame] | 940 | mwait_idle_with_hints(eax, ecx); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 941 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 942 | if (!(lapic_timer_reliable_states & (1 << (cstate)))) |
Thomas Gleixner | f6cee19 | 2015-04-03 02:14:23 +0200 | [diff] [blame] | 943 | tick_broadcast_exit(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 944 | |
Deepthi Dharwar | e978aa7 | 2011-10-28 16:20:09 +0530 | [diff] [blame] | 945 | return index; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 946 | } |
| 947 | |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 948 | static __cpuidle int intel_idle_ibrs(struct cpuidle_device *dev, |
| 949 | struct cpuidle_driver *drv, int index) |
| 950 | { |
| 951 | bool smt_active = sched_smt_active(); |
| 952 | u64 spec_ctrl = spec_ctrl_current(); |
| 953 | int ret; |
| 954 | |
| 955 | if (smt_active) |
| 956 | wrmsrl(MSR_IA32_SPEC_CTRL, 0); |
| 957 | |
| 958 | ret = intel_idle(dev, drv, index); |
| 959 | |
| 960 | if (smt_active) |
| 961 | wrmsrl(MSR_IA32_SPEC_CTRL, spec_ctrl); |
| 962 | |
| 963 | return ret; |
| 964 | } |
| 965 | |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 966 | /** |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 967 | * intel_idle_s2idle - simplified "enter" callback routine for suspend-to-idle |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 968 | * @dev: cpuidle_device |
| 969 | * @drv: cpuidle driver |
| 970 | * @index: state index |
| 971 | */ |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 972 | static void intel_idle_s2idle(struct cpuidle_device *dev, |
Rafael J. Wysocki | 5fe2e52 | 2015-02-11 05:04:17 +0100 | [diff] [blame] | 973 | struct cpuidle_driver *drv, int index) |
| 974 | { |
| 975 | unsigned long ecx = 1; /* break on interrupt flag */ |
| 976 | unsigned long eax = flg2MWAIT(drv->states[index].flags); |
| 977 | |
| 978 | mwait_idle_with_hints(eax, ecx); |
| 979 | } |
| 980 | |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 981 | static void __setup_broadcast_timer(bool on) |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 982 | { |
Thomas Gleixner | 76962ca | 2015-04-03 02:02:34 +0200 | [diff] [blame] | 983 | if (on) |
| 984 | tick_broadcast_enable(); |
| 985 | else |
| 986 | tick_broadcast_disable(); |
Shaohua Li | 2a2d31c | 2011-01-10 09:38:12 +0800 | [diff] [blame] | 987 | } |
| 988 | |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 989 | static void auto_demotion_disable(void) |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 990 | { |
| 991 | unsigned long long msr_bits; |
| 992 | |
Len Brown | 6cfb237 | 2017-01-07 23:23:25 -0500 | [diff] [blame] | 993 | rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 994 | msr_bits &= ~(icpu->auto_demotion_disable_flags); |
Len Brown | 6cfb237 | 2017-01-07 23:23:25 -0500 | [diff] [blame] | 995 | wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 996 | } |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 997 | static void c1e_promotion_disable(void) |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 998 | { |
| 999 | unsigned long long msr_bits; |
| 1000 | |
| 1001 | rdmsrl(MSR_IA32_POWER_CTL, msr_bits); |
| 1002 | msr_bits &= ~0x2; |
| 1003 | wrmsrl(MSR_IA32_POWER_CTL, msr_bits); |
| 1004 | } |
Len Brown | 14796fc | 2011-01-18 20:48:27 -0500 | [diff] [blame] | 1005 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1006 | static const struct idle_cpu idle_cpu_nehalem = { |
| 1007 | .state_table = nehalem_cstates, |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1008 | .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 1009 | .disable_promotion_to_c1e = true, |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1010 | }; |
| 1011 | |
| 1012 | static const struct idle_cpu idle_cpu_atom = { |
| 1013 | .state_table = atom_cstates, |
| 1014 | }; |
| 1015 | |
Andy Shevchenko | 5e7ec26 | 2016-10-25 17:11:39 +0300 | [diff] [blame] | 1016 | static const struct idle_cpu idle_cpu_tangier = { |
| 1017 | .state_table = tangier_cstates, |
| 1018 | }; |
| 1019 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1020 | static const struct idle_cpu idle_cpu_lincroft = { |
| 1021 | .state_table = atom_cstates, |
| 1022 | .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE, |
| 1023 | }; |
| 1024 | |
| 1025 | static const struct idle_cpu idle_cpu_snb = { |
| 1026 | .state_table = snb_cstates, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 1027 | .disable_promotion_to_c1e = true, |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1028 | }; |
| 1029 | |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 1030 | static const struct idle_cpu idle_cpu_byt = { |
| 1031 | .state_table = byt_cstates, |
| 1032 | .disable_promotion_to_c1e = true, |
Len Brown | 8c058d53 | 2014-07-31 15:21:24 -0400 | [diff] [blame] | 1033 | .byt_auto_demotion_disable_flag = true, |
Len Brown | 718987d | 2014-02-14 02:30:00 -0500 | [diff] [blame] | 1034 | }; |
| 1035 | |
Len Brown | cab07a5 | 2015-03-27 20:54:01 -0400 | [diff] [blame] | 1036 | static const struct idle_cpu idle_cpu_cht = { |
| 1037 | .state_table = cht_cstates, |
| 1038 | .disable_promotion_to_c1e = true, |
| 1039 | .byt_auto_demotion_disable_flag = true, |
| 1040 | }; |
| 1041 | |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 1042 | static const struct idle_cpu idle_cpu_ivb = { |
| 1043 | .state_table = ivb_cstates, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 1044 | .disable_promotion_to_c1e = true, |
Len Brown | 6edab08 | 2012-06-01 19:45:32 -0400 | [diff] [blame] | 1045 | }; |
| 1046 | |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1047 | static const struct idle_cpu idle_cpu_ivt = { |
| 1048 | .state_table = ivt_cstates, |
| 1049 | .disable_promotion_to_c1e = true, |
| 1050 | }; |
| 1051 | |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 1052 | static const struct idle_cpu idle_cpu_hsw = { |
| 1053 | .state_table = hsw_cstates, |
Len Brown | 32e9518 | 2013-02-02 01:31:56 -0500 | [diff] [blame] | 1054 | .disable_promotion_to_c1e = true, |
Len Brown | 85a4d2d | 2013-01-31 14:40:49 -0500 | [diff] [blame] | 1055 | }; |
| 1056 | |
Len Brown | a138b56 | 2014-02-04 23:56:40 -0500 | [diff] [blame] | 1057 | static const struct idle_cpu idle_cpu_bdw = { |
| 1058 | .state_table = bdw_cstates, |
| 1059 | .disable_promotion_to_c1e = true, |
| 1060 | }; |
| 1061 | |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 1062 | static const struct idle_cpu idle_cpu_skl = { |
| 1063 | .state_table = skl_cstates, |
| 1064 | .disable_promotion_to_c1e = true, |
| 1065 | }; |
| 1066 | |
Len Brown | f9e7165 | 2016-04-06 17:00:58 -0400 | [diff] [blame] | 1067 | static const struct idle_cpu idle_cpu_skx = { |
| 1068 | .state_table = skx_cstates, |
| 1069 | .disable_promotion_to_c1e = true, |
| 1070 | }; |
Len Brown | 493f133 | 2015-03-25 23:20:37 -0400 | [diff] [blame] | 1071 | |
Len Brown | fab04b2 | 2013-11-09 00:30:17 -0500 | [diff] [blame] | 1072 | static const struct idle_cpu idle_cpu_avn = { |
| 1073 | .state_table = avn_cstates, |
| 1074 | .disable_promotion_to_c1e = true, |
| 1075 | }; |
| 1076 | |
Dasaratharaman Chandramouli | 281baf7 | 2014-09-04 17:22:54 -0700 | [diff] [blame] | 1077 | static const struct idle_cpu idle_cpu_knl = { |
| 1078 | .state_table = knl_cstates, |
| 1079 | }; |
| 1080 | |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1081 | static const struct idle_cpu idle_cpu_bxt = { |
| 1082 | .state_table = bxt_cstates, |
| 1083 | .disable_promotion_to_c1e = true, |
| 1084 | }; |
| 1085 | |
Jacob Pan | 0080d65 | 2016-06-17 01:28:34 -0400 | [diff] [blame] | 1086 | static const struct idle_cpu idle_cpu_dnv = { |
| 1087 | .state_table = dnv_cstates, |
| 1088 | .disable_promotion_to_c1e = true, |
| 1089 | }; |
| 1090 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1091 | #define ICPU(model, cpu) \ |
Len Brown | a343999 | 2017-11-09 02:19:39 -0500 | [diff] [blame] | 1092 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&cpu } |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1093 | |
Mathias Krause | d5cdc3c | 2015-03-25 22:15:14 +0100 | [diff] [blame] | 1094 | static const struct x86_cpu_id intel_idle_ids[] __initconst = { |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1095 | ICPU(INTEL_FAM6_NEHALEM_EP, idle_cpu_nehalem), |
| 1096 | ICPU(INTEL_FAM6_NEHALEM, idle_cpu_nehalem), |
Dave Hansen | 4b3b234 | 2016-06-29 12:27:37 -0700 | [diff] [blame] | 1097 | ICPU(INTEL_FAM6_NEHALEM_G, idle_cpu_nehalem), |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1098 | ICPU(INTEL_FAM6_WESTMERE, idle_cpu_nehalem), |
| 1099 | ICPU(INTEL_FAM6_WESTMERE_EP, idle_cpu_nehalem), |
| 1100 | ICPU(INTEL_FAM6_NEHALEM_EX, idle_cpu_nehalem), |
Peter Zijlstra | eb8921e | 2018-08-07 10:17:27 -0700 | [diff] [blame] | 1101 | ICPU(INTEL_FAM6_ATOM_BONNELL, idle_cpu_atom), |
| 1102 | ICPU(INTEL_FAM6_ATOM_BONNELL_MID, idle_cpu_lincroft), |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1103 | ICPU(INTEL_FAM6_WESTMERE_EX, idle_cpu_nehalem), |
| 1104 | ICPU(INTEL_FAM6_SANDYBRIDGE, idle_cpu_snb), |
| 1105 | ICPU(INTEL_FAM6_SANDYBRIDGE_X, idle_cpu_snb), |
Peter Zijlstra | eb8921e | 2018-08-07 10:17:27 -0700 | [diff] [blame] | 1106 | ICPU(INTEL_FAM6_ATOM_SALTWELL, idle_cpu_atom), |
| 1107 | ICPU(INTEL_FAM6_ATOM_SILVERMONT, idle_cpu_byt), |
| 1108 | ICPU(INTEL_FAM6_ATOM_SILVERMONT_MID, idle_cpu_tangier), |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1109 | ICPU(INTEL_FAM6_ATOM_AIRMONT, idle_cpu_cht), |
| 1110 | ICPU(INTEL_FAM6_IVYBRIDGE, idle_cpu_ivb), |
| 1111 | ICPU(INTEL_FAM6_IVYBRIDGE_X, idle_cpu_ivt), |
| 1112 | ICPU(INTEL_FAM6_HASWELL_CORE, idle_cpu_hsw), |
| 1113 | ICPU(INTEL_FAM6_HASWELL_X, idle_cpu_hsw), |
| 1114 | ICPU(INTEL_FAM6_HASWELL_ULT, idle_cpu_hsw), |
| 1115 | ICPU(INTEL_FAM6_HASWELL_GT3E, idle_cpu_hsw), |
Peter Zijlstra | eb8921e | 2018-08-07 10:17:27 -0700 | [diff] [blame] | 1116 | ICPU(INTEL_FAM6_ATOM_SILVERMONT_X, idle_cpu_avn), |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1117 | ICPU(INTEL_FAM6_BROADWELL_CORE, idle_cpu_bdw), |
| 1118 | ICPU(INTEL_FAM6_BROADWELL_GT3E, idle_cpu_bdw), |
| 1119 | ICPU(INTEL_FAM6_BROADWELL_X, idle_cpu_bdw), |
| 1120 | ICPU(INTEL_FAM6_BROADWELL_XEON_D, idle_cpu_bdw), |
| 1121 | ICPU(INTEL_FAM6_SKYLAKE_MOBILE, idle_cpu_skl), |
| 1122 | ICPU(INTEL_FAM6_SKYLAKE_DESKTOP, idle_cpu_skl), |
| 1123 | ICPU(INTEL_FAM6_KABYLAKE_MOBILE, idle_cpu_skl), |
| 1124 | ICPU(INTEL_FAM6_KABYLAKE_DESKTOP, idle_cpu_skl), |
| 1125 | ICPU(INTEL_FAM6_SKYLAKE_X, idle_cpu_skx), |
| 1126 | ICPU(INTEL_FAM6_XEON_PHI_KNL, idle_cpu_knl), |
Piotr Luc | a2c1bc6 | 2016-10-13 17:30:58 +0200 | [diff] [blame] | 1127 | ICPU(INTEL_FAM6_XEON_PHI_KNM, idle_cpu_knl), |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1128 | ICPU(INTEL_FAM6_ATOM_GOLDMONT, idle_cpu_bxt), |
Peter Zijlstra | eb8921e | 2018-08-07 10:17:27 -0700 | [diff] [blame] | 1129 | ICPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, idle_cpu_bxt), |
| 1130 | ICPU(INTEL_FAM6_ATOM_GOLDMONT_X, idle_cpu_dnv), |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1131 | {} |
| 1132 | }; |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1133 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1134 | /* |
| 1135 | * intel_idle_probe() |
| 1136 | */ |
Bartlomiej Zolnierkiewicz | 00f3e75 | 2013-08-30 12:27:45 +0200 | [diff] [blame] | 1137 | static int __init intel_idle_probe(void) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1138 | { |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 1139 | unsigned int eax, ebx, ecx; |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1140 | const struct x86_cpu_id *id; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1141 | |
| 1142 | if (max_cstate == 0) { |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1143 | pr_debug("disabled\n"); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1144 | return -EPERM; |
| 1145 | } |
| 1146 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1147 | id = x86_match_cpu(intel_idle_ids); |
| 1148 | if (!id) { |
| 1149 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && |
| 1150 | boot_cpu_data.x86 == 6) |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1151 | pr_debug("does not run on family %d model %d\n", |
| 1152 | boot_cpu_data.x86, boot_cpu_data.x86_model); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1153 | return -ENODEV; |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1154 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1155 | |
Len Brown | a343999 | 2017-11-09 02:19:39 -0500 | [diff] [blame] | 1156 | if (!boot_cpu_has(X86_FEATURE_MWAIT)) { |
| 1157 | pr_debug("Please enable MWAIT in BIOS SETUP\n"); |
| 1158 | return -ENODEV; |
| 1159 | } |
| 1160 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1161 | if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) |
| 1162 | return -ENODEV; |
| 1163 | |
Len Brown | c423628 | 2010-05-28 02:22:03 -0400 | [diff] [blame] | 1164 | cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1165 | |
| 1166 | if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) || |
Thomas Renninger | 5c2a9f0 | 2011-12-04 22:17:29 +0100 | [diff] [blame] | 1167 | !(ecx & CPUID5_ECX_INTERRUPT_BREAK) || |
| 1168 | !mwait_substates) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1169 | return -ENODEV; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1170 | |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1171 | pr_debug("MWAIT substates: 0x%x\n", mwait_substates); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1172 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1173 | icpu = (const struct idle_cpu *)id->driver_data; |
| 1174 | cpuidle_state_table = icpu->state_table; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1175 | |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1176 | pr_debug("v" INTEL_IDLE_VERSION " model 0x%X\n", |
| 1177 | boot_cpu_data.x86_model); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1178 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1179 | return 0; |
| 1180 | } |
| 1181 | |
| 1182 | /* |
| 1183 | * intel_idle_cpuidle_devices_uninit() |
Richard Cochran | ca42489 | 2016-04-06 17:00:53 -0400 | [diff] [blame] | 1184 | * Unregisters the cpuidle devices. |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1185 | */ |
| 1186 | static void intel_idle_cpuidle_devices_uninit(void) |
| 1187 | { |
| 1188 | int i; |
| 1189 | struct cpuidle_device *dev; |
| 1190 | |
| 1191 | for_each_online_cpu(i) { |
| 1192 | dev = per_cpu_ptr(intel_idle_cpuidle_devices, i); |
| 1193 | cpuidle_unregister_device(dev); |
| 1194 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1195 | } |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1196 | |
| 1197 | /* |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1198 | * ivt_idle_state_table_update(void) |
| 1199 | * |
| 1200 | * Tune IVT multi-socket targets |
| 1201 | * Assumption: num_sockets == (max_package_num + 1) |
| 1202 | */ |
| 1203 | static void ivt_idle_state_table_update(void) |
| 1204 | { |
| 1205 | /* IVT uses a different table for 1-2, 3-4, and > 4 sockets */ |
| 1206 | int cpu, package_num, num_sockets = 1; |
| 1207 | |
| 1208 | for_each_online_cpu(cpu) { |
| 1209 | package_num = topology_physical_package_id(cpu); |
| 1210 | if (package_num + 1 > num_sockets) { |
| 1211 | num_sockets = package_num + 1; |
| 1212 | |
| 1213 | if (num_sockets > 4) { |
| 1214 | cpuidle_state_table = ivt_cstates_8s; |
| 1215 | return; |
| 1216 | } |
| 1217 | } |
| 1218 | } |
| 1219 | |
| 1220 | if (num_sockets > 2) |
| 1221 | cpuidle_state_table = ivt_cstates_4s; |
| 1222 | |
| 1223 | /* else, 1 and 2 socket systems use default ivt_cstates */ |
| 1224 | } |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1225 | |
| 1226 | /* |
| 1227 | * Translate IRTL (Interrupt Response Time Limit) MSR to usec |
| 1228 | */ |
| 1229 | |
| 1230 | static unsigned int irtl_ns_units[] = { |
| 1231 | 1, 32, 1024, 32768, 1048576, 33554432, 0, 0 }; |
| 1232 | |
| 1233 | static unsigned long long irtl_2_usec(unsigned long long irtl) |
| 1234 | { |
| 1235 | unsigned long long ns; |
| 1236 | |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1237 | if (!irtl) |
| 1238 | return 0; |
| 1239 | |
Jan Beulich | bef4509 | 2016-06-27 00:35:48 -0600 | [diff] [blame] | 1240 | ns = irtl_ns_units[(irtl >> 10) & 0x7]; |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1241 | |
| 1242 | return div64_u64((irtl & 0x3FF) * ns, 1000); |
| 1243 | } |
| 1244 | /* |
| 1245 | * bxt_idle_state_table_update(void) |
| 1246 | * |
| 1247 | * On BXT, we trust the IRTL to show the definitive maximum latency |
| 1248 | * We use the same value for target_residency. |
| 1249 | */ |
| 1250 | static void bxt_idle_state_table_update(void) |
| 1251 | { |
| 1252 | unsigned long long msr; |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1253 | unsigned int usec; |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1254 | |
| 1255 | rdmsrl(MSR_PKGC6_IRTL, msr); |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1256 | usec = irtl_2_usec(msr); |
| 1257 | if (usec) { |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1258 | bxt_cstates[2].exit_latency = usec; |
| 1259 | bxt_cstates[2].target_residency = usec; |
| 1260 | } |
| 1261 | |
| 1262 | rdmsrl(MSR_PKGC7_IRTL, msr); |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1263 | usec = irtl_2_usec(msr); |
| 1264 | if (usec) { |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1265 | bxt_cstates[3].exit_latency = usec; |
| 1266 | bxt_cstates[3].target_residency = usec; |
| 1267 | } |
| 1268 | |
| 1269 | rdmsrl(MSR_PKGC8_IRTL, msr); |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1270 | usec = irtl_2_usec(msr); |
| 1271 | if (usec) { |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1272 | bxt_cstates[4].exit_latency = usec; |
| 1273 | bxt_cstates[4].target_residency = usec; |
| 1274 | } |
| 1275 | |
| 1276 | rdmsrl(MSR_PKGC9_IRTL, msr); |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1277 | usec = irtl_2_usec(msr); |
| 1278 | if (usec) { |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1279 | bxt_cstates[5].exit_latency = usec; |
| 1280 | bxt_cstates[5].target_residency = usec; |
| 1281 | } |
| 1282 | |
| 1283 | rdmsrl(MSR_PKGC10_IRTL, msr); |
Jan Beulich | 3451ab3 | 2016-06-27 00:35:12 -0600 | [diff] [blame] | 1284 | usec = irtl_2_usec(msr); |
| 1285 | if (usec) { |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1286 | bxt_cstates[6].exit_latency = usec; |
| 1287 | bxt_cstates[6].target_residency = usec; |
| 1288 | } |
| 1289 | |
| 1290 | } |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1291 | /* |
| 1292 | * sklh_idle_state_table_update(void) |
| 1293 | * |
| 1294 | * On SKL-H (model 0x5e) disable C8 and C9 if: |
| 1295 | * C10 is enabled and SGX disabled |
| 1296 | */ |
| 1297 | static void sklh_idle_state_table_update(void) |
| 1298 | { |
| 1299 | unsigned long long msr; |
| 1300 | unsigned int eax, ebx, ecx, edx; |
| 1301 | |
| 1302 | |
| 1303 | /* if PC10 disabled via cmdline intel_idle.max_cstate=7 or shallower */ |
| 1304 | if (max_cstate <= 7) |
| 1305 | return; |
| 1306 | |
| 1307 | /* if PC10 not present in CPUID.MWAIT.EDX */ |
| 1308 | if ((mwait_substates & (0xF << 28)) == 0) |
| 1309 | return; |
| 1310 | |
Len Brown | 6cfb237 | 2017-01-07 23:23:25 -0500 | [diff] [blame] | 1311 | rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr); |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1312 | |
| 1313 | /* PC10 is not enabled in PKG C-state limit */ |
| 1314 | if ((msr & 0xF) != 8) |
| 1315 | return; |
| 1316 | |
| 1317 | ecx = 0; |
| 1318 | cpuid(7, &eax, &ebx, &ecx, &edx); |
| 1319 | |
| 1320 | /* if SGX is present */ |
| 1321 | if (ebx & (1 << 2)) { |
| 1322 | |
| 1323 | rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); |
| 1324 | |
| 1325 | /* if SGX is enabled */ |
| 1326 | if (msr & (1 << 18)) |
| 1327 | return; |
| 1328 | } |
| 1329 | |
| 1330 | skl_cstates[5].disabled = 1; /* C8-SKL */ |
| 1331 | skl_cstates[6].disabled = 1; /* C9-SKL */ |
| 1332 | } |
| 1333 | /* |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1334 | * intel_idle_state_table_update() |
| 1335 | * |
| 1336 | * Update the default state_table for this CPU-id |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1337 | */ |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1338 | |
| 1339 | static void intel_idle_state_table_update(void) |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1340 | { |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1341 | switch (boot_cpu_data.x86_model) { |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1342 | |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1343 | case INTEL_FAM6_IVYBRIDGE_X: |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1344 | ivt_idle_state_table_update(); |
| 1345 | break; |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1346 | case INTEL_FAM6_ATOM_GOLDMONT: |
Peter Zijlstra | eb8921e | 2018-08-07 10:17:27 -0700 | [diff] [blame] | 1347 | case INTEL_FAM6_ATOM_GOLDMONT_PLUS: |
Len Brown | 5dcef69 | 2016-04-06 17:00:47 -0400 | [diff] [blame] | 1348 | bxt_idle_state_table_update(); |
| 1349 | break; |
Dave Hansen | db73c5a | 2016-06-02 17:19:32 -0700 | [diff] [blame] | 1350 | case INTEL_FAM6_SKYLAKE_DESKTOP: |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1351 | sklh_idle_state_table_update(); |
| 1352 | break; |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1353 | } |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1354 | } |
| 1355 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1356 | /* |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1357 | * intel_idle_cpuidle_driver_init() |
| 1358 | * allocate, initialize cpuidle_states |
| 1359 | */ |
Richard Cochran | 5469c82 | 2016-04-06 17:00:49 -0400 | [diff] [blame] | 1360 | static void __init intel_idle_cpuidle_driver_init(void) |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1361 | { |
| 1362 | int cstate; |
| 1363 | struct cpuidle_driver *drv = &intel_idle_driver; |
| 1364 | |
Len Brown | 0138d8f | 2014-04-04 01:21:07 -0400 | [diff] [blame] | 1365 | intel_idle_state_table_update(); |
| 1366 | |
Rafael J. Wysocki | 1b39e3f | 2017-08-29 03:14:37 +0200 | [diff] [blame] | 1367 | cpuidle_poll_state_init(drv); |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1368 | drv->state_count = 1; |
| 1369 | |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 1370 | for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) { |
Len Brown | 24bfa95 | 2014-02-14 00:50:34 -0500 | [diff] [blame] | 1371 | int num_substates, mwait_hint, mwait_cstate; |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1372 | |
Len Brown | 7dd0e0a | 2015-05-27 17:11:37 -0400 | [diff] [blame] | 1373 | if ((cpuidle_state_table[cstate].enter == NULL) && |
Rafael J. Wysocki | 28ba086 | 2017-08-10 00:14:45 +0200 | [diff] [blame] | 1374 | (cpuidle_state_table[cstate].enter_s2idle == NULL)) |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 1375 | break; |
| 1376 | |
| 1377 | if (cstate + 1 > max_cstate) { |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1378 | pr_info("max_cstate %d reached\n", max_cstate); |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1379 | break; |
| 1380 | } |
| 1381 | |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 1382 | mwait_hint = flg2MWAIT(cpuidle_state_table[cstate].flags); |
| 1383 | mwait_cstate = MWAIT_HINT2CSTATE(mwait_hint); |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1384 | |
Len Brown | 24bfa95 | 2014-02-14 00:50:34 -0500 | [diff] [blame] | 1385 | /* number of sub-states for this state in CPUID.MWAIT */ |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 1386 | num_substates = (mwait_substates >> ((mwait_cstate + 1) * 4)) |
| 1387 | & MWAIT_SUBSTATE_MASK; |
| 1388 | |
Len Brown | 24bfa95 | 2014-02-14 00:50:34 -0500 | [diff] [blame] | 1389 | /* if NO sub-states for this state in CPUID, skip it */ |
| 1390 | if (num_substates == 0) |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 1391 | continue; |
| 1392 | |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1393 | /* if state marked as disabled, skip it */ |
| 1394 | if (cpuidle_state_table[cstate].disabled != 0) { |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1395 | pr_debug("state %s is disabled\n", |
| 1396 | cpuidle_state_table[cstate].name); |
Len Brown | d70e28f | 2016-03-13 00:33:48 -0500 | [diff] [blame] | 1397 | continue; |
| 1398 | } |
| 1399 | |
| 1400 | |
Len Brown | e022e7e | 2013-02-01 23:37:30 -0500 | [diff] [blame] | 1401 | if (((mwait_cstate + 1) > 2) && |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1402 | !boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
| 1403 | mark_tsc_unstable("TSC halts in idle" |
| 1404 | " states deeper than C2"); |
| 1405 | |
Peter Zijlstra | 893b2aa | 2022-10-27 13:55:09 -0700 | [diff] [blame] | 1406 | if (cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS) && |
| 1407 | cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_IBRS) { |
| 1408 | drv->states[drv->state_count].enter = intel_idle_ibrs; |
| 1409 | } |
| 1410 | |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1411 | drv->states[drv->state_count] = /* structure copy */ |
| 1412 | cpuidle_state_table[cstate]; |
| 1413 | |
| 1414 | drv->state_count += 1; |
| 1415 | } |
| 1416 | |
Len Brown | 8c058d53 | 2014-07-31 15:21:24 -0400 | [diff] [blame] | 1417 | if (icpu->byt_auto_demotion_disable_flag) { |
| 1418 | wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0); |
| 1419 | wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0); |
| 1420 | } |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1421 | } |
| 1422 | |
| 1423 | |
| 1424 | /* |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1425 | * intel_idle_cpu_init() |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1426 | * allocate, initialize, register cpuidle_devices |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1427 | * @cpu: cpu/core to initialize |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1428 | */ |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1429 | static int intel_idle_cpu_init(unsigned int cpu) |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1430 | { |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1431 | struct cpuidle_device *dev; |
| 1432 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1433 | dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu); |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1434 | dev->cpu = cpu; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1435 | |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1436 | if (cpuidle_register_device(dev)) { |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1437 | pr_debug("cpuidle_register_device %d failed!\n", cpu); |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1438 | return -EIO; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1439 | } |
| 1440 | |
Andi Kleen | b66b8b9 | 2012-01-26 00:09:07 +0100 | [diff] [blame] | 1441 | if (icpu->auto_demotion_disable_flags) |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1442 | auto_demotion_disable(); |
Thomas Renninger | 65b7f83 | 2012-01-17 22:40:08 +0100 | [diff] [blame] | 1443 | |
Bartlomiej Zolnierkiewicz | dbf87ab | 2013-12-20 19:47:28 +0100 | [diff] [blame] | 1444 | if (icpu->disable_promotion_to_c1e) |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1445 | c1e_promotion_disable(); |
| 1446 | |
| 1447 | return 0; |
| 1448 | } |
| 1449 | |
| 1450 | static int intel_idle_cpu_online(unsigned int cpu) |
| 1451 | { |
| 1452 | struct cpuidle_device *dev; |
| 1453 | |
| 1454 | if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) |
| 1455 | __setup_broadcast_timer(true); |
| 1456 | |
| 1457 | /* |
| 1458 | * Some systems can hotplug a cpu at runtime after |
| 1459 | * the kernel has booted, we have to initialize the |
| 1460 | * driver in this case |
| 1461 | */ |
| 1462 | dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu); |
| 1463 | if (!dev->registered) |
| 1464 | return intel_idle_cpu_init(cpu); |
Bartlomiej Zolnierkiewicz | dbf87ab | 2013-12-20 19:47:28 +0100 | [diff] [blame] | 1465 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1466 | return 0; |
| 1467 | } |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1468 | |
| 1469 | static int __init intel_idle_init(void) |
| 1470 | { |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1471 | int retval; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1472 | |
Thomas Renninger | d189604 | 2010-11-03 17:06:14 +0100 | [diff] [blame] | 1473 | /* Do not load intel_idle at all for now if idle= is passed */ |
| 1474 | if (boot_option_idle_override != IDLE_NO_OVERRIDE) |
| 1475 | return -ENODEV; |
| 1476 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1477 | retval = intel_idle_probe(); |
| 1478 | if (retval) |
| 1479 | return retval; |
| 1480 | |
Richard Cochran | e9df69c | 2016-04-06 17:00:52 -0400 | [diff] [blame] | 1481 | intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device); |
| 1482 | if (intel_idle_cpuidle_devices == NULL) |
| 1483 | return -ENOMEM; |
| 1484 | |
Deepthi Dharwar | 46bcfad | 2011-10-28 16:20:42 +0530 | [diff] [blame] | 1485 | intel_idle_cpuidle_driver_init(); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1486 | retval = cpuidle_register_driver(&intel_idle_driver); |
| 1487 | if (retval) { |
Konrad Rzeszutek Wilk | 3735d52 | 2012-08-16 22:06:55 +0200 | [diff] [blame] | 1488 | struct cpuidle_driver *drv = cpuidle_get_driver(); |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1489 | printk(KERN_DEBUG pr_fmt("intel_idle yielding to %s\n"), |
| 1490 | drv ? drv->name : "none"); |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1491 | goto init_driver_fail; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1492 | } |
| 1493 | |
Richard Cochran | 2259a81 | 2016-04-06 17:00:54 -0400 | [diff] [blame] | 1494 | if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */ |
| 1495 | lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; |
Richard Cochran | 2259a81 | 2016-04-06 17:00:54 -0400 | [diff] [blame] | 1496 | |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1497 | retval = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "idle/intel:online", |
| 1498 | intel_idle_cpu_online, NULL); |
| 1499 | if (retval < 0) |
| 1500 | goto hp_setup_fail; |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1501 | |
Joe Perches | 654d08a | 2017-06-09 12:29:20 -0700 | [diff] [blame] | 1502 | pr_debug("lapic_timer_reliable_states 0x%x\n", |
| 1503 | lapic_timer_reliable_states); |
Richard Cochran | 2259a81 | 2016-04-06 17:00:54 -0400 | [diff] [blame] | 1504 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1505 | return 0; |
Sebastian Andrzej Siewior | fb1013a | 2016-11-29 10:51:43 +0100 | [diff] [blame] | 1506 | |
| 1507 | hp_setup_fail: |
| 1508 | intel_idle_cpuidle_devices_uninit(); |
| 1509 | cpuidle_unregister_driver(&intel_idle_driver); |
| 1510 | init_driver_fail: |
| 1511 | free_percpu(intel_idle_cpuidle_devices); |
| 1512 | return retval; |
| 1513 | |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1514 | } |
Paul Gortmaker | 02c4fae | 2016-06-17 01:28:33 -0400 | [diff] [blame] | 1515 | device_initcall(intel_idle_init); |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1516 | |
Paul Gortmaker | 02c4fae | 2016-06-17 01:28:33 -0400 | [diff] [blame] | 1517 | /* |
| 1518 | * We are not really modular, but we used to support that. Meaning we also |
| 1519 | * support "intel_idle.max_cstate=..." at boot and also a read-only export of |
| 1520 | * it at /sys/module/intel_idle/parameters/max_cstate -- so using module_param |
| 1521 | * is the easiest way (currently) to continue doing that. |
| 1522 | */ |
Len Brown | 2671717 | 2010-03-08 14:07:30 -0500 | [diff] [blame] | 1523 | module_param(max_cstate, int, 0444); |