Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | #include <linux/serial.h> |
| 2 | #include <asm/dma.h> |
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 3 | #include <asm/portmux.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 4 | |
| 5 | #define NR_PORTS 2 |
| 6 | |
| 7 | #define OFFSET_THR 0x00 /* Transmit Holding register */ |
| 8 | #define OFFSET_RBR 0x00 /* Receive Buffer register */ |
| 9 | #define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ |
| 10 | #define OFFSET_IER 0x04 /* Interrupt Enable Register */ |
| 11 | #define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ |
| 12 | #define OFFSET_IIR 0x08 /* Interrupt Identification Register */ |
| 13 | #define OFFSET_LCR 0x0C /* Line Control Register */ |
| 14 | #define OFFSET_MCR 0x10 /* Modem Control Register */ |
| 15 | #define OFFSET_LSR 0x14 /* Line Status Register */ |
| 16 | #define OFFSET_MSR 0x18 /* Modem Status Register */ |
| 17 | #define OFFSET_SCR 0x1C /* SCR Scratch Register */ |
| 18 | #define OFFSET_GCTL 0x24 /* Global Control Register */ |
| 19 | |
| 20 | #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) |
| 21 | #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) |
| 22 | #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) |
| 23 | #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) |
| 24 | #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) |
| 25 | #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) |
| 26 | #define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR)) |
| 27 | #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) |
| 28 | |
| 29 | #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) |
| 30 | #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) |
| 31 | #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) |
| 32 | #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) |
| 33 | #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) |
| 34 | #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) |
| 35 | |
| 36 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) |
| 37 | # define CONFIG_SERIAL_BFIN_CTSRTS |
| 38 | |
| 39 | # ifndef CONFIG_UART0_CTS_PIN |
| 40 | # define CONFIG_UART0_CTS_PIN -1 |
| 41 | # endif |
| 42 | |
| 43 | # ifndef CONFIG_UART0_RTS_PIN |
| 44 | # define CONFIG_UART0_RTS_PIN -1 |
| 45 | # endif |
| 46 | |
| 47 | # ifndef CONFIG_UART1_CTS_PIN |
| 48 | # define CONFIG_UART1_CTS_PIN -1 |
| 49 | # endif |
| 50 | |
| 51 | # ifndef CONFIG_UART1_RTS_PIN |
| 52 | # define CONFIG_UART1_RTS_PIN -1 |
| 53 | # endif |
| 54 | #endif |
| 55 | /* |
| 56 | * The pin configuration is different from schematic |
| 57 | */ |
| 58 | struct bfin_serial_port { |
| 59 | struct uart_port port; |
| 60 | unsigned int old_status; |
| 61 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 62 | int tx_done; |
| 63 | int tx_count; |
| 64 | struct circ_buf rx_dma_buf; |
| 65 | struct timer_list rx_dma_timer; |
| 66 | int rx_dma_nrows; |
| 67 | unsigned int tx_dma_channel; |
| 68 | unsigned int rx_dma_channel; |
| 69 | struct work_struct tx_dma_workqueue; |
| 70 | #else |
| 71 | struct work_struct cts_workqueue; |
| 72 | #endif |
| 73 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 74 | int cts_pin; |
| 75 | int rts_pin; |
| 76 | #endif |
| 77 | }; |
| 78 | |
| 79 | struct bfin_serial_port bfin_serial_ports[NR_PORTS]; |
| 80 | struct bfin_serial_res { |
| 81 | unsigned long uart_base_addr; |
| 82 | int uart_irq; |
| 83 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 84 | unsigned int uart_tx_dma_channel; |
| 85 | unsigned int uart_rx_dma_channel; |
| 86 | #endif |
| 87 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 88 | int uart_cts_pin; |
| 89 | int uart_rts_pin; |
| 90 | #endif |
| 91 | }; |
| 92 | |
| 93 | struct bfin_serial_res bfin_serial_resource[] = { |
| 94 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 95 | { |
| 96 | 0xFFC00400, |
| 97 | IRQ_UART0_RX, |
| 98 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 99 | CH_UART0_TX, |
| 100 | CH_UART0_RX, |
| 101 | #endif |
| 102 | #ifdef CONFIG_BFIN_UART0_CTSRTS |
| 103 | CONFIG_UART0_CTS_PIN, |
| 104 | CONFIG_UART0_RTS_PIN, |
| 105 | #endif |
| 106 | }, |
| 107 | #endif |
| 108 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 109 | { |
| 110 | 0xFFC02000, |
| 111 | IRQ_UART1_RX, |
| 112 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 113 | CH_UART1_TX, |
| 114 | CH_UART1_RX, |
| 115 | #endif |
| 116 | #ifdef CONFIG_BFIN_UART1_CTSRTS |
| 117 | CONFIG_UART1_CTS_PIN, |
| 118 | CONFIG_UART1_RTS_PIN, |
| 119 | #endif |
| 120 | }, |
| 121 | #endif |
| 122 | }; |
| 123 | |
| 124 | int nr_ports = ARRAY_SIZE(bfin_serial_resource); |
| 125 | |
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 126 | #define DRIVER_NAME "bfin-uart" |
| 127 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 128 | static void bfin_serial_hw_init(struct bfin_serial_port *uart) |
| 129 | { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 130 | |
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 131 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 132 | peripheral_request(P_UART0_TX, DRIVER_NAME); |
| 133 | peripheral_request(P_UART0_RX, DRIVER_NAME); |
| 134 | #endif |
| 135 | |
| 136 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 137 | peripheral_request(P_UART1_TX, DRIVER_NAME); |
| 138 | peripheral_request(P_UART1_RX, DRIVER_NAME); |
| 139 | #endif |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 140 | |
| 141 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
| 142 | if (uart->cts_pin >= 0) { |
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 143 | gpio_request(uart->cts_pin, DRIVER_NAME); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 144 | gpio_direction_input(uart->cts_pin); |
| 145 | } |
| 146 | |
| 147 | if (uart->rts_pin >= 0) { |
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 148 | gpio_request(uart->rts_pin, DRIVER_NAME); |
Michael Hennerich | acbcd26 | 2008-01-22 18:36:20 +0800 | [diff] [blame] | 149 | gpio_direction_output(uart->rts_pin, 0); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 150 | } |
| 151 | #endif |
| 152 | } |