blob: 26017ed088ccfab7ab0da788a7bc871226b6f0f8 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Pavel Machek21fd5132008-05-21 11:44:02 +02002#include <linux/linkage.h>
Pavel Machek21fd5132008-05-21 11:44:02 +02003#include <linux/errno.h>
4#include <linux/signal.h>
5#include <linux/sched.h>
6#include <linux/ioport.h>
7#include <linux/interrupt.h>
Nicolai Stange18f891e2018-07-29 12:15:33 +02008#include <linux/irq.h>
Pavel Machek21fd5132008-05-21 11:44:02 +02009#include <linux/timex.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020010#include <linux/random.h>
11#include <linux/init.h>
12#include <linux/kernel_stat.h>
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +010013#include <linux/syscore_ops.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020014#include <linux/bitops.h>
Jaswinder Singh Rajput7bafaf32009-01-04 16:33:52 +053015#include <linux/acpi.h>
16#include <linux/io.h>
17#include <linux/delay.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020018
Arun Sharma600634972011-07-26 16:09:06 -070019#include <linux/atomic.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020020#include <asm/timer.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020021#include <asm/hw_irq.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020022#include <asm/pgtable.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020023#include <asm/desc.h>
24#include <asm/apic.h>
Pavel Machek21fd5132008-05-21 11:44:02 +020025#include <asm/i8259.h>
26
27/*
28 * This is the 'legacy' 8259A Programmable Interrupt Controller,
29 * present in the majority of PC/AT boxes.
30 * plus some generic x86 specific things if generic specifics makes
31 * any sense at all.
32 */
Thomas Gleixner4305df92010-09-28 15:01:33 +020033static void init_8259A(int auto_eoi);
Pavel Machek21fd5132008-05-21 11:44:02 +020034
Thomas Gleixner75e43762023-10-25 23:04:15 +020035static bool pcat_compat __ro_after_init;
Pavel Machek21fd5132008-05-21 11:44:02 +020036static int i8259A_auto_eoi;
Thomas Gleixner5619c282009-07-25 18:35:11 +020037DEFINE_RAW_SPINLOCK(i8259A_lock);
Pavel Machek21fd5132008-05-21 11:44:02 +020038
39/*
40 * 8259A PIC functions to handle ISA devices:
41 */
42
43/*
44 * This contains the irq mask for both 8259A irq controllers,
45 */
46unsigned int cached_irq_mask = 0xffff;
47
48/*
49 * Not all IRQs can be routed through the IO-APIC, eg. on certain (older)
50 * boards the timer interrupt is not really connected to any IO-APIC pin,
51 * it's fed to the master 8259A's IR0 line only.
52 *
53 * Any '1' bit in this mask means the IRQ is routed through the IO-APIC.
54 * this 'mixed mode' IRQ handling costs nothing because it's only used
55 * at IRQ setup time.
56 */
57unsigned long io_apic_irqs;
58
Thomas Gleixner4305df92010-09-28 15:01:33 +020059static void mask_8259A_irq(unsigned int irq)
Pavel Machek21fd5132008-05-21 11:44:02 +020060{
61 unsigned int mask = 1 << irq;
62 unsigned long flags;
63
Thomas Gleixner5619c282009-07-25 18:35:11 +020064 raw_spin_lock_irqsave(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +020065 cached_irq_mask |= mask;
66 if (irq & 8)
67 outb(cached_slave_mask, PIC_SLAVE_IMR);
68 else
69 outb(cached_master_mask, PIC_MASTER_IMR);
Thomas Gleixner5619c282009-07-25 18:35:11 +020070 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +020071}
72
Thomas Gleixner4305df92010-09-28 15:01:33 +020073static void disable_8259A_irq(struct irq_data *data)
74{
75 mask_8259A_irq(data->irq);
76}
77
78static void unmask_8259A_irq(unsigned int irq)
Pavel Machek21fd5132008-05-21 11:44:02 +020079{
80 unsigned int mask = ~(1 << irq);
81 unsigned long flags;
82
Thomas Gleixner5619c282009-07-25 18:35:11 +020083 raw_spin_lock_irqsave(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +020084 cached_irq_mask &= mask;
85 if (irq & 8)
86 outb(cached_slave_mask, PIC_SLAVE_IMR);
87 else
88 outb(cached_master_mask, PIC_MASTER_IMR);
Thomas Gleixner5619c282009-07-25 18:35:11 +020089 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +020090}
91
Thomas Gleixner4305df92010-09-28 15:01:33 +020092static void enable_8259A_irq(struct irq_data *data)
93{
94 unmask_8259A_irq(data->irq);
95}
96
Jacob Panb81bb372009-11-09 11:27:04 -080097static int i8259A_irq_pending(unsigned int irq)
Pavel Machek21fd5132008-05-21 11:44:02 +020098{
99 unsigned int mask = 1<<irq;
100 unsigned long flags;
101 int ret;
102
Thomas Gleixner5619c282009-07-25 18:35:11 +0200103 raw_spin_lock_irqsave(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +0200104 if (irq < 8)
105 ret = inb(PIC_MASTER_CMD) & mask;
106 else
107 ret = inb(PIC_SLAVE_CMD) & (mask >> 8);
Thomas Gleixner5619c282009-07-25 18:35:11 +0200108 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +0200109
110 return ret;
111}
112
Jacob Panb81bb372009-11-09 11:27:04 -0800113static void make_8259A_irq(unsigned int irq)
Pavel Machek21fd5132008-05-21 11:44:02 +0200114{
115 disable_irq_nosync(irq);
116 io_apic_irqs &= ~(1<<irq);
Maciej W. Rozycki60e684f2014-10-26 16:06:28 +0000117 irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
Thomas Gleixner744fe9b2023-01-09 22:57:13 +0100118 irq_set_status_flags(irq, IRQ_LEVEL);
Pavel Machek21fd5132008-05-21 11:44:02 +0200119 enable_irq(irq);
120}
121
122/*
123 * This function assumes to be called rarely. Switching between
124 * 8259A registers is slow.
125 * This has to be protected by the irq controller spinlock
126 * before being called.
127 */
128static inline int i8259A_irq_real(unsigned int irq)
129{
130 int value;
131 int irqmask = 1<<irq;
132
133 if (irq < 8) {
Pavel Machek680afbf2008-05-21 11:57:52 +0200134 outb(0x0B, PIC_MASTER_CMD); /* ISR register */
Pavel Machek21fd5132008-05-21 11:44:02 +0200135 value = inb(PIC_MASTER_CMD) & irqmask;
Pavel Machek680afbf2008-05-21 11:57:52 +0200136 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */
Pavel Machek21fd5132008-05-21 11:44:02 +0200137 return value;
138 }
Pavel Machek680afbf2008-05-21 11:57:52 +0200139 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */
Pavel Machek21fd5132008-05-21 11:44:02 +0200140 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
Pavel Machek680afbf2008-05-21 11:57:52 +0200141 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */
Pavel Machek21fd5132008-05-21 11:44:02 +0200142 return value;
143}
144
145/*
146 * Careful! The 8259A is a fragile beast, it pretty
147 * much _has_ to be done exactly like this (mask it
148 * first, _then_ send the EOI, and the order of EOI
149 * to the two 8259s is important!
150 */
Thomas Gleixner4305df92010-09-28 15:01:33 +0200151static void mask_and_ack_8259A(struct irq_data *data)
Pavel Machek21fd5132008-05-21 11:44:02 +0200152{
Thomas Gleixner4305df92010-09-28 15:01:33 +0200153 unsigned int irq = data->irq;
Pavel Machek21fd5132008-05-21 11:44:02 +0200154 unsigned int irqmask = 1 << irq;
155 unsigned long flags;
156
Thomas Gleixner5619c282009-07-25 18:35:11 +0200157 raw_spin_lock_irqsave(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +0200158 /*
159 * Lightweight spurious IRQ detection. We do not want
160 * to overdo spurious IRQ handling - it's usually a sign
161 * of hardware problems, so we only do the checks we can
162 * do without slowing down good hardware unnecessarily.
163 *
164 * Note that IRQ7 and IRQ15 (the two spurious IRQs
165 * usually resulting from the 8259A-1|2 PICs) occur
166 * even if the IRQ is masked in the 8259A. Thus we
167 * can check spurious 8259A IRQs without doing the
168 * quite slow i8259A_irq_real() call for every IRQ.
169 * This does not cover 100% of spurious interrupts,
170 * but should be enough to warn the user that there
171 * is something bad going on ...
172 */
173 if (cached_irq_mask & irqmask)
174 goto spurious_8259A_irq;
175 cached_irq_mask |= irqmask;
176
177handle_real_irq:
178 if (irq & 8) {
179 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
180 outb(cached_slave_mask, PIC_SLAVE_IMR);
Pavel Machek21fd5132008-05-21 11:44:02 +0200181 /* 'Specific EOI' to slave */
Pavel Machek3e8631d2008-05-21 11:52:52 +0200182 outb(0x60+(irq&7), PIC_SLAVE_CMD);
Pavel Machek21fd5132008-05-21 11:44:02 +0200183 /* 'Specific EOI' to master-IRQ2 */
Pavel Machek3e8631d2008-05-21 11:52:52 +0200184 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD);
Pavel Machek21fd5132008-05-21 11:44:02 +0200185 } else {
186 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
187 outb(cached_master_mask, PIC_MASTER_IMR);
Pavel Machek3e8631d2008-05-21 11:52:52 +0200188 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
Pavel Machek21fd5132008-05-21 11:44:02 +0200189 }
Thomas Gleixner5619c282009-07-25 18:35:11 +0200190 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +0200191 return;
192
193spurious_8259A_irq:
194 /*
195 * this is the slow path - should happen rarely.
196 */
197 if (i8259A_irq_real(irq))
198 /*
199 * oops, the IRQ _is_ in service according to the
200 * 8259A - not spurious, go handle it.
201 */
202 goto handle_real_irq;
203
204 {
205 static int spurious_irq_mask;
206 /*
207 * At this point we can be sure the IRQ is spurious,
208 * lets ACK and report it. [once per IRQ]
209 */
210 if (!(spurious_irq_mask & irqmask)) {
Thomas Gleixnerba6e4d62020-07-29 10:53:28 +0200211 printk_deferred(KERN_DEBUG
Pavel Machek21fd5132008-05-21 11:44:02 +0200212 "spurious 8259A interrupt: IRQ%d.\n", irq);
Pavel Machek21fd5132008-05-21 11:44:02 +0200213 spurious_irq_mask |= irqmask;
214 }
215 atomic_inc(&irq_err_count);
216 /*
217 * Theoretically we do not have to handle this IRQ,
218 * but in Linux this does not cause problems and is
219 * simpler for us.
220 */
221 goto handle_real_irq;
222 }
223}
224
Thomas Gleixner4305df92010-09-28 15:01:33 +0200225struct irq_chip i8259A_chip = {
226 .name = "XT-PIC",
227 .irq_mask = disable_8259A_irq,
228 .irq_disable = disable_8259A_irq,
229 .irq_unmask = enable_8259A_irq,
230 .irq_mask_ack = mask_and_ack_8259A,
231};
232
Pavel Machek21fd5132008-05-21 11:44:02 +0200233static char irq_trigger[2];
234/**
235 * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ
236 */
237static void restore_ELCR(char *trigger)
238{
239 outb(trigger[0], 0x4d0);
240 outb(trigger[1], 0x4d1);
241}
242
243static void save_ELCR(char *trigger)
244{
245 /* IRQ 0,1,2,8,13 are marked as reserved */
246 trigger[0] = inb(0x4d0) & 0xF8;
247 trigger[1] = inb(0x4d1) & 0xDE;
248}
249
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100250static void i8259A_resume(void)
Pavel Machek21fd5132008-05-21 11:44:02 +0200251{
252 init_8259A(i8259A_auto_eoi);
253 restore_ELCR(irq_trigger);
Pavel Machek21fd5132008-05-21 11:44:02 +0200254}
255
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100256static int i8259A_suspend(void)
Pavel Machek21fd5132008-05-21 11:44:02 +0200257{
258 save_ELCR(irq_trigger);
259 return 0;
260}
261
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100262static void i8259A_shutdown(void)
Pavel Machek21fd5132008-05-21 11:44:02 +0200263{
264 /* Put the i8259A into a quiescent state that
265 * the kernel initialization code can get it
266 * out of.
267 */
268 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
Yuanhan Liud3a80092012-08-06 22:13:00 +0800269 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
Pavel Machek21fd5132008-05-21 11:44:02 +0200270}
271
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100272static struct syscore_ops i8259_syscore_ops = {
Pavel Machek21fd5132008-05-21 11:44:02 +0200273 .suspend = i8259A_suspend,
274 .resume = i8259A_resume,
275 .shutdown = i8259A_shutdown,
276};
277
Jacob Panb81bb372009-11-09 11:27:04 -0800278static void mask_8259A(void)
Suresh Siddhad94d93ca2008-07-10 11:16:46 -0700279{
280 unsigned long flags;
281
Thomas Gleixner5619c282009-07-25 18:35:11 +0200282 raw_spin_lock_irqsave(&i8259A_lock, flags);
Suresh Siddhad94d93ca2008-07-10 11:16:46 -0700283
284 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
285 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
286
Thomas Gleixner5619c282009-07-25 18:35:11 +0200287 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Suresh Siddhad94d93ca2008-07-10 11:16:46 -0700288}
289
Jacob Panb81bb372009-11-09 11:27:04 -0800290static void unmask_8259A(void)
Suresh Siddhad94d93ca2008-07-10 11:16:46 -0700291{
292 unsigned long flags;
293
Thomas Gleixner5619c282009-07-25 18:35:11 +0200294 raw_spin_lock_irqsave(&i8259A_lock, flags);
Suresh Siddhad94d93ca2008-07-10 11:16:46 -0700295
296 outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
297 outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */
298
Thomas Gleixner5619c282009-07-25 18:35:11 +0200299 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Suresh Siddhad94d93ca2008-07-10 11:16:46 -0700300}
301
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +0100302static int probe_8259A(void)
Pavel Machek21fd5132008-05-21 11:44:02 +0200303{
Thomas Gleixner75e43762023-10-25 23:04:15 +0200304 unsigned char new_val, probe_val = ~(1 << PIC_CASCADE_IR);
Pavel Machek21fd5132008-05-21 11:44:02 +0200305 unsigned long flags;
Thomas Gleixner75e43762023-10-25 23:04:15 +0200306
K. Y. Srinivasane179f692014-04-14 11:43:49 -0700307 /*
Thomas Gleixner75e43762023-10-25 23:04:15 +0200308 * If MADT has the PCAT_COMPAT flag set, then do not bother probing
309 * for the PIC. Some BIOSes leave the PIC uninitialized and probing
310 * fails.
311 *
312 * Right now this causes problems as quite some code depends on
313 * nr_legacy_irqs() > 0 or has_legacy_pic() == true. This is silly
314 * when the system has an IO/APIC because then PIC is not required
315 * at all, except for really old machines where the timer interrupt
316 * must be routed through the PIC. So just pretend that the PIC is
317 * there and let legacy_pic->init() initialize it for nothing.
318 *
319 * Alternatively this could just try to initialize the PIC and
320 * repeat the probe, but for cases where there is no PIC that's
321 * just pointless.
322 */
323 if (pcat_compat)
324 return nr_legacy_irqs();
325
326 /*
327 * Check to see if we have a PIC. Mask all except the cascade and
328 * read back the value we just wrote. If we don't have a PIC, we
329 * will read 0xff as opposed to the value we wrote.
K. Y. Srinivasane179f692014-04-14 11:43:49 -0700330 */
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +0100331 raw_spin_lock_irqsave(&i8259A_lock, flags);
332
Pavel Machek21fd5132008-05-21 11:44:02 +0200333 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
K. Y. Srinivasane179f692014-04-14 11:43:49 -0700334 outb(probe_val, PIC_MASTER_IMR);
335 new_val = inb(PIC_MASTER_IMR);
336 if (new_val != probe_val) {
337 printk(KERN_INFO "Using NULL legacy PIC\n");
338 legacy_pic = &null_legacy_pic;
K. Y. Srinivasane179f692014-04-14 11:43:49 -0700339 }
340
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +0100341 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
342 return nr_legacy_irqs();
343}
344
345static void init_8259A(int auto_eoi)
346{
347 unsigned long flags;
348
349 i8259A_auto_eoi = auto_eoi;
350
351 raw_spin_lock_irqsave(&i8259A_lock, flags);
352
K. Y. Srinivasane179f692014-04-14 11:43:49 -0700353 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
Pavel Machek21fd5132008-05-21 11:44:02 +0200354
355 /*
356 * outb_pic - this has to work on a wide range of PC hardware.
357 */
358 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
Pavel Machekc46e62f2008-05-28 12:42:57 +0200359
Brian Gerst8b455e62015-05-09 11:36:53 -0400360 /* ICW2: 8259A-1 IR0-7 mapped to ISA_IRQ_VECTOR(0) */
361 outb_pic(ISA_IRQ_VECTOR(0), PIC_MASTER_IMR);
Pavel Machekc46e62f2008-05-28 12:42:57 +0200362
Pavel Machek21fd5132008-05-21 11:44:02 +0200363 /* 8259A-1 (the master) has a slave on IR2 */
Pavel Machekc46e62f2008-05-28 12:42:57 +0200364 outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);
365
Pavel Machek21fd5132008-05-21 11:44:02 +0200366 if (auto_eoi) /* master does Auto EOI */
367 outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
368 else /* master expects normal EOI */
369 outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
370
371 outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */
Pavel Machekc46e62f2008-05-28 12:42:57 +0200372
Brian Gerst8b455e62015-05-09 11:36:53 -0400373 /* ICW2: 8259A-2 IR0-7 mapped to ISA_IRQ_VECTOR(8) */
374 outb_pic(ISA_IRQ_VECTOR(8), PIC_SLAVE_IMR);
Pavel Machek21fd5132008-05-21 11:44:02 +0200375 /* 8259A-2 is a slave on master's IR2 */
376 outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR);
377 /* (slave's support for AEOI in flat mode is to be investigated) */
378 outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR);
379
Pavel Machek21fd5132008-05-21 11:44:02 +0200380 if (auto_eoi)
381 /*
382 * In AEOI mode we just have to mask the interrupt
383 * when acking.
384 */
Thomas Gleixner4305df92010-09-28 15:01:33 +0200385 i8259A_chip.irq_mask_ack = disable_8259A_irq;
Pavel Machek21fd5132008-05-21 11:44:02 +0200386 else
Thomas Gleixner4305df92010-09-28 15:01:33 +0200387 i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
Pavel Machek21fd5132008-05-21 11:44:02 +0200388
389 udelay(100); /* wait for 8259A to initialize */
390
391 outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
392 outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */
393
Thomas Gleixner5619c282009-07-25 18:35:11 +0200394 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Pavel Machek21fd5132008-05-21 11:44:02 +0200395}
Jacob Panb81bb372009-11-09 11:27:04 -0800396
Jacob Panef354862009-11-09 11:24:14 -0800397/*
398 * make i8259 a driver so that we can select pic functions at run time. the goal
399 * is to make x86 binary compatible among pc compatible and non-pc compatible
400 * platforms, such as x86 MID.
401 */
402
Jacob Pan28a3c932010-02-23 02:03:31 -0800403static void legacy_pic_noop(void) { };
404static void legacy_pic_uint_noop(unsigned int unused) { };
405static void legacy_pic_int_noop(int unused) { };
Jacob Panef354862009-11-09 11:24:14 -0800406static int legacy_pic_irq_pending_noop(unsigned int irq)
407{
408 return 0;
409}
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +0100410static int legacy_pic_probe(void)
411{
412 return 0;
413}
Jacob Panef354862009-11-09 11:24:14 -0800414
415struct legacy_pic null_legacy_pic = {
416 .nr_legacy_irqs = 0,
Thomas Gleixner4305df92010-09-28 15:01:33 +0200417 .chip = &dummy_irq_chip,
418 .mask = legacy_pic_uint_noop,
419 .unmask = legacy_pic_uint_noop,
Jacob Panef354862009-11-09 11:24:14 -0800420 .mask_all = legacy_pic_noop,
421 .restore_mask = legacy_pic_noop,
422 .init = legacy_pic_int_noop,
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +0100423 .probe = legacy_pic_probe,
Jacob Panef354862009-11-09 11:24:14 -0800424 .irq_pending = legacy_pic_irq_pending_noop,
425 .make_irq = legacy_pic_uint_noop,
426};
427
428struct legacy_pic default_legacy_pic = {
429 .nr_legacy_irqs = NR_IRQS_LEGACY,
430 .chip = &i8259A_chip,
Thomas Gleixner4305df92010-09-28 15:01:33 +0200431 .mask = mask_8259A_irq,
432 .unmask = unmask_8259A_irq,
433 .mask_all = mask_8259A,
Jacob Panef354862009-11-09 11:24:14 -0800434 .restore_mask = unmask_8259A,
435 .init = init_8259A,
Vitaly Kuznetsov8c058b02015-11-03 10:40:14 +0100436 .probe = probe_8259A,
Jacob Panef354862009-11-09 11:24:14 -0800437 .irq_pending = i8259A_irq_pending,
438 .make_irq = make_8259A_irq,
439};
440
441struct legacy_pic *legacy_pic = &default_legacy_pic;
Hans de Goede7ee06cb2017-04-08 19:54:20 +0200442EXPORT_SYMBOL(legacy_pic);
Adam Lackorzynski087b2552010-07-20 15:18:19 -0700443
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100444static int __init i8259A_init_ops(void)
Adam Lackorzynski087b2552010-07-20 15:18:19 -0700445{
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100446 if (legacy_pic == &default_legacy_pic)
447 register_syscore_ops(&i8259_syscore_ops);
Adam Lackorzynski087b2552010-07-20 15:18:19 -0700448
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100449 return 0;
Adam Lackorzynski087b2552010-07-20 15:18:19 -0700450}
Rafael J. Wysockif3c6ea12011-03-23 22:15:54 +0100451device_initcall(i8259A_init_ops);
Thomas Gleixner75e43762023-10-25 23:04:15 +0200452
453void __init legacy_pic_pcat_compat(void)
454{
455 pcat_compat = true;
456}