blob: 6b5422766f13d7f89ce140b373c5dfbdec7c445c [file] [log] [blame]
Paul Mundtb3c185a2012-06-20 17:29:04 +09001/*
2 * SuperH Pin Function Controller GPIO driver.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
Laurent Pinchartc6193ea2012-12-15 23:50:47 +010011
Laurent Pinchart1724acf2012-12-15 23:50:48 +010012#include <linux/device.h>
Paul Mundtb3c185a2012-06-20 17:29:04 +090013#include <linux/gpio.h>
Laurent Pinchart90efde22012-12-15 23:50:52 +010014#include <linux/init.h>
Paul Mundtb3c185a2012-06-20 17:29:04 +090015#include <linux/module.h>
Paul Mundtca5481c62012-07-10 12:08:14 +090016#include <linux/pinctrl/consumer.h>
Laurent Pinchart90efde22012-12-15 23:50:52 +010017#include <linux/slab.h>
18#include <linux/spinlock.h>
Paul Mundtb3c185a2012-06-20 17:29:04 +090019
Laurent Pinchartf9165132012-12-15 23:50:44 +010020#include "core.h"
21
Laurent Pinchart51cb2262013-02-16 18:34:32 +010022struct sh_pfc_gpio_data_reg {
23 const struct pinmux_data_reg *info;
Geert Uytterhoevenfc889362015-02-27 18:38:04 +010024 u32 shadow;
Laurent Pinchart51cb2262013-02-16 18:34:32 +010025};
26
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010027struct sh_pfc_gpio_pin {
28 u8 dbit;
29 u8 dreg;
30};
Laurent Pincharte51d5342013-02-17 00:26:33 +010031
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010032struct sh_pfc_chip {
33 struct sh_pfc *pfc;
34 struct gpio_chip gpio_chip;
35
36 struct sh_pfc_window *mem;
Laurent Pinchart51cb2262013-02-16 18:34:32 +010037 struct sh_pfc_gpio_data_reg *regs;
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010038 struct sh_pfc_gpio_pin *pins;
Paul Mundtb3c185a2012-06-20 17:29:04 +090039};
40
Paul Mundtb3c185a2012-06-20 17:29:04 +090041static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
42{
Linus Walleij7cb093c2015-12-08 10:24:54 +010043 struct sh_pfc_chip *chip = gpiochip_get_data(gc);
44 return chip->pfc;
Paul Mundtb3c185a2012-06-20 17:29:04 +090045}
46
Laurent Pinchart757b0552013-07-15 13:25:08 +020047static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset,
Laurent Pinchart51cb2262013-02-16 18:34:32 +010048 struct sh_pfc_gpio_data_reg **reg,
49 unsigned int *bit)
Laurent Pinchart41f12192013-02-15 02:04:55 +010050{
Laurent Pinchart757b0552013-07-15 13:25:08 +020051 int idx = sh_pfc_get_pin_index(chip->pfc, offset);
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010052 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
Laurent Pinchart41f12192013-02-15 02:04:55 +010053
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010054 *reg = &chip->regs[gpio_pin->dreg];
55 *bit = gpio_pin->dbit;
Laurent Pinchart41f12192013-02-15 02:04:55 +010056}
57
Geert Uytterhoevenfc889362015-02-27 18:38:04 +010058static u32 gpio_read_data_reg(struct sh_pfc_chip *chip,
59 const struct pinmux_data_reg *dreg)
Laurent Pincharte51d5342013-02-17 00:26:33 +010060{
Geert Uytterhoeven1f34de02015-03-12 11:09:16 +010061 phys_addr_t address = dreg->reg;
62 void __iomem *mem = address - chip->mem->phys + chip->mem->virt;
Laurent Pincharte51d5342013-02-17 00:26:33 +010063
64 return sh_pfc_read_raw_reg(mem, dreg->reg_width);
65}
66
67static void gpio_write_data_reg(struct sh_pfc_chip *chip,
Geert Uytterhoevenfc889362015-02-27 18:38:04 +010068 const struct pinmux_data_reg *dreg, u32 value)
Laurent Pincharte51d5342013-02-17 00:26:33 +010069{
Geert Uytterhoeven1f34de02015-03-12 11:09:16 +010070 phys_addr_t address = dreg->reg;
71 void __iomem *mem = address - chip->mem->phys + chip->mem->virt;
Laurent Pincharte51d5342013-02-17 00:26:33 +010072
73 sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
74}
75
Laurent Pinchart757b0552013-07-15 13:25:08 +020076static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx)
Laurent Pinchart41f12192013-02-15 02:04:55 +010077{
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010078 struct sh_pfc *pfc = chip->pfc;
Laurent Pinchart757b0552013-07-15 13:25:08 +020079 struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
80 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
Laurent Pincharte51d5342013-02-17 00:26:33 +010081 const struct pinmux_data_reg *dreg;
82 unsigned int bit;
83 unsigned int i;
Laurent Pinchart41f12192013-02-15 02:04:55 +010084
Geert Uytterhoeven17c7cbb2015-03-12 11:09:15 +010085 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
Laurent Pincharte51d5342013-02-17 00:26:33 +010086 for (bit = 0; bit < dreg->reg_width; bit++) {
Laurent Pinchart1a0039d2013-03-08 17:43:54 +010087 if (dreg->enum_ids[bit] == pin->enum_id) {
88 gpio_pin->dreg = i;
89 gpio_pin->dbit = bit;
Laurent Pinchart41f12192013-02-15 02:04:55 +010090 return;
91 }
92 }
Laurent Pinchart41f12192013-02-15 02:04:55 +010093 }
94
95 BUG();
96}
97
Laurent Pincharte51d5342013-02-17 00:26:33 +010098static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
Laurent Pinchart41f12192013-02-15 02:04:55 +010099{
Laurent Pincharte51d5342013-02-17 00:26:33 +0100100 struct sh_pfc *pfc = chip->pfc;
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100101 const struct pinmux_data_reg *dreg;
Laurent Pincharte51d5342013-02-17 00:26:33 +0100102 unsigned int i;
Laurent Pinchart41f12192013-02-15 02:04:55 +0100103
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100104 /* Count the number of data registers, allocate memory and initialize
105 * them.
106 */
107 for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
108 ;
109
110 chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
111 GFP_KERNEL);
112 if (chip->regs == NULL)
113 return -ENOMEM;
114
115 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
116 chip->regs[i].info = dreg;
117 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
118 }
Laurent Pincharte51d5342013-02-17 00:26:33 +0100119
120 for (i = 0; i < pfc->info->nr_pins; i++) {
121 if (pfc->info->pins[i].enum_id == 0)
Laurent Pinchart41f12192013-02-15 02:04:55 +0100122 continue;
123
Laurent Pinchart1a0039d2013-03-08 17:43:54 +0100124 gpio_setup_data_reg(chip, i);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100125 }
126
Laurent Pincharte51d5342013-02-17 00:26:33 +0100127 return 0;
Laurent Pinchart41f12192013-02-15 02:04:55 +0100128}
129
Laurent Pinchart16883812012-12-06 14:49:25 +0100130/* -----------------------------------------------------------------------------
131 * Pin GPIOs
132 */
133
134static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900135{
Laurent Pinchart0b73ee52013-02-14 22:12:11 +0100136 struct sh_pfc *pfc = gpio_to_pfc(gc);
Laurent Pinchart1a0039d2013-03-08 17:43:54 +0100137 int idx = sh_pfc_get_pin_index(pfc, offset);
Laurent Pinchart0b73ee52013-02-14 22:12:11 +0100138
Laurent Pinchart1a0039d2013-03-08 17:43:54 +0100139 if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
Laurent Pinchart0b73ee52013-02-14 22:12:11 +0100140 return -EINVAL;
141
Laurent Pinchart16883812012-12-06 14:49:25 +0100142 return pinctrl_request_gpio(offset);
Paul Mundtb3c185a2012-06-20 17:29:04 +0900143}
144
Laurent Pinchart16883812012-12-06 14:49:25 +0100145static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900146{
Laurent Pinchart16883812012-12-06 14:49:25 +0100147 return pinctrl_free_gpio(offset);
Paul Mundtb3c185a2012-06-20 17:29:04 +0900148}
149
Laurent Pincharte51d5342013-02-17 00:26:33 +0100150static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
151 int value)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900152{
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100153 struct sh_pfc_gpio_data_reg *reg;
Laurent Pinchart41f12192013-02-15 02:04:55 +0100154 unsigned int bit;
Geert Uytterhoevencef28a22015-03-12 11:09:14 +0100155 unsigned int pos;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900156
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100157 gpio_get_data_reg(chip, offset, &reg, &bit);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100158
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100159 pos = reg->info->reg_width - (bit + 1);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100160
161 if (value)
Geert Uytterhoevenfc889362015-02-27 18:38:04 +0100162 reg->shadow |= BIT(pos);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100163 else
Geert Uytterhoevenfc889362015-02-27 18:38:04 +0100164 reg->shadow &= ~BIT(pos);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100165
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100166 gpio_write_data_reg(chip, reg->info, reg->shadow);
Paul Mundtb3c185a2012-06-20 17:29:04 +0900167}
168
Laurent Pinchart16883812012-12-06 14:49:25 +0100169static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900170{
Laurent Pinchart16883812012-12-06 14:49:25 +0100171 return pinctrl_gpio_direction_input(offset);
172}
173
174static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
175 int value)
176{
Linus Walleij7cb093c2015-12-08 10:24:54 +0100177 gpio_pin_set_value(gpiochip_get_data(gc), offset, value);
Laurent Pinchart16883812012-12-06 14:49:25 +0100178
179 return pinctrl_gpio_direction_output(offset);
180}
181
182static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
183{
Linus Walleij7cb093c2015-12-08 10:24:54 +0100184 struct sh_pfc_chip *chip = gpiochip_get_data(gc);
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100185 struct sh_pfc_gpio_data_reg *reg;
Laurent Pinchart41f12192013-02-15 02:04:55 +0100186 unsigned int bit;
Geert Uytterhoevencef28a22015-03-12 11:09:14 +0100187 unsigned int pos;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900188
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100189 gpio_get_data_reg(chip, offset, &reg, &bit);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100190
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100191 pos = reg->info->reg_width - (bit + 1);
Laurent Pinchart41f12192013-02-15 02:04:55 +0100192
Laurent Pinchart51cb2262013-02-16 18:34:32 +0100193 return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900194}
195
Laurent Pinchart16883812012-12-06 14:49:25 +0100196static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
Paul Mundtca5481c62012-07-10 12:08:14 +0900197{
Linus Walleij7cb093c2015-12-08 10:24:54 +0100198 gpio_pin_set_value(gpiochip_get_data(gc), offset, value);
Paul Mundtca5481c62012-07-10 12:08:14 +0900199}
200
Laurent Pinchart16883812012-12-06 14:49:25 +0100201static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900202{
203 struct sh_pfc *pfc = gpio_to_pfc(gc);
Laurent Pinchart8d72a7f2013-12-11 04:26:21 +0100204 unsigned int i, k;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900205
Laurent Pinchartc07f54f2013-01-03 14:12:14 +0100206 for (i = 0; i < pfc->info->gpio_irq_size; i++) {
Laurent Pinchart6d5bddd2013-12-16 20:25:15 +0100207 const short *gpios = pfc->info->gpio_irq[i].gpios;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900208
Laurent Pinchart316b2552013-12-11 04:26:22 +0100209 for (k = 0; gpios[k] >= 0; k++) {
Laurent Pinchartc07f54f2013-01-03 14:12:14 +0100210 if (gpios[k] == offset)
Laurent Pinchart70c8f012013-12-11 04:26:26 +0100211 goto found;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900212 }
213 }
214
Geert Uytterhoeven96976432016-05-04 10:21:53 +0200215 return 0;
Laurent Pinchart70c8f012013-12-11 04:26:26 +0100216
217found:
Laurent Pinchart4adeabd2015-09-22 10:08:13 +0300218 return pfc->irqs[i];
Paul Mundtb3c185a2012-06-20 17:29:04 +0900219}
220
Laurent Pincharte51d5342013-02-17 00:26:33 +0100221static int gpio_pin_setup(struct sh_pfc_chip *chip)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900222{
223 struct sh_pfc *pfc = chip->pfc;
224 struct gpio_chip *gc = &chip->gpio_chip;
Laurent Pincharte51d5342013-02-17 00:26:33 +0100225 int ret;
226
Laurent Pincharta1a35802013-07-15 13:36:39 +0200227 chip->pins = devm_kzalloc(pfc->dev, pfc->info->nr_pins *
228 sizeof(*chip->pins), GFP_KERNEL);
Laurent Pinchart1a0039d2013-03-08 17:43:54 +0100229 if (chip->pins == NULL)
230 return -ENOMEM;
231
Laurent Pincharte51d5342013-02-17 00:26:33 +0100232 ret = gpio_setup_data_regs(chip);
233 if (ret < 0)
234 return ret;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900235
Laurent Pinchart16883812012-12-06 14:49:25 +0100236 gc->request = gpio_pin_request;
237 gc->free = gpio_pin_free;
238 gc->direction_input = gpio_pin_direction_input;
239 gc->get = gpio_pin_get;
240 gc->direction_output = gpio_pin_direction_output;
241 gc->set = gpio_pin_set;
242 gc->to_irq = gpio_pin_to_irq;
243
244 gc->label = pfc->info->name;
Linus Walleij58383c72015-11-04 09:56:26 +0100245 gc->parent = pfc->dev;
Laurent Pinchart16883812012-12-06 14:49:25 +0100246 gc->owner = THIS_MODULE;
247 gc->base = 0;
Laurent Pinchart28818fa2013-07-15 13:48:56 +0200248 gc->ngpio = pfc->nr_gpio_pins;
Laurent Pincharte51d5342013-02-17 00:26:33 +0100249
250 return 0;
Laurent Pinchart16883812012-12-06 14:49:25 +0100251}
252
253/* -----------------------------------------------------------------------------
254 * Function GPIOs
255 */
256
Geert Uytterhoeven56f891b2015-08-04 15:55:19 +0200257#ifdef CONFIG_SUPERH
Laurent Pinchart16883812012-12-06 14:49:25 +0100258static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
259{
Laurent Pinchart9a643c92013-03-10 18:00:02 +0100260 static bool __print_once;
Laurent Pinchart16883812012-12-06 14:49:25 +0100261 struct sh_pfc *pfc = gpio_to_pfc(gc);
Laurent Pincharta68fdca92013-02-14 17:36:56 +0100262 unsigned int mark = pfc->info->func_gpios[offset].enum_id;
Laurent Pinchart16883812012-12-06 14:49:25 +0100263 unsigned long flags;
Laurent Pinchartb705c052013-03-10 16:38:23 +0100264 int ret;
Laurent Pinchart16883812012-12-06 14:49:25 +0100265
Laurent Pinchart9a643c92013-03-10 18:00:02 +0100266 if (!__print_once) {
267 dev_notice(pfc->dev,
268 "Use of GPIO API for function requests is deprecated."
269 " Convert to pinctrl\n");
270 __print_once = true;
271 }
Laurent Pinchart16883812012-12-06 14:49:25 +0100272
Laurent Pincharta68fdca92013-02-14 17:36:56 +0100273 if (mark == 0)
Laurent Pinchartb705c052013-03-10 16:38:23 +0100274 return -EINVAL;
Laurent Pinchart16883812012-12-06 14:49:25 +0100275
276 spin_lock_irqsave(&pfc->lock, flags);
Laurent Pinchartb705c052013-03-10 16:38:23 +0100277 ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
Laurent Pinchart16883812012-12-06 14:49:25 +0100278 spin_unlock_irqrestore(&pfc->lock, flags);
Laurent Pinchartb705c052013-03-10 16:38:23 +0100279
Laurent Pinchart16883812012-12-06 14:49:25 +0100280 return ret;
281}
282
Laurent Pincharte51d5342013-02-17 00:26:33 +0100283static int gpio_function_setup(struct sh_pfc_chip *chip)
Laurent Pinchart16883812012-12-06 14:49:25 +0100284{
285 struct sh_pfc *pfc = chip->pfc;
286 struct gpio_chip *gc = &chip->gpio_chip;
287
288 gc->request = gpio_function_request;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900289
Laurent Pinchart19bb7fe32012-12-15 23:51:20 +0100290 gc->label = pfc->info->name;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900291 gc->owner = THIS_MODULE;
Laurent Pinchart28818fa2013-07-15 13:48:56 +0200292 gc->base = pfc->nr_gpio_pins;
Laurent Pinchart16883812012-12-06 14:49:25 +0100293 gc->ngpio = pfc->info->nr_func_gpios;
Laurent Pincharte51d5342013-02-17 00:26:33 +0100294
295 return 0;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900296}
Geert Uytterhoeven56f891b2015-08-04 15:55:19 +0200297#endif
Paul Mundtb3c185a2012-06-20 17:29:04 +0900298
Laurent Pinchart16883812012-12-06 14:49:25 +0100299/* -----------------------------------------------------------------------------
300 * Register/unregister
301 */
302
303static struct sh_pfc_chip *
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100304sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *),
305 struct sh_pfc_window *mem)
Paul Mundtb3c185a2012-06-20 17:29:04 +0900306{
307 struct sh_pfc_chip *chip;
308 int ret;
309
Laurent Pinchart1724acf2012-12-15 23:50:48 +0100310 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
Paul Mundtb3c185a2012-06-20 17:29:04 +0900311 if (unlikely(!chip))
Laurent Pinchart16883812012-12-06 14:49:25 +0100312 return ERR_PTR(-ENOMEM);
Paul Mundtb3c185a2012-06-20 17:29:04 +0900313
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100314 chip->mem = mem;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900315 chip->pfc = pfc;
316
Laurent Pincharte51d5342013-02-17 00:26:33 +0100317 ret = setup(chip);
318 if (ret < 0)
319 return ERR_PTR(ret);
Paul Mundtb3c185a2012-06-20 17:29:04 +0900320
Geert Uytterhoevenc29e2f22016-06-10 11:22:44 +0200321 ret = devm_gpiochip_add_data(pfc->dev, &chip->gpio_chip, chip);
Laurent Pinchart1724acf2012-12-15 23:50:48 +0100322 if (unlikely(ret < 0))
Laurent Pinchart16883812012-12-06 14:49:25 +0100323 return ERR_PTR(ret);
324
Laurent Pinchart9a643c92013-03-10 18:00:02 +0100325 dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
326 chip->gpio_chip.label, chip->gpio_chip.base,
327 chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
Laurent Pinchart16883812012-12-06 14:49:25 +0100328
329 return chip;
330}
331
332int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
333{
334 struct sh_pfc_chip *chip;
Geert Uytterhoeven1f34de02015-03-12 11:09:16 +0100335 phys_addr_t address;
Laurent Pinchart63d57382013-02-15 01:33:38 +0100336 unsigned int i;
Laurent Pinchart16883812012-12-06 14:49:25 +0100337
Laurent Pinchart1a4fd582013-03-10 03:19:44 +0100338 if (pfc->info->data_regs == NULL)
339 return 0;
340
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100341 /* Find the memory window that contain the GPIO registers. Boards that
342 * register a separate GPIO device will not supply a memory resource
343 * that covers the data registers. In that case don't try to handle
344 * GPIOs.
345 */
Geert Uytterhoeven1f34de02015-03-12 11:09:16 +0100346 address = pfc->info->data_regs[0].reg;
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100347 for (i = 0; i < pfc->num_windows; ++i) {
Laurent Pinchart5b46ac32013-12-11 04:26:25 +0100348 struct sh_pfc_window *window = &pfc->windows[i];
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100349
Geert Uytterhoeven1f34de02015-03-12 11:09:16 +0100350 if (address >= window->phys &&
351 address < window->phys + window->size)
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100352 break;
353 }
354
355 if (i == pfc->num_windows)
356 return 0;
357
Laurent Pinchart70c8f012013-12-11 04:26:26 +0100358 /* If we have IRQ resources make sure their number is correct. */
Laurent Pinchart4adeabd2015-09-22 10:08:13 +0300359 if (pfc->num_irqs != pfc->info->gpio_irq_size) {
Laurent Pinchart70c8f012013-12-11 04:26:26 +0100360 dev_err(pfc->dev, "invalid number of IRQ resources\n");
361 return -EINVAL;
362 }
363
Laurent Pinchart63d57382013-02-15 01:33:38 +0100364 /* Register the real GPIOs chip. */
Laurent Pinchart5b46ac32013-12-11 04:26:25 +0100365 chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->windows[i]);
Laurent Pinchart16883812012-12-06 14:49:25 +0100366 if (IS_ERR(chip))
367 return PTR_ERR(chip);
Laurent Pinchart6f6a4a62012-12-15 23:50:46 +0100368
369 pfc->gpio = chip;
Paul Mundtb3c185a2012-06-20 17:29:04 +0900370
Geert Uytterhoeven18fab3992015-08-04 15:55:17 +0200371 if (IS_ENABLED(CONFIG_OF) && pfc->dev->of_node)
372 return 0;
Laurent Pinchart63d57382013-02-15 01:33:38 +0100373
Geert Uytterhoeven90d06612015-08-27 22:07:23 +0200374#ifdef CONFIG_SUPERH
375 /*
376 * Register the GPIO to pin mappings. As pins with GPIO ports
377 * must come first in the ranges, skip the pins without GPIO
378 * ports by stopping at the first range that contains such a
379 * pin.
380 */
381 for (i = 0; i < pfc->nr_ranges; ++i) {
382 const struct sh_pfc_pin_range *range = &pfc->ranges[i];
383 int ret;
Laurent Pinchart4f82e3e2013-07-15 21:10:54 +0200384
Geert Uytterhoeven90d06612015-08-27 22:07:23 +0200385 if (range->start >= pfc->nr_gpio_pins)
386 break;
Geert Uytterhoeven18fab3992015-08-04 15:55:17 +0200387
Geert Uytterhoeven90d06612015-08-27 22:07:23 +0200388 ret = gpiochip_add_pin_range(&chip->gpio_chip,
389 dev_name(pfc->dev), range->start, range->start,
390 range->end - range->start + 1);
391 if (ret < 0)
392 return ret;
Laurent Pinchart63d57382013-02-15 01:33:38 +0100393 }
394
395 /* Register the function GPIOs chip. */
Laurent Pinchart542a5642013-03-07 14:31:57 +0100396 if (pfc->info->nr_func_gpios == 0)
397 return 0;
398
Laurent Pinchartceef91d2013-03-10 03:19:44 +0100399 chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL);
Laurent Pinchart16883812012-12-06 14:49:25 +0100400 if (IS_ERR(chip))
401 return PTR_ERR(chip);
Geert Uytterhoeven56f891b2015-08-04 15:55:19 +0200402#endif /* CONFIG_SUPERH */
Paul Mundtb3c185a2012-06-20 17:29:04 +0900403
Paul Mundtb3c185a2012-06-20 17:29:04 +0900404 return 0;
405}