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Mike Frysinger780431e2007-10-21 23:37:54 +08001/*
Mike Frysingerfee40112008-02-25 15:06:07 +08002 * gptimers.c - Blackfin General Purpose Timer core API
Mike Frysinger780431e2007-10-21 23:37:54 +08003 *
Mike Frysingerfee40112008-02-25 15:06:07 +08004 * Copyright (c) 2005-2008 Analog Devices Inc.
5 * Copyright (C) 2005 John DeHority
6 * Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
Mike Frysinger780431e2007-10-21 23:37:54 +08007 *
8 * Licensed under the GPLv2.
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
Michael Hennerichf086f232008-05-20 16:42:39 +080013#include <linux/io.h>
Mike Frysinger780431e2007-10-21 23:37:54 +080014
Mike Frysinger780431e2007-10-21 23:37:54 +080015#include <asm/blackfin.h>
16#include <asm/gptimers.h>
17
18#ifdef DEBUG
19# define tassert(expr)
20#else
21# define tassert(expr) \
22 if (!(expr)) \
Mike Frysinger4ad1ec72007-10-29 18:02:09 +080023 printk(KERN_DEBUG "%s:%s:%i: Assertion failed: " #expr "\n", __FILE__, __func__, __LINE__);
Mike Frysinger780431e2007-10-21 23:37:54 +080024#endif
25
26#define BFIN_TIMER_NUM_GROUP (BFIN_TIMER_OCTET(MAX_BLACKFIN_GPTIMERS - 1) + 1)
27
28typedef struct {
29 uint16_t config;
30 uint16_t __pad;
31 uint32_t counter;
32 uint32_t period;
33 uint32_t width;
34} GPTIMER_timer_regs;
35
36typedef struct {
37 uint16_t enable;
38 uint16_t __pad0;
39 uint16_t disable;
40 uint16_t __pad1;
41 uint32_t status;
42} GPTIMER_group_regs;
43
44static volatile GPTIMER_timer_regs *const timer_regs[MAX_BLACKFIN_GPTIMERS] =
45{
46 (GPTIMER_timer_regs *)TIMER0_CONFIG,
47 (GPTIMER_timer_regs *)TIMER1_CONFIG,
48 (GPTIMER_timer_regs *)TIMER2_CONFIG,
49#if (MAX_BLACKFIN_GPTIMERS > 3)
50 (GPTIMER_timer_regs *)TIMER3_CONFIG,
51 (GPTIMER_timer_regs *)TIMER4_CONFIG,
52 (GPTIMER_timer_regs *)TIMER5_CONFIG,
53 (GPTIMER_timer_regs *)TIMER6_CONFIG,
54 (GPTIMER_timer_regs *)TIMER7_CONFIG,
Meihui Fan6eceb0d2008-04-23 08:53:15 +080055# if (MAX_BLACKFIN_GPTIMERS > 8)
Mike Frysinger780431e2007-10-21 23:37:54 +080056 (GPTIMER_timer_regs *)TIMER8_CONFIG,
57 (GPTIMER_timer_regs *)TIMER9_CONFIG,
58 (GPTIMER_timer_regs *)TIMER10_CONFIG,
Meihui Fan6eceb0d2008-04-23 08:53:15 +080059# if (MAX_BLACKFIN_GPTIMERS > 11)
Mike Frysinger780431e2007-10-21 23:37:54 +080060 (GPTIMER_timer_regs *)TIMER11_CONFIG,
Meihui Fan6eceb0d2008-04-23 08:53:15 +080061# endif
62# endif
Mike Frysinger780431e2007-10-21 23:37:54 +080063#endif
64};
65
66static volatile GPTIMER_group_regs *const group_regs[BFIN_TIMER_NUM_GROUP] =
67{
68 (GPTIMER_group_regs *)TIMER0_GROUP_REG,
69#if (MAX_BLACKFIN_GPTIMERS > 8)
70 (GPTIMER_group_regs *)TIMER8_GROUP_REG,
71#endif
72};
73
Mike Frysinger4ad1ec72007-10-29 18:02:09 +080074static uint32_t const trun_mask[MAX_BLACKFIN_GPTIMERS] =
Mike Frysinger780431e2007-10-21 23:37:54 +080075{
76 TIMER_STATUS_TRUN0,
77 TIMER_STATUS_TRUN1,
78 TIMER_STATUS_TRUN2,
79#if (MAX_BLACKFIN_GPTIMERS > 3)
80 TIMER_STATUS_TRUN3,
81 TIMER_STATUS_TRUN4,
82 TIMER_STATUS_TRUN5,
83 TIMER_STATUS_TRUN6,
84 TIMER_STATUS_TRUN7,
Meihui Fan6eceb0d2008-04-23 08:53:15 +080085# if (MAX_BLACKFIN_GPTIMERS > 8)
Mike Frysinger780431e2007-10-21 23:37:54 +080086 TIMER_STATUS_TRUN8,
87 TIMER_STATUS_TRUN9,
88 TIMER_STATUS_TRUN10,
Meihui Fan6eceb0d2008-04-23 08:53:15 +080089# if (MAX_BLACKFIN_GPTIMERS > 11)
Mike Frysinger780431e2007-10-21 23:37:54 +080090 TIMER_STATUS_TRUN11,
Meihui Fan6eceb0d2008-04-23 08:53:15 +080091# endif
92# endif
Mike Frysinger780431e2007-10-21 23:37:54 +080093#endif
94};
95
Mike Frysinger4ad1ec72007-10-29 18:02:09 +080096static uint32_t const tovf_mask[MAX_BLACKFIN_GPTIMERS] =
97{
98 TIMER_STATUS_TOVF0,
99 TIMER_STATUS_TOVF1,
100 TIMER_STATUS_TOVF2,
101#if (MAX_BLACKFIN_GPTIMERS > 3)
102 TIMER_STATUS_TOVF3,
103 TIMER_STATUS_TOVF4,
104 TIMER_STATUS_TOVF5,
105 TIMER_STATUS_TOVF6,
106 TIMER_STATUS_TOVF7,
Meihui Fan6eceb0d2008-04-23 08:53:15 +0800107# if (MAX_BLACKFIN_GPTIMERS > 8)
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800108 TIMER_STATUS_TOVF8,
109 TIMER_STATUS_TOVF9,
110 TIMER_STATUS_TOVF10,
Meihui Fan6eceb0d2008-04-23 08:53:15 +0800111# if (MAX_BLACKFIN_GPTIMERS > 11)
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800112 TIMER_STATUS_TOVF11,
Meihui Fan6eceb0d2008-04-23 08:53:15 +0800113# endif
114# endif
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800115#endif
116};
117
118static uint32_t const timil_mask[MAX_BLACKFIN_GPTIMERS] =
Mike Frysinger780431e2007-10-21 23:37:54 +0800119{
120 TIMER_STATUS_TIMIL0,
121 TIMER_STATUS_TIMIL1,
122 TIMER_STATUS_TIMIL2,
123#if (MAX_BLACKFIN_GPTIMERS > 3)
124 TIMER_STATUS_TIMIL3,
125 TIMER_STATUS_TIMIL4,
126 TIMER_STATUS_TIMIL5,
127 TIMER_STATUS_TIMIL6,
128 TIMER_STATUS_TIMIL7,
Meihui Fan6eceb0d2008-04-23 08:53:15 +0800129# if (MAX_BLACKFIN_GPTIMERS > 8)
Mike Frysinger780431e2007-10-21 23:37:54 +0800130 TIMER_STATUS_TIMIL8,
131 TIMER_STATUS_TIMIL9,
132 TIMER_STATUS_TIMIL10,
Meihui Fan6eceb0d2008-04-23 08:53:15 +0800133# if (MAX_BLACKFIN_GPTIMERS > 11)
Mike Frysinger780431e2007-10-21 23:37:54 +0800134 TIMER_STATUS_TIMIL11,
Meihui Fan6eceb0d2008-04-23 08:53:15 +0800135# endif
136# endif
Mike Frysinger780431e2007-10-21 23:37:54 +0800137#endif
138};
139
140void set_gptimer_pwidth(int timer_id, uint32_t value)
141{
142 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
143 timer_regs[timer_id]->width = value;
144 SSYNC();
145}
146EXPORT_SYMBOL(set_gptimer_pwidth);
147
148uint32_t get_gptimer_pwidth(int timer_id)
149{
150 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
151 return timer_regs[timer_id]->width;
152}
153EXPORT_SYMBOL(get_gptimer_pwidth);
154
155void set_gptimer_period(int timer_id, uint32_t period)
156{
157 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
158 timer_regs[timer_id]->period = period;
159 SSYNC();
160}
161EXPORT_SYMBOL(set_gptimer_period);
162
163uint32_t get_gptimer_period(int timer_id)
164{
165 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
166 return timer_regs[timer_id]->period;
167}
168EXPORT_SYMBOL(get_gptimer_period);
169
170uint32_t get_gptimer_count(int timer_id)
171{
172 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
173 return timer_regs[timer_id]->counter;
174}
175EXPORT_SYMBOL(get_gptimer_count);
176
177uint32_t get_gptimer_status(int group)
178{
179 tassert(group < BFIN_TIMER_NUM_GROUP);
180 return group_regs[group]->status;
181}
182EXPORT_SYMBOL(get_gptimer_status);
183
184void set_gptimer_status(int group, uint32_t value)
185{
186 tassert(group < BFIN_TIMER_NUM_GROUP);
187 group_regs[group]->status = value;
188 SSYNC();
189}
190EXPORT_SYMBOL(set_gptimer_status);
191
192uint16_t get_gptimer_intr(int timer_id)
193{
194 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800195 return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]) ? 1 : 0;
Mike Frysinger780431e2007-10-21 23:37:54 +0800196}
197EXPORT_SYMBOL(get_gptimer_intr);
198
199void clear_gptimer_intr(int timer_id)
200{
201 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800202 group_regs[BFIN_TIMER_OCTET(timer_id)]->status = timil_mask[timer_id];
Mike Frysinger780431e2007-10-21 23:37:54 +0800203}
204EXPORT_SYMBOL(clear_gptimer_intr);
205
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800206uint16_t get_gptimer_over(int timer_id)
207{
208 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
209 return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]) ? 1 : 0;
210}
211EXPORT_SYMBOL(get_gptimer_over);
212
213void clear_gptimer_over(int timer_id)
214{
215 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
216 group_regs[BFIN_TIMER_OCTET(timer_id)]->status = tovf_mask[timer_id];
217}
218EXPORT_SYMBOL(clear_gptimer_over);
219
Mike Frysinger780431e2007-10-21 23:37:54 +0800220void set_gptimer_config(int timer_id, uint16_t config)
221{
222 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
223 timer_regs[timer_id]->config = config;
224 SSYNC();
225}
226EXPORT_SYMBOL(set_gptimer_config);
227
228uint16_t get_gptimer_config(int timer_id)
229{
230 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
231 return timer_regs[timer_id]->config;
232}
233EXPORT_SYMBOL(get_gptimer_config);
234
235void enable_gptimers(uint16_t mask)
236{
237 int i;
238 tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
239 for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
240 group_regs[i]->enable = mask & 0xFF;
241 mask >>= 8;
242 }
243 SSYNC();
244}
245EXPORT_SYMBOL(enable_gptimers);
246
247void disable_gptimers(uint16_t mask)
248{
249 int i;
250 uint16_t m = mask;
251 tassert((mask & ~BLACKFIN_GPTIMER_IDMASK) == 0);
252 for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i) {
253 group_regs[i]->disable = m & 0xFF;
254 m >>= 8;
255 }
256 for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i)
257 if (mask & (1 << i))
Mike Frysinger4ad1ec72007-10-29 18:02:09 +0800258 group_regs[BFIN_TIMER_OCTET(i)]->status |= trun_mask[i];
Mike Frysinger780431e2007-10-21 23:37:54 +0800259 SSYNC();
260}
261EXPORT_SYMBOL(disable_gptimers);
262
263void set_gptimer_pulse_hi(int timer_id)
264{
265 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
266 timer_regs[timer_id]->config |= TIMER_PULSE_HI;
267 SSYNC();
268}
269EXPORT_SYMBOL(set_gptimer_pulse_hi);
270
271void clear_gptimer_pulse_hi(int timer_id)
272{
273 tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
274 timer_regs[timer_id]->config &= ~TIMER_PULSE_HI;
275 SSYNC();
276}
277EXPORT_SYMBOL(clear_gptimer_pulse_hi);
278
279uint16_t get_enabled_gptimers(void)
280{
281 int i;
282 uint16_t result = 0;
283 for (i = 0; i < BFIN_TIMER_NUM_GROUP; ++i)
284 result |= (group_regs[i]->enable << (i << 3));
285 return result;
286}
287EXPORT_SYMBOL(get_enabled_gptimers);
288
289MODULE_AUTHOR("Axel Weiss (awe@aglaia-gmbh.de)");
290MODULE_DESCRIPTION("Blackfin General Purpose Timers API");
291MODULE_LICENSE("GPL");