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Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -05001/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _CXLFLASH_MAIN_H
16#define _CXLFLASH_MAIN_H
17
18#include <linux/list.h>
19#include <linux/types.h>
20#include <scsi/scsi.h>
21#include <scsi/scsi_device.h>
22
23#define CXLFLASH_NAME "cxlflash"
24#define CXLFLASH_ADAPTER_NAME "IBM POWER CXL Flash Adapter"
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050025
Manoj Kumara2746fb2015-12-14 15:07:43 -060026#define PCI_DEVICE_ID_IBM_CORSA 0x04F0
27#define PCI_DEVICE_ID_IBM_FLASH_GT 0x0600
Matthew R. Ochs94344522017-02-16 21:39:32 -060028#define PCI_DEVICE_ID_IBM_BRIARD 0x0624
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050029
30/* Since there is only one target, make it 0 */
31#define CXLFLASH_TARGET 0
32#define CXLFLASH_MAX_CDB_LEN 16
33
34/* Really only one target per bus since the Texan is directly attached */
35#define CXLFLASH_MAX_NUM_TARGETS_PER_BUS 1
36#define CXLFLASH_MAX_NUM_LUNS_PER_TARGET 65536
37
38#define CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT (120 * HZ)
39
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050040/* FC defines */
41#define FC_MTIP_CMDCONFIG 0x010
42#define FC_MTIP_STATUS 0x018
43
44#define FC_PNAME 0x300
45#define FC_CONFIG 0x320
46#define FC_CONFIG2 0x328
47#define FC_STATUS 0x330
48#define FC_ERROR 0x380
49#define FC_ERRCAP 0x388
50#define FC_ERRMSK 0x390
51#define FC_CNT_CRCERR 0x538
52#define FC_CRC_THRESH 0x580
53
54#define FC_MTIP_CMDCONFIG_ONLINE 0x20ULL
55#define FC_MTIP_CMDCONFIG_OFFLINE 0x40ULL
56
57#define FC_MTIP_STATUS_MASK 0x30ULL
58#define FC_MTIP_STATUS_ONLINE 0x20ULL
59#define FC_MTIP_STATUS_OFFLINE 0x10ULL
60
61/* TIMEOUT and RETRY definitions */
62
63/* AFU command timeout values */
64#define MC_AFU_SYNC_TIMEOUT 5 /* 5 secs */
65
66/* AFU command room retry limit */
67#define MC_ROOM_RETRY_CNT 10
68
69/* FC CRC clear periodic timer */
70#define MC_CRC_THRESH 100 /* threshold in 5 mins */
71
72#define FC_PORT_STATUS_RETRY_CNT 100 /* 100 100ms retries = 10 seconds */
73#define FC_PORT_STATUS_RETRY_INTERVAL_US 100000 /* microseconds */
74
75/* VPD defines */
76#define CXLFLASH_VPD_LEN 256
77#define WWPN_LEN 16
78#define WWPN_BUF_LEN (WWPN_LEN + 1)
79
80enum undo_level {
Manoj N. Kumar9526f362016-03-25 14:26:34 -050081 UNDO_NOOP = 0,
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050082 FREE_IRQ,
83 UNMAP_ONE,
84 UNMAP_TWO,
Manoj N. Kumar9526f362016-03-25 14:26:34 -050085 UNMAP_THREE
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050086};
87
88struct dev_dependent_vals {
89 u64 max_sectors;
Uma Krishnan96e1b662016-06-15 18:49:38 -050090 u64 flags;
Uma Krishnan704c4b02016-06-15 18:49:57 -050091#define CXLFLASH_NOTIFY_SHUTDOWN 0x0000000000000001ULL
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050092};
93
94struct asyc_intr_info {
95 u64 status;
96 char *desc;
97 u8 port;
98 u8 action;
99#define CLR_FC_ERROR 0x01
100#define LINK_RESET 0x02
Matthew R. Ochsef510742015-10-21 15:13:37 -0500101#define SCAN_HOST 0x04
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500102};
103
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500104#endif /* _CXLFLASH_MAIN_H */