| Oder Chiou | 908b703 | 2014-04-10 10:57:35 +0800 | [diff] [blame] | 1 | RT5640/RT5639 audio CODEC |
| Stephen Warren | dcad9f0 | 2013-06-12 11:34:30 -0600 | [diff] [blame] | 2 | |
| 3 | This device supports I2C only. |
| 4 | |
| 5 | Required properties: |
| 6 | |
| Oder Chiou | 908b703 | 2014-04-10 10:57:35 +0800 | [diff] [blame] | 7 | - compatible : One of "realtek,rt5640" or "realtek,rt5639". |
| Stephen Warren | dcad9f0 | 2013-06-12 11:34:30 -0600 | [diff] [blame] | 8 | |
| 9 | - reg : The I2C address of the device. |
| 10 | |
| 11 | - interrupts : The CODEC's interrupt output. |
| 12 | |
| 13 | Optional properties: |
| 14 | |
| Sugar Zhang | 6049af0 | 2016-02-22 15:56:55 +0800 | [diff] [blame] | 15 | - clocks: The phandle of the master clock to the CODEC |
| 16 | - clock-names: Should be "mclk" |
| 17 | |
| Stephen Warren | dcad9f0 | 2013-06-12 11:34:30 -0600 | [diff] [blame] | 18 | - realtek,in1-differential |
| 19 | - realtek,in2-differential |
| Oder Chiou | 16566e4 | 2015-10-21 09:46:05 +0800 | [diff] [blame] | 20 | - realtek,in3-differential |
| 21 | Boolean. Indicate MIC1/2/3 input are differential, rather than single-ended. |
| Stephen Warren | dcad9f0 | 2013-06-12 11:34:30 -0600 | [diff] [blame] | 22 | |
| 23 | - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. |
| 24 | |
| Oder Chiou | 908b703 | 2014-04-10 10:57:35 +0800 | [diff] [blame] | 25 | Pins on the device (for linking into audio routes) for RT5639/RT5640: |
| Mark Brown | b33d1f0 | 2013-08-11 18:59:20 +0100 | [diff] [blame] | 26 | |
| 27 | * DMIC1 |
| 28 | * DMIC2 |
| 29 | * MICBIAS1 |
| 30 | * IN1P |
| Oder Chiou | 841fdde | 2015-10-21 09:46:05 +0800 | [diff] [blame] | 31 | * IN1N |
| Mark Brown | b33d1f0 | 2013-08-11 18:59:20 +0100 | [diff] [blame] | 32 | * IN2P |
| Oder Chiou | 841fdde | 2015-10-21 09:46:05 +0800 | [diff] [blame] | 33 | * IN2N |
| Oder Chiou | 16566e4 | 2015-10-21 09:46:05 +0800 | [diff] [blame] | 34 | * IN3P |
| 35 | * IN3N |
| Mark Brown | b33d1f0 | 2013-08-11 18:59:20 +0100 | [diff] [blame] | 36 | * HPOL |
| 37 | * HPOR |
| 38 | * LOUTL |
| 39 | * LOUTR |
| Mark Brown | b33d1f0 | 2013-08-11 18:59:20 +0100 | [diff] [blame] | 40 | * SPOLP |
| 41 | * SPOLN |
| 42 | * SPORP |
| 43 | * SPORN |
| 44 | |
| Oder Chiou | 908b703 | 2014-04-10 10:57:35 +0800 | [diff] [blame] | 45 | Additional pins on the device for RT5640: |
| 46 | |
| 47 | * MONOP |
| 48 | * MONON |
| 49 | |
| Stephen Warren | dcad9f0 | 2013-06-12 11:34:30 -0600 | [diff] [blame] | 50 | Example: |
| 51 | |
| 52 | rt5640 { |
| 53 | compatible = "realtek,rt5640"; |
| 54 | reg = <0x1c>; |
| 55 | interrupt-parent = <&gpio>; |
| 56 | interrupts = <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>; |
| 57 | realtek,ldo1-en-gpios = |
| 58 | <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; |
| 59 | }; |