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Jens Wiklander98dd64f2016-01-04 15:37:32 +01001/*
2 * Copyright (c) 2015, Linaro Limited
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14#ifndef __LINUX_ARM_SMCCC_H
15#define __LINUX_ARM_SMCCC_H
16
Marc Zyngier37dc3e62018-02-06 17:56:18 +000017#include <uapi/linux/const.h>
18
Jens Wiklander98dd64f2016-01-04 15:37:32 +010019/*
20 * This file provides common defines for ARM SMC Calling Convention as
21 * specified in
22 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
23 */
24
Marc Zyngier37dc3e62018-02-06 17:56:18 +000025#define ARM_SMCCC_STD_CALL _AC(0,U)
26#define ARM_SMCCC_FAST_CALL _AC(1,U)
Jens Wiklander98dd64f2016-01-04 15:37:32 +010027#define ARM_SMCCC_TYPE_SHIFT 31
28
29#define ARM_SMCCC_SMC_32 0
30#define ARM_SMCCC_SMC_64 1
31#define ARM_SMCCC_CALL_CONV_SHIFT 30
32
33#define ARM_SMCCC_OWNER_MASK 0x3F
34#define ARM_SMCCC_OWNER_SHIFT 24
35
36#define ARM_SMCCC_FUNC_MASK 0xFFFF
37
38#define ARM_SMCCC_IS_FAST_CALL(smc_val) \
39 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
40#define ARM_SMCCC_IS_64(smc_val) \
41 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
42#define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
43#define ARM_SMCCC_OWNER_NUM(smc_val) \
44 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
45
46#define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
47 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
48 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
49 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
50 ((func_num) & ARM_SMCCC_FUNC_MASK))
51
52#define ARM_SMCCC_OWNER_ARCH 0
53#define ARM_SMCCC_OWNER_CPU 1
54#define ARM_SMCCC_OWNER_SIP 2
55#define ARM_SMCCC_OWNER_OEM 3
56#define ARM_SMCCC_OWNER_STANDARD 4
57#define ARM_SMCCC_OWNER_TRUSTED_APP 48
58#define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
59#define ARM_SMCCC_OWNER_TRUSTED_OS 50
60#define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
61
Andy Gross82bcd082017-02-01 11:28:28 -060062#define ARM_SMCCC_QUIRK_NONE 0
63#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
64
Marc Zyngier45e20612018-02-06 17:56:12 +000065#define ARM_SMCCC_VERSION_1_0 0x10000
66#define ARM_SMCCC_VERSION_1_1 0x10001
67
68#define ARM_SMCCC_VERSION_FUNC_ID \
69 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
70 ARM_SMCCC_SMC_32, \
71 0, 0)
72
73#define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
74 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
75 ARM_SMCCC_SMC_32, \
76 0, 1)
77
Marc Zyngiere47273d2018-02-06 17:56:14 +000078#define ARM_SMCCC_ARCH_WORKAROUND_1 \
79 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
80 ARM_SMCCC_SMC_32, \
81 0, 0x8000)
82
Marc Zyngier5ad09d22018-07-20 10:53:00 +010083#define ARM_SMCCC_ARCH_WORKAROUND_2 \
84 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
85 ARM_SMCCC_SMC_32, \
86 0, 0x7fff)
87
James Morse6932c822022-03-31 19:33:52 +010088#define ARM_SMCCC_ARCH_WORKAROUND_3 \
89 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
90 ARM_SMCCC_SMC_32, \
91 0, 0x3fff)
92
93#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
94
Andy Gross82bcd082017-02-01 11:28:28 -060095#ifndef __ASSEMBLY__
96
97#include <linux/linkage.h>
98#include <linux/types.h>
Mark Rutlandc1692162019-08-09 14:22:40 +010099
100enum arm_smccc_conduit {
101 SMCCC_CONDUIT_NONE,
102 SMCCC_CONDUIT_SMC,
103 SMCCC_CONDUIT_HVC,
104};
105
106/**
107 * arm_smccc_1_1_get_conduit()
108 *
109 * Returns the conduit to be used for SMCCCv1.1 or later.
110 *
111 * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
112 */
113enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
114
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100115/**
116 * struct arm_smccc_res - Result from SMC/HVC call
117 * @a0-a3 result values from registers 0 to 3
118 */
119struct arm_smccc_res {
120 unsigned long a0;
121 unsigned long a1;
122 unsigned long a2;
123 unsigned long a3;
124};
125
126/**
Andy Gross680a0872017-02-01 11:28:27 -0600127 * struct arm_smccc_quirk - Contains quirk information
128 * @id: quirk identification
129 * @state: quirk specific information
130 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
131 */
132struct arm_smccc_quirk {
133 int id;
134 union {
135 unsigned long a6;
136 } state;
137};
138
139/**
140 * __arm_smccc_smc() - make SMC calls
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100141 * @a0-a7: arguments passed in registers 0 to 7
142 * @res: result values from registers 0 to 3
Andy Gross680a0872017-02-01 11:28:27 -0600143 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100144 *
145 * This function is used to make SMC calls following SMC Calling Convention.
146 * The content of the supplied param are copied to registers 0 to 7 prior
147 * to the SMC instruction. The return values are updated with the content
Andy Gross680a0872017-02-01 11:28:27 -0600148 * from register 0 to 3 on return from the SMC instruction. An optional
149 * quirk structure provides vendor specific behavior.
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100150 */
Andy Gross680a0872017-02-01 11:28:27 -0600151asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100152 unsigned long a2, unsigned long a3, unsigned long a4,
153 unsigned long a5, unsigned long a6, unsigned long a7,
Andy Gross680a0872017-02-01 11:28:27 -0600154 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100155
156/**
Andy Gross680a0872017-02-01 11:28:27 -0600157 * __arm_smccc_hvc() - make HVC calls
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100158 * @a0-a7: arguments passed in registers 0 to 7
159 * @res: result values from registers 0 to 3
Will Deacon3046ec62017-02-08 14:54:12 +0000160 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100161 *
162 * This function is used to make HVC calls following SMC Calling
163 * Convention. The content of the supplied param are copied to registers 0
164 * to 7 prior to the HVC instruction. The return values are updated with
Andy Gross680a0872017-02-01 11:28:27 -0600165 * the content from register 0 to 3 on return from the HVC instruction. An
166 * optional quirk structure provides vendor specific behavior.
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100167 */
Andy Gross680a0872017-02-01 11:28:27 -0600168asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100169 unsigned long a2, unsigned long a3, unsigned long a4,
170 unsigned long a5, unsigned long a6, unsigned long a7,
Andy Gross680a0872017-02-01 11:28:27 -0600171 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
172
173#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
174
175#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
176
177#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
178
179#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100180
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000181/* SMCCC v1.1 implementation madness follows */
182#ifdef CONFIG_ARM64
183
184#define SMCCC_SMC_INST "smc #0"
185#define SMCCC_HVC_INST "hvc #0"
Greg Hackmanne707f482018-03-02 13:22:46 -0800186#define SMCCC_REG(n) asm("x" # n)
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000187
188#elif defined(CONFIG_ARM)
189#include <asm/opcodes-sec.h>
190#include <asm/opcodes-virt.h>
191
192#define SMCCC_SMC_INST __SMC(0)
193#define SMCCC_HVC_INST __HVC(0)
Greg Hackmanne707f482018-03-02 13:22:46 -0800194#define SMCCC_REG(n) asm("r" # n)
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000195
196#endif
197
198#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
199
200#define __count_args(...) \
201 ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
202
203#define __constraint_write_0 \
204 "+r" (r0), "=&r" (r1), "=&r" (r2), "=&r" (r3)
205#define __constraint_write_1 \
206 "+r" (r0), "+r" (r1), "=&r" (r2), "=&r" (r3)
207#define __constraint_write_2 \
208 "+r" (r0), "+r" (r1), "+r" (r2), "=&r" (r3)
209#define __constraint_write_3 \
210 "+r" (r0), "+r" (r1), "+r" (r2), "+r" (r3)
211#define __constraint_write_4 __constraint_write_3
212#define __constraint_write_5 __constraint_write_4
213#define __constraint_write_6 __constraint_write_5
214#define __constraint_write_7 __constraint_write_6
215
216#define __constraint_read_0
217#define __constraint_read_1
218#define __constraint_read_2
219#define __constraint_read_3
220#define __constraint_read_4 "r" (r4)
221#define __constraint_read_5 __constraint_read_4, "r" (r5)
222#define __constraint_read_6 __constraint_read_5, "r" (r6)
223#define __constraint_read_7 __constraint_read_6, "r" (r7)
224
225#define __declare_arg_0(a0, res) \
226 struct arm_smccc_res *___res = res; \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700227 register unsigned long r0 SMCCC_REG(0) = (u32)a0; \
Greg Hackmanne707f482018-03-02 13:22:46 -0800228 register unsigned long r1 SMCCC_REG(1); \
229 register unsigned long r2 SMCCC_REG(2); \
230 register unsigned long r3 SMCCC_REG(3)
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000231
232#define __declare_arg_1(a0, a1, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100233 typeof(a1) __a1 = a1; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000234 struct arm_smccc_res *___res = res; \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700235 register unsigned long r0 SMCCC_REG(0) = (u32)a0; \
236 register unsigned long r1 SMCCC_REG(1) = __a1; \
Greg Hackmanne707f482018-03-02 13:22:46 -0800237 register unsigned long r2 SMCCC_REG(2); \
238 register unsigned long r3 SMCCC_REG(3)
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000239
240#define __declare_arg_2(a0, a1, a2, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100241 typeof(a1) __a1 = a1; \
242 typeof(a2) __a2 = a2; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000243 struct arm_smccc_res *___res = res; \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700244 register unsigned long r0 SMCCC_REG(0) = (u32)a0; \
245 register unsigned long r1 SMCCC_REG(1) = __a1; \
246 register unsigned long r2 SMCCC_REG(2) = __a2; \
Greg Hackmanne707f482018-03-02 13:22:46 -0800247 register unsigned long r3 SMCCC_REG(3)
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000248
249#define __declare_arg_3(a0, a1, a2, a3, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100250 typeof(a1) __a1 = a1; \
251 typeof(a2) __a2 = a2; \
252 typeof(a3) __a3 = a3; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000253 struct arm_smccc_res *___res = res; \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700254 register unsigned long r0 SMCCC_REG(0) = (u32)a0; \
255 register unsigned long r1 SMCCC_REG(1) = __a1; \
256 register unsigned long r2 SMCCC_REG(2) = __a2; \
257 register unsigned long r3 SMCCC_REG(3) = __a3
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000258
259#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100260 typeof(a4) __a4 = a4; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000261 __declare_arg_3(a0, a1, a2, a3, res); \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700262 register unsigned long r4 SMCCC_REG(4) = __a4
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000263
264#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100265 typeof(a5) __a5 = a5; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000266 __declare_arg_4(a0, a1, a2, a3, a4, res); \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700267 register unsigned long r5 SMCCC_REG(5) = __a5
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000268
269#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100270 typeof(a6) __a6 = a6; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000271 __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700272 register unsigned long r6 SMCCC_REG(6) = __a6
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000273
274#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
Marc Zyngier647b6d42018-08-24 15:08:30 +0100275 typeof(a7) __a7 = a7; \
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000276 __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
Greg Kroah-Hartmand33692e2018-10-04 16:14:47 -0700277 register unsigned long r7 SMCCC_REG(7) = __a7
Marc Zyngierac63fdb42018-02-06 17:56:19 +0000278
279#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
280#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)
281
282#define ___constraints(count) \
283 : __constraint_write_ ## count \
284 : __constraint_read_ ## count \
285 : "memory"
286#define __constraints(count) ___constraints(count)
287
288/*
289 * We have an output list that is not necessarily used, and GCC feels
290 * entitled to optimise the whole sequence away. "volatile" is what
291 * makes it stick.
292 */
293#define __arm_smccc_1_1(inst, ...) \
294 do { \
295 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
296 asm volatile(inst "\n" \
297 __constraints(__count_args(__VA_ARGS__))); \
298 if (___res) \
299 *___res = (typeof(*___res)){r0, r1, r2, r3}; \
300 } while (0)
301
302/*
303 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
304 *
305 * This is a variadic macro taking one to eight source arguments, and
306 * an optional return structure.
307 *
308 * @a0-a7: arguments passed in registers 0 to 7
309 * @res: result values from registers 0 to 3
310 *
311 * This macro is used to make SMC calls following SMC Calling Convention v1.1.
312 * The content of the supplied param are copied to registers 0 to 7 prior
313 * to the SMC instruction. The return values are updated with the content
314 * from register 0 to 3 on return from the SMC instruction if not NULL.
315 */
316#define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
317
318/*
319 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
320 *
321 * This is a variadic macro taking one to eight source arguments, and
322 * an optional return structure.
323 *
324 * @a0-a7: arguments passed in registers 0 to 7
325 * @res: result values from registers 0 to 3
326 *
327 * This macro is used to make HVC calls following SMC Calling Convention v1.1.
328 * The content of the supplied param are copied to registers 0 to 7 prior
329 * to the HVC instruction. The return values are updated with the content
330 * from register 0 to 3 on return from the HVC instruction if not NULL.
331 */
332#define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
333
Marc Zyngier1de27192018-07-20 10:52:59 +0100334/* Return codes defined in ARM DEN 0070A */
335#define SMCCC_RET_SUCCESS 0
336#define SMCCC_RET_NOT_SUPPORTED -1
337#define SMCCC_RET_NOT_REQUIRED -2
338
Steven Priced0f9db12019-10-21 16:28:21 +0100339/*
340 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
341 * Used when the SMCCC conduit is not defined. The empty asm statement
342 * avoids compiler warnings about unused variables.
343 */
344#define __fail_smccc_1_1(...) \
345 do { \
346 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
347 asm ("" __constraints(__count_args(__VA_ARGS__))); \
348 if (___res) \
349 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
350 } while (0)
351
352/*
353 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
354 *
355 * This is a variadic macro taking one to eight source arguments, and
356 * an optional return structure.
357 *
358 * @a0-a7: arguments passed in registers 0 to 7
359 * @res: result values from registers 0 to 3
360 *
361 * This macro will make either an HVC call or an SMC call depending on the
362 * current SMCCC conduit. If no valid conduit is available then -1
363 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
364 *
365 * The return value also provides the conduit that was used.
366 */
367#define arm_smccc_1_1_invoke(...) ({ \
368 int method = arm_smccc_1_1_get_conduit(); \
369 switch (method) { \
370 case SMCCC_CONDUIT_HVC: \
371 arm_smccc_1_1_hvc(__VA_ARGS__); \
372 break; \
373 case SMCCC_CONDUIT_SMC: \
374 arm_smccc_1_1_smc(__VA_ARGS__); \
375 break; \
376 default: \
377 __fail_smccc_1_1(__VA_ARGS__); \
378 method = SMCCC_CONDUIT_NONE; \
379 break; \
380 } \
381 method; \
382 })
383
384/* Paravirtualised time calls (defined by ARM DEN0057A) */
385#define ARM_SMCCC_HV_PV_TIME_FEATURES \
386 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
387 ARM_SMCCC_SMC_64, \
388 ARM_SMCCC_OWNER_STANDARD_HYP, \
389 0x20)
390
391#define ARM_SMCCC_HV_PV_TIME_ST \
392 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
393 ARM_SMCCC_SMC_64, \
394 ARM_SMCCC_OWNER_STANDARD_HYP, \
395 0x21)
396
Andy Gross82bcd082017-02-01 11:28:28 -0600397#endif /*__ASSEMBLY__*/
Jens Wiklander98dd64f2016-01-04 15:37:32 +0100398#endif /*__LINUX_ARM_SMCCC_H*/