Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Advanced Micro Devices, Inc. |
| 3 | * Copyright 2008 Red Hat Inc. |
| 4 | * Copyright 2009 Jerome Glisse. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: Dave Airlie |
| 25 | * Alex Deucher |
| 26 | * Jerome Glisse |
| 27 | */ |
| 28 | #ifndef __RADEON_ASIC_H__ |
| 29 | #define __RADEON_ASIC_H__ |
| 30 | |
| 31 | /* |
| 32 | * common functions |
| 33 | */ |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 34 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 35 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
Rafał Miłecki | 5ea597f | 2009-12-17 13:50:09 +0100 | [diff] [blame] | 36 | uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 37 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); |
| 38 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 39 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 40 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 41 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 42 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
| 43 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
| 44 | |
Alex Deucher | 37e9b6a | 2012-08-03 11:39:43 -0400 | [diff] [blame] | 45 | void atombios_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); |
Alex Deucher | 6d92f81 | 2012-09-14 09:59:26 -0400 | [diff] [blame] | 46 | u8 atombios_get_backlight_level(struct radeon_encoder *radeon_encoder); |
Alex Deucher | 37e9b6a | 2012-08-03 11:39:43 -0400 | [diff] [blame] | 47 | void radeon_legacy_set_backlight_level(struct radeon_encoder *radeon_encoder, u8 level); |
Alex Deucher | 6d92f81 | 2012-09-14 09:59:26 -0400 | [diff] [blame] | 48 | u8 radeon_legacy_get_backlight_level(struct radeon_encoder *radeon_encoder); |
Alex Deucher | 37e9b6a | 2012-08-03 11:39:43 -0400 | [diff] [blame] | 49 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 50 | /* |
Pauli Nieminen | 44ca747 | 2010-02-11 17:25:47 +0000 | [diff] [blame] | 51 | * r100,rv100,rs100,rv200,rs200 |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 52 | */ |
Daniel Vetter | 2b49750 | 2010-03-11 21:19:18 +0000 | [diff] [blame] | 53 | struct r100_mc_save { |
| 54 | u32 GENMO_WT; |
| 55 | u32 CRTC_EXT_CNTL; |
| 56 | u32 CRTC_GEN_CNTL; |
| 57 | u32 CRTC2_GEN_CNTL; |
| 58 | u32 CUR_OFFSET; |
| 59 | u32 CUR2_OFFSET; |
| 60 | }; |
| 61 | int r100_init(struct radeon_device *rdev); |
| 62 | void r100_fini(struct radeon_device *rdev); |
| 63 | int r100_suspend(struct radeon_device *rdev); |
| 64 | int r100_resume(struct radeon_device *rdev); |
Dave Airlie | 28d5204 | 2009-09-21 14:33:58 +1000 | [diff] [blame] | 65 | void r100_vga_set_state(struct radeon_device *rdev, bool state); |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 66 | bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
Jerome Glisse | a2d07b7 | 2010-03-09 14:45:11 +0000 | [diff] [blame] | 67 | int r100_asic_reset(struct radeon_device *rdev); |
Michel Dänzer | 7ed220d | 2009-08-13 11:10:51 +0200 | [diff] [blame] | 68 | u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 69 | void r100_pci_gart_tlb_flush(struct radeon_device *rdev); |
Christian König | 7f90fc9 | 2014-06-04 15:29:57 +0200 | [diff] [blame] | 70 | void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 71 | uint64_t addr, uint32_t flags); |
Alex Deucher | f712812 | 2012-02-23 17:53:45 -0500 | [diff] [blame] | 72 | void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 73 | int r100_irq_set(struct radeon_device *rdev); |
| 74 | int r100_irq_process(struct radeon_device *rdev); |
| 75 | void r100_fence_ring_emit(struct radeon_device *rdev, |
| 76 | struct radeon_fence *fence); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 77 | bool r100_semaphore_ring_emit(struct radeon_device *rdev, |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 78 | struct radeon_ring *cp, |
Christian König | 15d3332 | 2011-09-15 19:02:22 +0200 | [diff] [blame] | 79 | struct radeon_semaphore *semaphore, |
Christian König | 7b1f248 | 2011-09-23 15:11:23 +0200 | [diff] [blame] | 80 | bool emit_wait); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 81 | int r100_cs_parse(struct radeon_cs_parser *p); |
| 82 | void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
| 83 | uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 84 | struct radeon_fence *r100_copy_blit(struct radeon_device *rdev, |
| 85 | uint64_t src_offset, |
| 86 | uint64_t dst_offset, |
| 87 | unsigned num_gpu_pages, |
| 88 | struct reservation_object *resv); |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 89 | int r100_set_surface_reg(struct radeon_device *rdev, int reg, |
| 90 | uint32_t tiling_flags, uint32_t pitch, |
| 91 | uint32_t offset, uint32_t obj_size); |
Daniel Vetter | 9479c54 | 2010-03-11 21:19:16 +0000 | [diff] [blame] | 92 | void r100_clear_surface_reg(struct radeon_device *rdev, int reg); |
Jerome Glisse | c93bb85 | 2009-07-13 21:04:08 +0200 | [diff] [blame] | 93 | void r100_bandwidth_update(struct radeon_device *rdev); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 94 | void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 95 | int r100_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
Alex Deucher | 429770b | 2009-12-04 15:26:55 -0500 | [diff] [blame] | 96 | void r100_hpd_init(struct radeon_device *rdev); |
| 97 | void r100_hpd_fini(struct radeon_device *rdev); |
| 98 | bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 99 | void r100_hpd_set_polarity(struct radeon_device *rdev, |
| 100 | enum radeon_hpd_id hpd); |
Daniel Vetter | 2b49750 | 2010-03-11 21:19:18 +0000 | [diff] [blame] | 101 | int r100_debugfs_rbbm_init(struct radeon_device *rdev); |
| 102 | int r100_debugfs_cp_init(struct radeon_device *rdev); |
| 103 | void r100_cp_disable(struct radeon_device *rdev); |
| 104 | int r100_cp_init(struct radeon_device *rdev, unsigned ring_size); |
| 105 | void r100_cp_fini(struct radeon_device *rdev); |
| 106 | int r100_pci_gart_init(struct radeon_device *rdev); |
| 107 | void r100_pci_gart_fini(struct radeon_device *rdev); |
| 108 | int r100_pci_gart_enable(struct radeon_device *rdev); |
| 109 | void r100_pci_gart_disable(struct radeon_device *rdev); |
| 110 | int r100_debugfs_mc_info_init(struct radeon_device *rdev); |
| 111 | int r100_gui_wait_for_idle(struct radeon_device *rdev); |
Alex Deucher | f712812 | 2012-02-23 17:53:45 -0500 | [diff] [blame] | 112 | int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
Daniel Vetter | 2b49750 | 2010-03-11 21:19:18 +0000 | [diff] [blame] | 113 | void r100_irq_disable(struct radeon_device *rdev); |
| 114 | void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save); |
| 115 | void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save); |
| 116 | void r100_vram_init_sizes(struct radeon_device *rdev); |
Daniel Vetter | 2b49750 | 2010-03-11 21:19:18 +0000 | [diff] [blame] | 117 | int r100_cp_reset(struct radeon_device *rdev); |
| 118 | void r100_vga_render_disable(struct radeon_device *rdev); |
Dave Airlie | 4c712e6 | 2010-07-15 12:13:50 +1000 | [diff] [blame] | 119 | void r100_restore_sanity(struct radeon_device *rdev); |
Daniel Vetter | 2b49750 | 2010-03-11 21:19:18 +0000 | [diff] [blame] | 120 | int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, |
| 121 | struct radeon_cs_packet *pkt, |
| 122 | struct radeon_bo *robj); |
| 123 | int r100_cs_parse_packet0(struct radeon_cs_parser *p, |
| 124 | struct radeon_cs_packet *pkt, |
| 125 | const unsigned *auth, unsigned n, |
| 126 | radeon_packet0_check_t check); |
| 127 | int r100_cs_packet_parse(struct radeon_cs_parser *p, |
| 128 | struct radeon_cs_packet *pkt, |
| 129 | unsigned idx); |
| 130 | void r100_enable_bm(struct radeon_device *rdev); |
| 131 | void r100_set_common_regs(struct radeon_device *rdev); |
Jerome Glisse | 90aca4d | 2010-03-09 14:45:12 +0000 | [diff] [blame] | 132 | void r100_bm_disable(struct radeon_device *rdev); |
Alex Deucher | def9ba9 | 2010-04-22 12:39:58 -0400 | [diff] [blame] | 133 | extern bool r100_gui_idle(struct radeon_device *rdev); |
Alex Deucher | 49e02b7 | 2010-04-23 17:57:27 -0400 | [diff] [blame] | 134 | extern void r100_pm_misc(struct radeon_device *rdev); |
| 135 | extern void r100_pm_prepare(struct radeon_device *rdev); |
| 136 | extern void r100_pm_finish(struct radeon_device *rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 137 | extern void r100_pm_init_profile(struct radeon_device *rdev); |
| 138 | extern void r100_pm_get_dynpm_state(struct radeon_device *rdev); |
Christian König | 157fa14 | 2014-05-27 16:49:20 +0200 | [diff] [blame] | 139 | extern void r100_page_flip(struct radeon_device *rdev, int crtc, |
| 140 | u64 crtc_base); |
| 141 | extern bool r100_page_flip_pending(struct radeon_device *rdev, int crtc); |
Alex Deucher | 3ae19b7 | 2012-02-23 17:53:37 -0500 | [diff] [blame] | 142 | extern void r100_wait_for_vblank(struct radeon_device *rdev, int crtc); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 143 | extern int r100_mc_wait_for_idle(struct radeon_device *rdev); |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 144 | |
Alex Deucher | ea31bf6 | 2013-12-09 19:44:30 -0500 | [diff] [blame] | 145 | u32 r100_gfx_get_rptr(struct radeon_device *rdev, |
| 146 | struct radeon_ring *ring); |
| 147 | u32 r100_gfx_get_wptr(struct radeon_device *rdev, |
| 148 | struct radeon_ring *ring); |
| 149 | void r100_gfx_set_wptr(struct radeon_device *rdev, |
| 150 | struct radeon_ring *ring); |
Michel Dänzer | 897eba8 | 2014-09-17 16:25:55 +0900 | [diff] [blame] | 151 | |
Pauli Nieminen | 44ca747 | 2010-02-11 17:25:47 +0000 | [diff] [blame] | 152 | /* |
| 153 | * r200,rv250,rs300,rv280 |
| 154 | */ |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 155 | struct radeon_fence *r200_copy_dma(struct radeon_device *rdev, |
| 156 | uint64_t src_offset, |
| 157 | uint64_t dst_offset, |
| 158 | unsigned num_gpu_pages, |
| 159 | struct reservation_object *resv); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 160 | void r200_set_safe_registers(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 161 | |
| 162 | /* |
| 163 | * r300,r350,rv350,rv380 |
| 164 | */ |
Jerome Glisse | 207bf9e | 2009-09-30 15:35:32 +0200 | [diff] [blame] | 165 | extern int r300_init(struct radeon_device *rdev); |
| 166 | extern void r300_fini(struct radeon_device *rdev); |
| 167 | extern int r300_suspend(struct radeon_device *rdev); |
| 168 | extern int r300_resume(struct radeon_device *rdev); |
Jerome Glisse | a2d07b7 | 2010-03-09 14:45:11 +0000 | [diff] [blame] | 169 | extern int r300_asic_reset(struct radeon_device *rdev); |
Alex Deucher | f712812 | 2012-02-23 17:53:45 -0500 | [diff] [blame] | 170 | extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
Jerome Glisse | 207bf9e | 2009-09-30 15:35:32 +0200 | [diff] [blame] | 171 | extern void r300_fence_ring_emit(struct radeon_device *rdev, |
| 172 | struct radeon_fence *fence); |
| 173 | extern int r300_cs_parse(struct radeon_cs_parser *p); |
| 174 | extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); |
Christian König | 7f90fc9 | 2014-06-04 15:29:57 +0200 | [diff] [blame] | 175 | extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 176 | uint64_t addr, uint32_t flags); |
Jerome Glisse | 207bf9e | 2009-09-30 15:35:32 +0200 | [diff] [blame] | 177 | extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
Alex Deucher | c836a41 | 2009-12-23 10:07:50 -0500 | [diff] [blame] | 178 | extern int rv370_get_pcie_lanes(struct radeon_device *rdev); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 179 | extern void r300_set_reg_safe(struct radeon_device *rdev); |
| 180 | extern void r300_mc_program(struct radeon_device *rdev); |
| 181 | extern void r300_mc_init(struct radeon_device *rdev); |
| 182 | extern void r300_clock_startup(struct radeon_device *rdev); |
| 183 | extern int r300_mc_wait_for_idle(struct radeon_device *rdev); |
| 184 | extern int rv370_pcie_gart_init(struct radeon_device *rdev); |
| 185 | extern void rv370_pcie_gart_fini(struct radeon_device *rdev); |
| 186 | extern int rv370_pcie_gart_enable(struct radeon_device *rdev); |
| 187 | extern void rv370_pcie_gart_disable(struct radeon_device *rdev); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 188 | extern int r300_mc_wait_for_idle(struct radeon_device *rdev); |
Pauli Nieminen | 44ca747 | 2010-02-11 17:25:47 +0000 | [diff] [blame] | 189 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 190 | /* |
| 191 | * r420,r423,rv410 |
| 192 | */ |
Jerome Glisse | 9f022dd | 2009-09-11 15:35:22 +0200 | [diff] [blame] | 193 | extern int r420_init(struct radeon_device *rdev); |
| 194 | extern void r420_fini(struct radeon_device *rdev); |
| 195 | extern int r420_suspend(struct radeon_device *rdev); |
| 196 | extern int r420_resume(struct radeon_device *rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 197 | extern void r420_pm_init_profile(struct radeon_device *rdev); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 198 | extern u32 r420_mc_rreg(struct radeon_device *rdev, u32 reg); |
| 199 | extern void r420_mc_wreg(struct radeon_device *rdev, u32 reg, u32 v); |
| 200 | extern int r420_debugfs_pipes_info_init(struct radeon_device *rdev); |
| 201 | extern void r420_pipes_init(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 202 | |
| 203 | /* |
| 204 | * rs400,rs480 |
| 205 | */ |
Jerome Glisse | ca6ffc6 | 2009-10-01 10:20:52 +0200 | [diff] [blame] | 206 | extern int rs400_init(struct radeon_device *rdev); |
| 207 | extern void rs400_fini(struct radeon_device *rdev); |
| 208 | extern int rs400_suspend(struct radeon_device *rdev); |
| 209 | extern int rs400_resume(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 210 | void rs400_gart_tlb_flush(struct radeon_device *rdev); |
Christian König | 7f90fc9 | 2014-06-04 15:29:57 +0200 | [diff] [blame] | 211 | void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 212 | uint64_t addr, uint32_t flags); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 213 | uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 214 | void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 215 | int rs400_gart_init(struct radeon_device *rdev); |
| 216 | int rs400_gart_enable(struct radeon_device *rdev); |
| 217 | void rs400_gart_adjust_size(struct radeon_device *rdev); |
| 218 | void rs400_gart_disable(struct radeon_device *rdev); |
| 219 | void rs400_gart_fini(struct radeon_device *rdev); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 220 | extern int rs400_mc_wait_for_idle(struct radeon_device *rdev); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 221 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 222 | /* |
| 223 | * rs600. |
| 224 | */ |
Jerome Glisse | 90aca4d | 2010-03-09 14:45:12 +0000 | [diff] [blame] | 225 | extern int rs600_asic_reset(struct radeon_device *rdev); |
Jerome Glisse | c010f80 | 2009-09-30 22:09:06 +0200 | [diff] [blame] | 226 | extern int rs600_init(struct radeon_device *rdev); |
| 227 | extern void rs600_fini(struct radeon_device *rdev); |
| 228 | extern int rs600_suspend(struct radeon_device *rdev); |
| 229 | extern int rs600_resume(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 230 | int rs600_irq_set(struct radeon_device *rdev); |
Michel Dänzer | 7ed220d | 2009-08-13 11:10:51 +0200 | [diff] [blame] | 231 | int rs600_irq_process(struct radeon_device *rdev); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 232 | void rs600_irq_disable(struct radeon_device *rdev); |
Michel Dänzer | 7ed220d | 2009-08-13 11:10:51 +0200 | [diff] [blame] | 233 | u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 234 | void rs600_gart_tlb_flush(struct radeon_device *rdev); |
Christian König | 7f90fc9 | 2014-06-04 15:29:57 +0200 | [diff] [blame] | 235 | void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, |
Michel Dänzer | 77497f2 | 2014-07-17 19:01:07 +0900 | [diff] [blame] | 236 | uint64_t addr, uint32_t flags); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 237 | uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 238 | void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Jerome Glisse | c93bb85 | 2009-07-13 21:04:08 +0200 | [diff] [blame] | 239 | void rs600_bandwidth_update(struct radeon_device *rdev); |
Alex Deucher | 429770b | 2009-12-04 15:26:55 -0500 | [diff] [blame] | 240 | void rs600_hpd_init(struct radeon_device *rdev); |
| 241 | void rs600_hpd_fini(struct radeon_device *rdev); |
| 242 | bool rs600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 243 | void rs600_hpd_set_polarity(struct radeon_device *rdev, |
| 244 | enum radeon_hpd_id hpd); |
Alex Deucher | 49e02b7 | 2010-04-23 17:57:27 -0400 | [diff] [blame] | 245 | extern void rs600_pm_misc(struct radeon_device *rdev); |
| 246 | extern void rs600_pm_prepare(struct radeon_device *rdev); |
| 247 | extern void rs600_pm_finish(struct radeon_device *rdev); |
Christian König | 157fa14 | 2014-05-27 16:49:20 +0200 | [diff] [blame] | 248 | extern void rs600_page_flip(struct radeon_device *rdev, int crtc, |
| 249 | u64 crtc_base); |
| 250 | extern bool rs600_page_flip_pending(struct radeon_device *rdev, int crtc); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 251 | void rs600_set_safe_registers(struct radeon_device *rdev); |
Alex Deucher | 3ae19b7 | 2012-02-23 17:53:37 -0500 | [diff] [blame] | 252 | extern void avivo_wait_for_vblank(struct radeon_device *rdev, int crtc); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 253 | extern int rs600_mc_wait_for_idle(struct radeon_device *rdev); |
Alex Deucher | 429770b | 2009-12-04 15:26:55 -0500 | [diff] [blame] | 254 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 255 | /* |
| 256 | * rs690,rs740 |
| 257 | */ |
Jerome Glisse | 3bc6853 | 2009-10-01 09:39:24 +0200 | [diff] [blame] | 258 | int rs690_init(struct radeon_device *rdev); |
| 259 | void rs690_fini(struct radeon_device *rdev); |
| 260 | int rs690_resume(struct radeon_device *rdev); |
| 261 | int rs690_suspend(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 262 | uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 263 | void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Jerome Glisse | c93bb85 | 2009-07-13 21:04:08 +0200 | [diff] [blame] | 264 | void rs690_bandwidth_update(struct radeon_device *rdev); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 265 | void rs690_line_buffer_adjust(struct radeon_device *rdev, |
| 266 | struct drm_display_mode *mode1, |
| 267 | struct drm_display_mode *mode2); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 268 | extern int rs690_mc_wait_for_idle(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 269 | |
| 270 | /* |
| 271 | * rv515 |
| 272 | */ |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 273 | struct rv515_mc_save { |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 274 | u32 vga_render_control; |
| 275 | u32 vga_hdp_control; |
Alex Deucher | 6253e4c | 2012-12-12 14:30:32 -0500 | [diff] [blame] | 276 | bool crtc_enabled[2]; |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 277 | }; |
Jerome Glisse | 81ee8fb | 2012-07-27 16:32:24 -0400 | [diff] [blame] | 278 | |
Jerome Glisse | 068a117 | 2009-06-17 13:28:30 +0200 | [diff] [blame] | 279 | int rv515_init(struct radeon_device *rdev); |
Jerome Glisse | d39c3b8 | 2009-09-28 18:34:43 +0200 | [diff] [blame] | 280 | void rv515_fini(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 281 | uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 282 | void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Alex Deucher | f712812 | 2012-02-23 17:53:45 -0500 | [diff] [blame] | 283 | void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); |
Jerome Glisse | c93bb85 | 2009-07-13 21:04:08 +0200 | [diff] [blame] | 284 | void rv515_bandwidth_update(struct radeon_device *rdev); |
Jerome Glisse | d39c3b8 | 2009-09-28 18:34:43 +0200 | [diff] [blame] | 285 | int rv515_resume(struct radeon_device *rdev); |
| 286 | int rv515_suspend(struct radeon_device *rdev); |
Daniel Vetter | 187f3da | 2010-11-28 19:06:09 +0100 | [diff] [blame] | 287 | void rv515_bandwidth_avivo_update(struct radeon_device *rdev); |
| 288 | void rv515_vga_render_disable(struct radeon_device *rdev); |
| 289 | void rv515_set_safe_registers(struct radeon_device *rdev); |
| 290 | void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save); |
| 291 | void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save); |
| 292 | void rv515_clock_startup(struct radeon_device *rdev); |
| 293 | void rv515_debugfs(struct radeon_device *rdev); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 294 | int rv515_mc_wait_for_idle(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 295 | |
| 296 | /* |
| 297 | * r520,rv530,rv560,rv570,r580 |
| 298 | */ |
Jerome Glisse | d39c3b8 | 2009-09-28 18:34:43 +0200 | [diff] [blame] | 299 | int r520_init(struct radeon_device *rdev); |
Jerome Glisse | f0ed1f6 | 2009-09-28 20:39:19 +0200 | [diff] [blame] | 300 | int r520_resume(struct radeon_device *rdev); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 301 | int r520_mc_wait_for_idle(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 302 | |
| 303 | /* |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 304 | * r600,rv610,rv630,rv620,rv635,rv670,rs780,rs880 |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 305 | */ |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 306 | int r600_init(struct radeon_device *rdev); |
| 307 | void r600_fini(struct radeon_device *rdev); |
| 308 | int r600_suspend(struct radeon_device *rdev); |
| 309 | int r600_resume(struct radeon_device *rdev); |
Dave Airlie | 28d5204 | 2009-09-21 14:33:58 +1000 | [diff] [blame] | 310 | void r600_vga_set_state(struct radeon_device *rdev, bool state); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 311 | int r600_wb_init(struct radeon_device *rdev); |
| 312 | void r600_wb_fini(struct radeon_device *rdev); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 313 | void r600_pcie_gart_tlb_flush(struct radeon_device *rdev); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 314 | uint32_t r600_pciep_rreg(struct radeon_device *rdev, uint32_t reg); |
| 315 | void r600_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 316 | int r600_cs_parse(struct radeon_cs_parser *p); |
Alex Deucher | cf4ccd0 | 2011-11-18 10:19:47 -0500 | [diff] [blame] | 317 | int r600_dma_cs_parse(struct radeon_cs_parser *p); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 318 | void r600_fence_ring_emit(struct radeon_device *rdev, |
| 319 | struct radeon_fence *fence); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 320 | bool r600_semaphore_ring_emit(struct radeon_device *rdev, |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 321 | struct radeon_ring *cp, |
Christian König | 15d3332 | 2011-09-15 19:02:22 +0200 | [diff] [blame] | 322 | struct radeon_semaphore *semaphore, |
Christian König | 7b1f248 | 2011-09-23 15:11:23 +0200 | [diff] [blame] | 323 | bool emit_wait); |
Alex Deucher | 4d75658 | 2012-09-27 15:08:35 -0400 | [diff] [blame] | 324 | void r600_dma_fence_ring_emit(struct radeon_device *rdev, |
| 325 | struct radeon_fence *fence); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 326 | bool r600_dma_semaphore_ring_emit(struct radeon_device *rdev, |
Alex Deucher | 4d75658 | 2012-09-27 15:08:35 -0400 | [diff] [blame] | 327 | struct radeon_ring *ring, |
| 328 | struct radeon_semaphore *semaphore, |
| 329 | bool emit_wait); |
| 330 | void r600_dma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 331 | bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
Alex Deucher | 123bc18 | 2013-01-24 11:37:19 -0500 | [diff] [blame] | 332 | bool r600_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
Jerome Glisse | a2d07b7 | 2010-03-09 14:45:11 +0000 | [diff] [blame] | 333 | int r600_asic_reset(struct radeon_device *rdev); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 334 | int r600_set_surface_reg(struct radeon_device *rdev, int reg, |
| 335 | uint32_t tiling_flags, uint32_t pitch, |
| 336 | uint32_t offset, uint32_t obj_size); |
Daniel Vetter | 9479c54 | 2010-03-11 21:19:16 +0000 | [diff] [blame] | 337 | void r600_clear_surface_reg(struct radeon_device *rdev, int reg); |
Alex Deucher | f712812 | 2012-02-23 17:53:45 -0500 | [diff] [blame] | 338 | int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
Alex Deucher | 4d75658 | 2012-09-27 15:08:35 -0400 | [diff] [blame] | 339 | int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 340 | void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 341 | int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
Alex Deucher | 4d75658 | 2012-09-27 15:08:35 -0400 | [diff] [blame] | 342 | int r600_dma_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 343 | struct radeon_fence *r600_copy_cpdma(struct radeon_device *rdev, |
| 344 | uint64_t src_offset, uint64_t dst_offset, |
| 345 | unsigned num_gpu_pages, |
| 346 | struct reservation_object *resv); |
| 347 | struct radeon_fence *r600_copy_dma(struct radeon_device *rdev, |
| 348 | uint64_t src_offset, uint64_t dst_offset, |
| 349 | unsigned num_gpu_pages, |
| 350 | struct reservation_object *resv); |
Alex Deucher | 429770b | 2009-12-04 15:26:55 -0500 | [diff] [blame] | 351 | void r600_hpd_init(struct radeon_device *rdev); |
| 352 | void r600_hpd_fini(struct radeon_device *rdev); |
| 353 | bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 354 | void r600_hpd_set_polarity(struct radeon_device *rdev, |
| 355 | enum radeon_hpd_id hpd); |
Michel Dänzer | 124764f | 2014-07-31 18:43:48 +0900 | [diff] [blame] | 356 | extern void r600_mmio_hdp_flush(struct radeon_device *rdev); |
Alex Deucher | def9ba9 | 2010-04-22 12:39:58 -0400 | [diff] [blame] | 357 | extern bool r600_gui_idle(struct radeon_device *rdev); |
Alex Deucher | 49e02b7 | 2010-04-23 17:57:27 -0400 | [diff] [blame] | 358 | extern void r600_pm_misc(struct radeon_device *rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 359 | extern void r600_pm_init_profile(struct radeon_device *rdev); |
| 360 | extern void rs780_pm_init_profile(struct radeon_device *rdev); |
Samuel Li | 65337e6 | 2013-04-05 17:50:53 -0400 | [diff] [blame] | 361 | extern uint32_t rs780_mc_rreg(struct radeon_device *rdev, uint32_t reg); |
| 362 | extern void rs780_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 363 | extern void r600_pm_get_dynpm_state(struct radeon_device *rdev); |
Alex Deucher | 3313e3d | 2011-01-06 18:49:34 -0500 | [diff] [blame] | 364 | extern void r600_set_pcie_lanes(struct radeon_device *rdev, int lanes); |
| 365 | extern int r600_get_pcie_lanes(struct radeon_device *rdev); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 366 | bool r600_card_posted(struct radeon_device *rdev); |
| 367 | void r600_cp_stop(struct radeon_device *rdev); |
| 368 | int r600_cp_start(struct radeon_device *rdev); |
Christian König | e32eb50 | 2011-10-23 12:56:27 +0200 | [diff] [blame] | 369 | void r600_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 370 | int r600_cp_resume(struct radeon_device *rdev); |
| 371 | void r600_cp_fini(struct radeon_device *rdev); |
| 372 | int r600_count_pipe_bits(uint32_t val); |
| 373 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
| 374 | int r600_pcie_gart_init(struct radeon_device *rdev); |
| 375 | void r600_scratch_init(struct radeon_device *rdev); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 376 | int r600_init_microcode(struct radeon_device *rdev); |
Alex Deucher | ea31bf6 | 2013-12-09 19:44:30 -0500 | [diff] [blame] | 377 | u32 r600_gfx_get_rptr(struct radeon_device *rdev, |
| 378 | struct radeon_ring *ring); |
| 379 | u32 r600_gfx_get_wptr(struct radeon_device *rdev, |
| 380 | struct radeon_ring *ring); |
| 381 | void r600_gfx_set_wptr(struct radeon_device *rdev, |
| 382 | struct radeon_ring *ring); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 383 | /* r600 irq */ |
| 384 | int r600_irq_process(struct radeon_device *rdev); |
| 385 | int r600_irq_init(struct radeon_device *rdev); |
| 386 | void r600_irq_fini(struct radeon_device *rdev); |
| 387 | void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); |
| 388 | int r600_irq_set(struct radeon_device *rdev); |
| 389 | void r600_irq_suspend(struct radeon_device *rdev); |
| 390 | void r600_disable_interrupts(struct radeon_device *rdev); |
| 391 | void r600_rlc_stop(struct radeon_device *rdev); |
| 392 | /* r600 audio */ |
| 393 | int r600_audio_init(struct radeon_device *rdev); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 394 | void r600_audio_fini(struct radeon_device *rdev); |
Rafał Miłecki | 8f33a15 | 2014-05-16 11:36:24 +0200 | [diff] [blame] | 395 | void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock); |
| 396 | void r600_hdmi_update_avi_infoframe(struct drm_encoder *encoder, void *buffer, |
| 397 | size_t size); |
| 398 | void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock); |
| 399 | void r600_hdmi_audio_workaround(struct drm_encoder *encoder); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 400 | int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder); |
| 401 | void r600_hdmi_update_audio_settings(struct drm_encoder *encoder); |
Alex Deucher | a973bea | 2013-04-18 11:32:16 -0400 | [diff] [blame] | 402 | void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); |
| 403 | void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 404 | int r600_mc_wait_for_idle(struct radeon_device *rdev); |
Alex Deucher | 454d2e2 | 2013-02-14 10:04:02 -0500 | [diff] [blame] | 405 | u32 r600_get_xclk(struct radeon_device *rdev); |
Alex Deucher | d041889 | 2013-01-24 10:35:23 -0500 | [diff] [blame] | 406 | uint64_t r600_get_gpu_clock_counter(struct radeon_device *rdev); |
Alex Deucher | 6bd1c38 | 2013-06-21 14:38:03 -0400 | [diff] [blame] | 407 | int rv6xx_get_temp(struct radeon_device *rdev); |
Alex Deucher | 1b9ba70 | 2013-09-05 09:52:37 -0400 | [diff] [blame] | 408 | int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Alex Deucher | 9824391 | 2013-01-16 13:13:42 -0500 | [diff] [blame] | 409 | int r600_dpm_pre_set_power_state(struct radeon_device *rdev); |
| 410 | void r600_dpm_post_set_power_state(struct radeon_device *rdev); |
Alex Deucher | a4643ba | 2013-12-19 12:18:13 -0500 | [diff] [blame] | 411 | int r600_dpm_late_enable(struct radeon_device *rdev); |
Christian König | 2e1e6da | 2013-08-13 11:56:52 +0200 | [diff] [blame] | 412 | /* r600 dma */ |
| 413 | uint32_t r600_dma_get_rptr(struct radeon_device *rdev, |
| 414 | struct radeon_ring *ring); |
| 415 | uint32_t r600_dma_get_wptr(struct radeon_device *rdev, |
| 416 | struct radeon_ring *ring); |
| 417 | void r600_dma_set_wptr(struct radeon_device *rdev, |
| 418 | struct radeon_ring *ring); |
Alex Deucher | 4a6369e | 2013-04-12 14:04:10 -0400 | [diff] [blame] | 419 | /* rv6xx dpm */ |
| 420 | int rv6xx_dpm_init(struct radeon_device *rdev); |
| 421 | int rv6xx_dpm_enable(struct radeon_device *rdev); |
| 422 | void rv6xx_dpm_disable(struct radeon_device *rdev); |
| 423 | int rv6xx_dpm_set_power_state(struct radeon_device *rdev); |
| 424 | void rv6xx_setup_asic(struct radeon_device *rdev); |
| 425 | void rv6xx_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 426 | void rv6xx_dpm_fini(struct radeon_device *rdev); |
| 427 | u32 rv6xx_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 428 | u32 rv6xx_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 429 | void rv6xx_dpm_print_power_state(struct radeon_device *rdev, |
| 430 | struct radeon_ps *ps); |
Alex Deucher | 242916a | 2013-06-28 14:20:53 -0400 | [diff] [blame] | 431 | void rv6xx_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 432 | struct seq_file *m); |
Alex Deucher | f4f85a8 | 2013-07-25 20:07:25 -0400 | [diff] [blame] | 433 | int rv6xx_dpm_force_performance_level(struct radeon_device *rdev, |
| 434 | enum radeon_dpm_forced_level level); |
Alex Deucher | 9d67006 | 2013-04-12 13:59:22 -0400 | [diff] [blame] | 435 | /* rs780 dpm */ |
| 436 | int rs780_dpm_init(struct radeon_device *rdev); |
| 437 | int rs780_dpm_enable(struct radeon_device *rdev); |
| 438 | void rs780_dpm_disable(struct radeon_device *rdev); |
| 439 | int rs780_dpm_set_power_state(struct radeon_device *rdev); |
| 440 | void rs780_dpm_setup_asic(struct radeon_device *rdev); |
| 441 | void rs780_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 442 | void rs780_dpm_fini(struct radeon_device *rdev); |
| 443 | u32 rs780_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 444 | u32 rs780_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 445 | void rs780_dpm_print_power_state(struct radeon_device *rdev, |
| 446 | struct radeon_ps *ps); |
Alex Deucher | 444bddc | 2013-07-02 13:05:23 -0400 | [diff] [blame] | 447 | void rs780_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 448 | struct seq_file *m); |
Anthoine Bourgeois | 63580c3 | 2013-09-03 13:52:19 -0400 | [diff] [blame] | 449 | int rs780_dpm_force_performance_level(struct radeon_device *rdev, |
| 450 | enum radeon_dpm_forced_level level); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 451 | |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 452 | /* |
| 453 | * rv770,rv730,rv710,rv740 |
| 454 | */ |
| 455 | int rv770_init(struct radeon_device *rdev); |
| 456 | void rv770_fini(struct radeon_device *rdev); |
| 457 | int rv770_suspend(struct radeon_device *rdev); |
| 458 | int rv770_resume(struct radeon_device *rdev); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 459 | void rv770_pm_misc(struct radeon_device *rdev); |
Christian König | 157fa14 | 2014-05-27 16:49:20 +0200 | [diff] [blame] | 460 | void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
| 461 | bool rv770_page_flip_pending(struct radeon_device *rdev, int crtc); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 462 | void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); |
| 463 | void r700_cp_stop(struct radeon_device *rdev); |
| 464 | void r700_cp_fini(struct radeon_device *rdev); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 465 | struct radeon_fence *rv770_copy_dma(struct radeon_device *rdev, |
| 466 | uint64_t src_offset, uint64_t dst_offset, |
| 467 | unsigned num_gpu_pages, |
| 468 | struct reservation_object *resv); |
Alex Deucher | 454d2e2 | 2013-02-14 10:04:02 -0500 | [diff] [blame] | 469 | u32 rv770_get_xclk(struct radeon_device *rdev); |
Christian König | ef0e6e6 | 2013-04-08 12:41:35 +0200 | [diff] [blame] | 470 | int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Alex Deucher | 6bd1c38 | 2013-06-21 14:38:03 -0400 | [diff] [blame] | 471 | int rv770_get_temp(struct radeon_device *rdev); |
Rafał Miłecki | 8f33a15 | 2014-05-16 11:36:24 +0200 | [diff] [blame] | 472 | /* hdmi */ |
| 473 | void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
Alex Deucher | 66229b2 | 2013-06-26 00:11:19 -0400 | [diff] [blame] | 474 | /* rv7xx pm */ |
| 475 | int rv770_dpm_init(struct radeon_device *rdev); |
| 476 | int rv770_dpm_enable(struct radeon_device *rdev); |
Alex Deucher | a3f1124 | 2013-12-19 13:48:36 -0500 | [diff] [blame] | 477 | int rv770_dpm_late_enable(struct radeon_device *rdev); |
Alex Deucher | 66229b2 | 2013-06-26 00:11:19 -0400 | [diff] [blame] | 478 | void rv770_dpm_disable(struct radeon_device *rdev); |
| 479 | int rv770_dpm_set_power_state(struct radeon_device *rdev); |
| 480 | void rv770_dpm_setup_asic(struct radeon_device *rdev); |
| 481 | void rv770_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 482 | void rv770_dpm_fini(struct radeon_device *rdev); |
| 483 | u32 rv770_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 484 | u32 rv770_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 485 | void rv770_dpm_print_power_state(struct radeon_device *rdev, |
| 486 | struct radeon_ps *ps); |
Alex Deucher | bd210d1 | 2013-06-28 10:06:26 -0400 | [diff] [blame] | 487 | void rv770_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 488 | struct seq_file *m); |
Alex Deucher | 8b5e6b7 | 2013-07-02 18:40:35 -0400 | [diff] [blame] | 489 | int rv770_dpm_force_performance_level(struct radeon_device *rdev, |
| 490 | enum radeon_dpm_forced_level level); |
Alex Deucher | b06195d | 2013-07-08 11:49:48 -0400 | [diff] [blame] | 491 | bool rv770_dpm_vblank_too_short(struct radeon_device *rdev); |
Jerome Glisse | 3ce0a23 | 2009-09-08 10:10:24 +1000 | [diff] [blame] | 492 | |
Alex Deucher | bcc1c2a | 2010-01-12 17:54:34 -0500 | [diff] [blame] | 493 | /* |
| 494 | * evergreen |
| 495 | */ |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 496 | struct evergreen_mc_save { |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 497 | u32 vga_render_control; |
| 498 | u32 vga_hdp_control; |
Alex Deucher | 62444b7 | 2012-08-15 17:18:42 -0400 | [diff] [blame] | 499 | bool crtc_enabled[RADEON_MAX_CRTCS]; |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 500 | }; |
Jerome Glisse | 81ee8fb | 2012-07-27 16:32:24 -0400 | [diff] [blame] | 501 | |
Alex Deucher | 0fcdb61 | 2010-03-24 13:20:41 -0400 | [diff] [blame] | 502 | void evergreen_pcie_gart_tlb_flush(struct radeon_device *rdev); |
Alex Deucher | bcc1c2a | 2010-01-12 17:54:34 -0500 | [diff] [blame] | 503 | int evergreen_init(struct radeon_device *rdev); |
| 504 | void evergreen_fini(struct radeon_device *rdev); |
| 505 | int evergreen_suspend(struct radeon_device *rdev); |
| 506 | int evergreen_resume(struct radeon_device *rdev); |
Alex Deucher | 123bc18 | 2013-01-24 11:37:19 -0500 | [diff] [blame] | 507 | bool evergreen_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
| 508 | bool evergreen_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
Jerome Glisse | a2d07b7 | 2010-03-09 14:45:11 +0000 | [diff] [blame] | 509 | int evergreen_asic_reset(struct radeon_device *rdev); |
Alex Deucher | bcc1c2a | 2010-01-12 17:54:34 -0500 | [diff] [blame] | 510 | void evergreen_bandwidth_update(struct radeon_device *rdev); |
Alex Deucher | 1292059 | 2011-02-02 12:37:40 -0500 | [diff] [blame] | 511 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
Alex Deucher | bcc1c2a | 2010-01-12 17:54:34 -0500 | [diff] [blame] | 512 | void evergreen_hpd_init(struct radeon_device *rdev); |
| 513 | void evergreen_hpd_fini(struct radeon_device *rdev); |
| 514 | bool evergreen_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); |
| 515 | void evergreen_hpd_set_polarity(struct radeon_device *rdev, |
| 516 | enum radeon_hpd_id hpd); |
Alex Deucher | 45f9a39 | 2010-03-24 13:55:51 -0400 | [diff] [blame] | 517 | u32 evergreen_get_vblank_counter(struct radeon_device *rdev, int crtc); |
| 518 | int evergreen_irq_set(struct radeon_device *rdev); |
| 519 | int evergreen_irq_process(struct radeon_device *rdev); |
Alex Deucher | cb5fcbd | 2010-05-28 19:01:35 -0400 | [diff] [blame] | 520 | extern int evergreen_cs_parse(struct radeon_cs_parser *p); |
Alex Deucher | d2ead3e | 2012-12-13 09:55:45 -0500 | [diff] [blame] | 521 | extern int evergreen_dma_cs_parse(struct radeon_cs_parser *p); |
Alex Deucher | 49e02b7 | 2010-04-23 17:57:27 -0400 | [diff] [blame] | 522 | extern void evergreen_pm_misc(struct radeon_device *rdev); |
| 523 | extern void evergreen_pm_prepare(struct radeon_device *rdev); |
| 524 | extern void evergreen_pm_finish(struct radeon_device *rdev); |
Alex Deucher | a4c9e2e | 2011-11-04 10:09:41 -0400 | [diff] [blame] | 525 | extern void sumo_pm_init_profile(struct radeon_device *rdev); |
Alex Deucher | 27810fb | 2012-10-01 19:25:11 -0400 | [diff] [blame] | 526 | extern void btc_pm_init_profile(struct radeon_device *rdev); |
Alex Deucher | 23d33ba | 2013-04-08 12:41:32 +0200 | [diff] [blame] | 527 | int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Alex Deucher | a8b4925 | 2013-04-08 12:41:33 +0200 | [diff] [blame] | 528 | int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Christian König | 157fa14 | 2014-05-27 16:49:20 +0200 | [diff] [blame] | 529 | extern void evergreen_page_flip(struct radeon_device *rdev, int crtc, |
| 530 | u64 crtc_base); |
| 531 | extern bool evergreen_page_flip_pending(struct radeon_device *rdev, int crtc); |
Alex Deucher | 3ae19b7 | 2012-02-23 17:53:37 -0500 | [diff] [blame] | 532 | extern void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc); |
Daniel Vetter | 3574dda | 2011-02-18 17:59:19 +0100 | [diff] [blame] | 533 | void evergreen_disable_interrupt_state(struct radeon_device *rdev); |
Alex Deucher | 89e5181 | 2012-02-23 17:53:38 -0500 | [diff] [blame] | 534 | int evergreen_mc_wait_for_idle(struct radeon_device *rdev); |
Alex Deucher | 233d1ad | 2012-12-04 15:25:59 -0500 | [diff] [blame] | 535 | void evergreen_dma_fence_ring_emit(struct radeon_device *rdev, |
| 536 | struct radeon_fence *fence); |
| 537 | void evergreen_dma_ring_ib_execute(struct radeon_device *rdev, |
| 538 | struct radeon_ib *ib); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 539 | struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, |
| 540 | uint64_t src_offset, uint64_t dst_offset, |
| 541 | unsigned num_gpu_pages, |
| 542 | struct reservation_object *resv); |
Alex Deucher | a973bea | 2013-04-18 11:32:16 -0400 | [diff] [blame] | 543 | void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); |
| 544 | void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode); |
Alex Deucher | 6bd1c38 | 2013-06-21 14:38:03 -0400 | [diff] [blame] | 545 | int evergreen_get_temp(struct radeon_device *rdev); |
| 546 | int sumo_get_temp(struct radeon_device *rdev); |
Alex Deucher | 29a1522 | 2012-12-14 11:57:36 -0500 | [diff] [blame] | 547 | int tn_get_temp(struct radeon_device *rdev); |
Alex Deucher | dc50ba7 | 2013-06-26 00:33:35 -0400 | [diff] [blame] | 548 | int cypress_dpm_init(struct radeon_device *rdev); |
| 549 | void cypress_dpm_setup_asic(struct radeon_device *rdev); |
| 550 | int cypress_dpm_enable(struct radeon_device *rdev); |
| 551 | void cypress_dpm_disable(struct radeon_device *rdev); |
| 552 | int cypress_dpm_set_power_state(struct radeon_device *rdev); |
| 553 | void cypress_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 554 | void cypress_dpm_fini(struct radeon_device *rdev); |
Alex Deucher | d0b54bd | 2013-07-08 11:56:09 -0400 | [diff] [blame] | 555 | bool cypress_dpm_vblank_too_short(struct radeon_device *rdev); |
Alex Deucher | 6596afd | 2013-06-26 00:15:24 -0400 | [diff] [blame] | 556 | int btc_dpm_init(struct radeon_device *rdev); |
| 557 | void btc_dpm_setup_asic(struct radeon_device *rdev); |
| 558 | int btc_dpm_enable(struct radeon_device *rdev); |
| 559 | void btc_dpm_disable(struct radeon_device *rdev); |
Alex Deucher | e8a9539 | 2013-01-16 14:17:23 -0500 | [diff] [blame] | 560 | int btc_dpm_pre_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 6596afd | 2013-06-26 00:15:24 -0400 | [diff] [blame] | 561 | int btc_dpm_set_power_state(struct radeon_device *rdev); |
Alex Deucher | e8a9539 | 2013-01-16 14:17:23 -0500 | [diff] [blame] | 562 | void btc_dpm_post_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 6596afd | 2013-06-26 00:15:24 -0400 | [diff] [blame] | 563 | void btc_dpm_fini(struct radeon_device *rdev); |
Alex Deucher | e8a9539 | 2013-01-16 14:17:23 -0500 | [diff] [blame] | 564 | u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 565 | u32 btc_dpm_get_mclk(struct radeon_device *rdev, bool low); |
Alex Deucher | a84301c | 2013-07-08 12:03:55 -0400 | [diff] [blame] | 566 | bool btc_dpm_vblank_too_short(struct radeon_device *rdev); |
Alex Deucher | 9f3f63f | 2014-01-30 11:19:22 -0500 | [diff] [blame] | 567 | void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 568 | struct seq_file *m); |
Alex Deucher | 80ea2c1 | 2013-04-12 14:56:21 -0400 | [diff] [blame] | 569 | int sumo_dpm_init(struct radeon_device *rdev); |
| 570 | int sumo_dpm_enable(struct radeon_device *rdev); |
Alex Deucher | 14ec9fa | 2013-12-19 11:56:52 -0500 | [diff] [blame] | 571 | int sumo_dpm_late_enable(struct radeon_device *rdev); |
Alex Deucher | 80ea2c1 | 2013-04-12 14:56:21 -0400 | [diff] [blame] | 572 | void sumo_dpm_disable(struct radeon_device *rdev); |
Alex Deucher | 422a56b | 2013-06-25 15:40:21 -0400 | [diff] [blame] | 573 | int sumo_dpm_pre_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 80ea2c1 | 2013-04-12 14:56:21 -0400 | [diff] [blame] | 574 | int sumo_dpm_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 422a56b | 2013-06-25 15:40:21 -0400 | [diff] [blame] | 575 | void sumo_dpm_post_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 80ea2c1 | 2013-04-12 14:56:21 -0400 | [diff] [blame] | 576 | void sumo_dpm_setup_asic(struct radeon_device *rdev); |
| 577 | void sumo_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 578 | void sumo_dpm_fini(struct radeon_device *rdev); |
| 579 | u32 sumo_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 580 | u32 sumo_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 581 | void sumo_dpm_print_power_state(struct radeon_device *rdev, |
| 582 | struct radeon_ps *ps); |
Alex Deucher | fb70160 | 2013-06-28 10:47:56 -0400 | [diff] [blame] | 583 | void sumo_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 584 | struct seq_file *m); |
Alex Deucher | 5d5e559 | 2013-07-02 18:50:09 -0400 | [diff] [blame] | 585 | int sumo_dpm_force_performance_level(struct radeon_device *rdev, |
| 586 | enum radeon_dpm_forced_level level); |
Daniel Vetter | 4546b2c | 2011-02-18 17:59:21 +0100 | [diff] [blame] | 587 | |
Alex Deucher | e348762 | 2011-03-02 20:07:36 -0500 | [diff] [blame] | 588 | /* |
| 589 | * cayman |
| 590 | */ |
Alex Deucher | b40e7e1 | 2011-11-17 14:57:50 -0500 | [diff] [blame] | 591 | void cayman_fence_ring_emit(struct radeon_device *rdev, |
| 592 | struct radeon_fence *fence); |
Alex Deucher | e348762 | 2011-03-02 20:07:36 -0500 | [diff] [blame] | 593 | void cayman_pcie_gart_tlb_flush(struct radeon_device *rdev); |
| 594 | int cayman_init(struct radeon_device *rdev); |
| 595 | void cayman_fini(struct radeon_device *rdev); |
| 596 | int cayman_suspend(struct radeon_device *rdev); |
| 597 | int cayman_resume(struct radeon_device *rdev); |
Alex Deucher | e348762 | 2011-03-02 20:07:36 -0500 | [diff] [blame] | 598 | int cayman_asic_reset(struct radeon_device *rdev); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 599 | void cayman_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 600 | int cayman_vm_init(struct radeon_device *rdev); |
| 601 | void cayman_vm_fini(struct radeon_device *rdev); |
Christian König | faffaf6 | 2014-11-19 14:01:19 +0100 | [diff] [blame] | 602 | void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
| 603 | unsigned vm_id, uint64_t pd_addr); |
Christian König | 089a786 | 2012-08-11 11:54:05 +0200 | [diff] [blame] | 604 | uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 605 | int evergreen_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
Alex Deucher | cd459e5 | 2012-12-13 12:17:38 -0500 | [diff] [blame] | 606 | int evergreen_dma_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
Alex Deucher | f60cbd1 | 2012-12-04 15:27:33 -0500 | [diff] [blame] | 607 | void cayman_dma_ring_ib_execute(struct radeon_device *rdev, |
| 608 | struct radeon_ib *ib); |
Alex Deucher | 123bc18 | 2013-01-24 11:37:19 -0500 | [diff] [blame] | 609 | bool cayman_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
Alex Deucher | f60cbd1 | 2012-12-04 15:27:33 -0500 | [diff] [blame] | 610 | bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
Christian König | 03f62ab | 2014-07-30 21:05:17 +0200 | [diff] [blame] | 611 | |
| 612 | void cayman_dma_vm_copy_pages(struct radeon_device *rdev, |
| 613 | struct radeon_ib *ib, |
| 614 | uint64_t pe, uint64_t src, |
| 615 | unsigned count); |
| 616 | void cayman_dma_vm_write_pages(struct radeon_device *rdev, |
| 617 | struct radeon_ib *ib, |
| 618 | uint64_t pe, |
| 619 | uint64_t addr, unsigned count, |
| 620 | uint32_t incr, uint32_t flags); |
| 621 | void cayman_dma_vm_set_pages(struct radeon_device *rdev, |
| 622 | struct radeon_ib *ib, |
| 623 | uint64_t pe, |
| 624 | uint64_t addr, unsigned count, |
| 625 | uint32_t incr, uint32_t flags); |
| 626 | void cayman_dma_vm_pad_ib(struct radeon_ib *ib); |
Christian König | 24c1643 | 2013-10-30 11:51:09 -0400 | [diff] [blame] | 627 | |
Christian König | faffaf6 | 2014-11-19 14:01:19 +0100 | [diff] [blame] | 628 | void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
| 629 | unsigned vm_id, uint64_t pd_addr); |
Alex Deucher | 45f9a39 | 2010-03-24 13:55:51 -0400 | [diff] [blame] | 630 | |
Alex Deucher | ea31bf6 | 2013-12-09 19:44:30 -0500 | [diff] [blame] | 631 | u32 cayman_gfx_get_rptr(struct radeon_device *rdev, |
| 632 | struct radeon_ring *ring); |
| 633 | u32 cayman_gfx_get_wptr(struct radeon_device *rdev, |
| 634 | struct radeon_ring *ring); |
| 635 | void cayman_gfx_set_wptr(struct radeon_device *rdev, |
| 636 | struct radeon_ring *ring); |
| 637 | uint32_t cayman_dma_get_rptr(struct radeon_device *rdev, |
| 638 | struct radeon_ring *ring); |
| 639 | uint32_t cayman_dma_get_wptr(struct radeon_device *rdev, |
| 640 | struct radeon_ring *ring); |
| 641 | void cayman_dma_set_wptr(struct radeon_device *rdev, |
| 642 | struct radeon_ring *ring); |
| 643 | |
Alex Deucher | 69e0b57 | 2013-04-12 16:42:42 -0400 | [diff] [blame] | 644 | int ni_dpm_init(struct radeon_device *rdev); |
| 645 | void ni_dpm_setup_asic(struct radeon_device *rdev); |
| 646 | int ni_dpm_enable(struct radeon_device *rdev); |
| 647 | void ni_dpm_disable(struct radeon_device *rdev); |
Alex Deucher | fee3d74 | 2013-01-16 14:35:39 -0500 | [diff] [blame] | 648 | int ni_dpm_pre_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 69e0b57 | 2013-04-12 16:42:42 -0400 | [diff] [blame] | 649 | int ni_dpm_set_power_state(struct radeon_device *rdev); |
Alex Deucher | fee3d74 | 2013-01-16 14:35:39 -0500 | [diff] [blame] | 650 | void ni_dpm_post_set_power_state(struct radeon_device *rdev); |
Alex Deucher | 69e0b57 | 2013-04-12 16:42:42 -0400 | [diff] [blame] | 651 | void ni_dpm_fini(struct radeon_device *rdev); |
| 652 | u32 ni_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 653 | u32 ni_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 654 | void ni_dpm_print_power_state(struct radeon_device *rdev, |
| 655 | struct radeon_ps *ps); |
Alex Deucher | bdf0c4f | 2013-06-28 17:49:02 -0400 | [diff] [blame] | 656 | void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 657 | struct seq_file *m); |
Alex Deucher | 170a47f | 2013-07-02 18:43:53 -0400 | [diff] [blame] | 658 | int ni_dpm_force_performance_level(struct radeon_device *rdev, |
| 659 | enum radeon_dpm_forced_level level); |
Alex Deucher | 76ad73e | 2013-07-08 12:09:41 -0400 | [diff] [blame] | 660 | bool ni_dpm_vblank_too_short(struct radeon_device *rdev); |
Alex Deucher | d70229f | 2013-04-12 16:40:41 -0400 | [diff] [blame] | 661 | int trinity_dpm_init(struct radeon_device *rdev); |
| 662 | int trinity_dpm_enable(struct radeon_device *rdev); |
Alex Deucher | bda44c1 | 2013-12-19 12:03:35 -0500 | [diff] [blame] | 663 | int trinity_dpm_late_enable(struct radeon_device *rdev); |
Alex Deucher | d70229f | 2013-04-12 16:40:41 -0400 | [diff] [blame] | 664 | void trinity_dpm_disable(struct radeon_device *rdev); |
Alex Deucher | a284c48 | 2013-01-16 13:53:40 -0500 | [diff] [blame] | 665 | int trinity_dpm_pre_set_power_state(struct radeon_device *rdev); |
Alex Deucher | d70229f | 2013-04-12 16:40:41 -0400 | [diff] [blame] | 666 | int trinity_dpm_set_power_state(struct radeon_device *rdev); |
Alex Deucher | a284c48 | 2013-01-16 13:53:40 -0500 | [diff] [blame] | 667 | void trinity_dpm_post_set_power_state(struct radeon_device *rdev); |
Alex Deucher | d70229f | 2013-04-12 16:40:41 -0400 | [diff] [blame] | 668 | void trinity_dpm_setup_asic(struct radeon_device *rdev); |
| 669 | void trinity_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 670 | void trinity_dpm_fini(struct radeon_device *rdev); |
| 671 | u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 672 | u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 673 | void trinity_dpm_print_power_state(struct radeon_device *rdev, |
| 674 | struct radeon_ps *ps); |
Alex Deucher | 490ab93 | 2013-06-28 12:01:38 -0400 | [diff] [blame] | 675 | void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 676 | struct seq_file *m); |
Alex Deucher | 9b5de59 | 2013-07-02 18:52:10 -0400 | [diff] [blame] | 677 | int trinity_dpm_force_performance_level(struct radeon_device *rdev, |
| 678 | enum radeon_dpm_forced_level level); |
Alex Deucher | 1187706 | 2013-09-09 19:19:52 -0400 | [diff] [blame] | 679 | void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
Alex Deucher | d70229f | 2013-04-12 16:40:41 -0400 | [diff] [blame] | 680 | |
Alex Deucher | 43b3cd9 | 2012-03-20 17:18:00 -0400 | [diff] [blame] | 681 | /* DCE6 - SI */ |
| 682 | void dce6_bandwidth_update(struct radeon_device *rdev); |
Alex Deucher | b530602 | 2013-07-31 16:51:33 -0400 | [diff] [blame] | 683 | int dce6_audio_init(struct radeon_device *rdev); |
| 684 | void dce6_audio_fini(struct radeon_device *rdev); |
Alex Deucher | 43b3cd9 | 2012-03-20 17:18:00 -0400 | [diff] [blame] | 685 | |
Alex Deucher | 02779c0 | 2012-03-20 17:18:25 -0400 | [diff] [blame] | 686 | /* |
| 687 | * si |
| 688 | */ |
| 689 | void si_fence_ring_emit(struct radeon_device *rdev, |
| 690 | struct radeon_fence *fence); |
| 691 | void si_pcie_gart_tlb_flush(struct radeon_device *rdev); |
| 692 | int si_init(struct radeon_device *rdev); |
| 693 | void si_fini(struct radeon_device *rdev); |
| 694 | int si_suspend(struct radeon_device *rdev); |
| 695 | int si_resume(struct radeon_device *rdev); |
Alex Deucher | 123bc18 | 2013-01-24 11:37:19 -0500 | [diff] [blame] | 696 | bool si_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
| 697 | bool si_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
Alex Deucher | 02779c0 | 2012-03-20 17:18:25 -0400 | [diff] [blame] | 698 | int si_asic_reset(struct radeon_device *rdev); |
| 699 | void si_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 700 | int si_irq_set(struct radeon_device *rdev); |
| 701 | int si_irq_process(struct radeon_device *rdev); |
| 702 | int si_vm_init(struct radeon_device *rdev); |
| 703 | void si_vm_fini(struct radeon_device *rdev); |
Christian König | faffaf6 | 2014-11-19 14:01:19 +0100 | [diff] [blame] | 704 | void si_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
| 705 | unsigned vm_id, uint64_t pd_addr); |
Alex Deucher | 02779c0 | 2012-03-20 17:18:25 -0400 | [diff] [blame] | 706 | int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 707 | struct radeon_fence *si_copy_dma(struct radeon_device *rdev, |
| 708 | uint64_t src_offset, uint64_t dst_offset, |
| 709 | unsigned num_gpu_pages, |
| 710 | struct reservation_object *resv); |
Christian König | 03f62ab | 2014-07-30 21:05:17 +0200 | [diff] [blame] | 711 | |
| 712 | void si_dma_vm_copy_pages(struct radeon_device *rdev, |
| 713 | struct radeon_ib *ib, |
| 714 | uint64_t pe, uint64_t src, |
| 715 | unsigned count); |
| 716 | void si_dma_vm_write_pages(struct radeon_device *rdev, |
| 717 | struct radeon_ib *ib, |
| 718 | uint64_t pe, |
| 719 | uint64_t addr, unsigned count, |
| 720 | uint32_t incr, uint32_t flags); |
| 721 | void si_dma_vm_set_pages(struct radeon_device *rdev, |
| 722 | struct radeon_ib *ib, |
| 723 | uint64_t pe, |
| 724 | uint64_t addr, unsigned count, |
| 725 | uint32_t incr, uint32_t flags); |
| 726 | |
Christian König | faffaf6 | 2014-11-19 14:01:19 +0100 | [diff] [blame] | 727 | void si_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
| 728 | unsigned vm_id, uint64_t pd_addr); |
Alex Deucher | 454d2e2 | 2013-02-14 10:04:02 -0500 | [diff] [blame] | 729 | u32 si_get_xclk(struct radeon_device *rdev); |
Alex Deucher | d041889 | 2013-01-24 10:35:23 -0500 | [diff] [blame] | 730 | uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); |
Christian König | 2539eb0 | 2013-04-08 12:41:34 +0200 | [diff] [blame] | 731 | int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Alex Deucher | 6bd1c38 | 2013-06-21 14:38:03 -0400 | [diff] [blame] | 732 | int si_get_temp(struct radeon_device *rdev); |
Alex Deucher | a9e6141 | 2013-06-25 17:56:16 -0400 | [diff] [blame] | 733 | int si_dpm_init(struct radeon_device *rdev); |
| 734 | void si_dpm_setup_asic(struct radeon_device *rdev); |
| 735 | int si_dpm_enable(struct radeon_device *rdev); |
Alex Deucher | 963c115 | 2013-12-19 13:54:35 -0500 | [diff] [blame] | 736 | int si_dpm_late_enable(struct radeon_device *rdev); |
Alex Deucher | a9e6141 | 2013-06-25 17:56:16 -0400 | [diff] [blame] | 737 | void si_dpm_disable(struct radeon_device *rdev); |
| 738 | int si_dpm_pre_set_power_state(struct radeon_device *rdev); |
| 739 | int si_dpm_set_power_state(struct radeon_device *rdev); |
| 740 | void si_dpm_post_set_power_state(struct radeon_device *rdev); |
| 741 | void si_dpm_fini(struct radeon_device *rdev); |
| 742 | void si_dpm_display_configuration_changed(struct radeon_device *rdev); |
Alex Deucher | 7982128 | 2013-06-28 18:02:19 -0400 | [diff] [blame] | 743 | void si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 744 | struct seq_file *m); |
Alex Deucher | a160a6a | 2013-07-02 18:46:28 -0400 | [diff] [blame] | 745 | int si_dpm_force_performance_level(struct radeon_device *rdev, |
| 746 | enum radeon_dpm_forced_level level); |
Alex Deucher | 02779c0 | 2012-03-20 17:18:25 -0400 | [diff] [blame] | 747 | |
Alex Deucher | 0672e27 | 2013-04-09 16:22:31 -0400 | [diff] [blame] | 748 | /* DCE8 - CIK */ |
| 749 | void dce8_bandwidth_update(struct radeon_device *rdev); |
| 750 | |
Alex Deucher | 44fa346 | 2012-12-18 22:17:00 -0500 | [diff] [blame] | 751 | /* |
| 752 | * cik |
| 753 | */ |
| 754 | uint64_t cik_get_gpu_clock_counter(struct radeon_device *rdev); |
Alex Deucher | 2c67912 | 2013-04-09 13:32:18 -0400 | [diff] [blame] | 755 | u32 cik_get_xclk(struct radeon_device *rdev); |
Alex Deucher | 6e2c3c0 | 2013-04-03 19:28:32 -0400 | [diff] [blame] | 756 | uint32_t cik_pciep_rreg(struct radeon_device *rdev, uint32_t reg); |
| 757 | void cik_pciep_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); |
Christian König | 87167bb | 2013-04-09 13:39:21 -0400 | [diff] [blame] | 758 | int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); |
Alex Deucher | 5ad6bf9 | 2013-08-22 17:09:06 -0400 | [diff] [blame] | 759 | int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); |
Alex Deucher | 0672e27 | 2013-04-09 16:22:31 -0400 | [diff] [blame] | 760 | void cik_sdma_fence_ring_emit(struct radeon_device *rdev, |
| 761 | struct radeon_fence *fence); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 762 | bool cik_sdma_semaphore_ring_emit(struct radeon_device *rdev, |
Alex Deucher | 0672e27 | 2013-04-09 16:22:31 -0400 | [diff] [blame] | 763 | struct radeon_ring *ring, |
| 764 | struct radeon_semaphore *semaphore, |
| 765 | bool emit_wait); |
| 766 | void cik_sdma_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame] | 767 | struct radeon_fence *cik_copy_dma(struct radeon_device *rdev, |
| 768 | uint64_t src_offset, uint64_t dst_offset, |
| 769 | unsigned num_gpu_pages, |
| 770 | struct reservation_object *resv); |
| 771 | struct radeon_fence *cik_copy_cpdma(struct radeon_device *rdev, |
| 772 | uint64_t src_offset, uint64_t dst_offset, |
| 773 | unsigned num_gpu_pages, |
| 774 | struct reservation_object *resv); |
Alex Deucher | 0672e27 | 2013-04-09 16:22:31 -0400 | [diff] [blame] | 775 | int cik_sdma_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
| 776 | int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
| 777 | bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring); |
| 778 | void cik_fence_gfx_ring_emit(struct radeon_device *rdev, |
| 779 | struct radeon_fence *fence); |
| 780 | void cik_fence_compute_ring_emit(struct radeon_device *rdev, |
| 781 | struct radeon_fence *fence); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 782 | bool cik_semaphore_ring_emit(struct radeon_device *rdev, |
Alex Deucher | 0672e27 | 2013-04-09 16:22:31 -0400 | [diff] [blame] | 783 | struct radeon_ring *cp, |
| 784 | struct radeon_semaphore *semaphore, |
| 785 | bool emit_wait); |
| 786 | void cik_pcie_gart_tlb_flush(struct radeon_device *rdev); |
| 787 | int cik_init(struct radeon_device *rdev); |
| 788 | void cik_fini(struct radeon_device *rdev); |
| 789 | int cik_suspend(struct radeon_device *rdev); |
| 790 | int cik_resume(struct radeon_device *rdev); |
| 791 | bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp); |
| 792 | int cik_asic_reset(struct radeon_device *rdev); |
| 793 | void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 794 | int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
| 795 | int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
| 796 | int cik_irq_set(struct radeon_device *rdev); |
| 797 | int cik_irq_process(struct radeon_device *rdev); |
| 798 | int cik_vm_init(struct radeon_device *rdev); |
| 799 | void cik_vm_fini(struct radeon_device *rdev); |
Christian König | faffaf6 | 2014-11-19 14:01:19 +0100 | [diff] [blame] | 800 | void cik_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
| 801 | unsigned vm_id, uint64_t pd_addr); |
Christian König | 03f62ab | 2014-07-30 21:05:17 +0200 | [diff] [blame] | 802 | |
| 803 | void cik_sdma_vm_copy_pages(struct radeon_device *rdev, |
| 804 | struct radeon_ib *ib, |
| 805 | uint64_t pe, uint64_t src, |
| 806 | unsigned count); |
| 807 | void cik_sdma_vm_write_pages(struct radeon_device *rdev, |
| 808 | struct radeon_ib *ib, |
| 809 | uint64_t pe, |
| 810 | uint64_t addr, unsigned count, |
| 811 | uint32_t incr, uint32_t flags); |
| 812 | void cik_sdma_vm_set_pages(struct radeon_device *rdev, |
| 813 | struct radeon_ib *ib, |
| 814 | uint64_t pe, |
| 815 | uint64_t addr, unsigned count, |
| 816 | uint32_t incr, uint32_t flags); |
| 817 | void cik_sdma_vm_pad_ib(struct radeon_ib *ib); |
| 818 | |
Christian König | faffaf6 | 2014-11-19 14:01:19 +0100 | [diff] [blame] | 819 | void cik_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, |
| 820 | unsigned vm_id, uint64_t pd_addr); |
Alex Deucher | 0672e27 | 2013-04-09 16:22:31 -0400 | [diff] [blame] | 821 | int cik_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib); |
Alex Deucher | ea31bf6 | 2013-12-09 19:44:30 -0500 | [diff] [blame] | 822 | u32 cik_gfx_get_rptr(struct radeon_device *rdev, |
| 823 | struct radeon_ring *ring); |
| 824 | u32 cik_gfx_get_wptr(struct radeon_device *rdev, |
| 825 | struct radeon_ring *ring); |
| 826 | void cik_gfx_set_wptr(struct radeon_device *rdev, |
| 827 | struct radeon_ring *ring); |
| 828 | u32 cik_compute_get_rptr(struct radeon_device *rdev, |
| 829 | struct radeon_ring *ring); |
| 830 | u32 cik_compute_get_wptr(struct radeon_device *rdev, |
| 831 | struct radeon_ring *ring); |
| 832 | void cik_compute_set_wptr(struct radeon_device *rdev, |
| 833 | struct radeon_ring *ring); |
| 834 | u32 cik_sdma_get_rptr(struct radeon_device *rdev, |
| 835 | struct radeon_ring *ring); |
| 836 | u32 cik_sdma_get_wptr(struct radeon_device *rdev, |
| 837 | struct radeon_ring *ring); |
| 838 | void cik_sdma_set_wptr(struct radeon_device *rdev, |
| 839 | struct radeon_ring *ring); |
Alex Deucher | 286d9cc | 2013-06-21 15:50:47 -0400 | [diff] [blame] | 840 | int ci_get_temp(struct radeon_device *rdev); |
| 841 | int kv_get_temp(struct radeon_device *rdev); |
Alex Deucher | 44fa346 | 2012-12-18 22:17:00 -0500 | [diff] [blame] | 842 | |
Alex Deucher | cc8dbbb | 2013-08-14 01:03:41 -0400 | [diff] [blame] | 843 | int ci_dpm_init(struct radeon_device *rdev); |
| 844 | int ci_dpm_enable(struct radeon_device *rdev); |
Alex Deucher | 9020842 | 2013-12-19 13:59:46 -0500 | [diff] [blame] | 845 | int ci_dpm_late_enable(struct radeon_device *rdev); |
Alex Deucher | cc8dbbb | 2013-08-14 01:03:41 -0400 | [diff] [blame] | 846 | void ci_dpm_disable(struct radeon_device *rdev); |
| 847 | int ci_dpm_pre_set_power_state(struct radeon_device *rdev); |
| 848 | int ci_dpm_set_power_state(struct radeon_device *rdev); |
| 849 | void ci_dpm_post_set_power_state(struct radeon_device *rdev); |
| 850 | void ci_dpm_setup_asic(struct radeon_device *rdev); |
| 851 | void ci_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 852 | void ci_dpm_fini(struct radeon_device *rdev); |
| 853 | u32 ci_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 854 | u32 ci_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 855 | void ci_dpm_print_power_state(struct radeon_device *rdev, |
| 856 | struct radeon_ps *ps); |
Alex Deucher | 94b4adc | 2013-07-15 17:34:33 -0400 | [diff] [blame] | 857 | void ci_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 858 | struct seq_file *m); |
Alex Deucher | 89536fd | 2013-07-15 18:14:24 -0400 | [diff] [blame] | 859 | int ci_dpm_force_performance_level(struct radeon_device *rdev, |
| 860 | enum radeon_dpm_forced_level level); |
Alex Deucher | 5496131 | 2013-07-15 18:24:31 -0400 | [diff] [blame] | 861 | bool ci_dpm_vblank_too_short(struct radeon_device *rdev); |
Alex Deucher | 942bdf7 | 2013-08-09 10:05:24 -0400 | [diff] [blame] | 862 | void ci_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
Alex Deucher | cc8dbbb | 2013-08-14 01:03:41 -0400 | [diff] [blame] | 863 | |
Alex Deucher | 41a524a | 2013-08-14 01:01:40 -0400 | [diff] [blame] | 864 | int kv_dpm_init(struct radeon_device *rdev); |
| 865 | int kv_dpm_enable(struct radeon_device *rdev); |
Alex Deucher | d8852c3 | 2013-12-19 14:03:36 -0500 | [diff] [blame] | 866 | int kv_dpm_late_enable(struct radeon_device *rdev); |
Alex Deucher | 41a524a | 2013-08-14 01:01:40 -0400 | [diff] [blame] | 867 | void kv_dpm_disable(struct radeon_device *rdev); |
| 868 | int kv_dpm_pre_set_power_state(struct radeon_device *rdev); |
| 869 | int kv_dpm_set_power_state(struct radeon_device *rdev); |
| 870 | void kv_dpm_post_set_power_state(struct radeon_device *rdev); |
| 871 | void kv_dpm_setup_asic(struct radeon_device *rdev); |
| 872 | void kv_dpm_display_configuration_changed(struct radeon_device *rdev); |
| 873 | void kv_dpm_fini(struct radeon_device *rdev); |
| 874 | u32 kv_dpm_get_sclk(struct radeon_device *rdev, bool low); |
| 875 | u32 kv_dpm_get_mclk(struct radeon_device *rdev, bool low); |
| 876 | void kv_dpm_print_power_state(struct radeon_device *rdev, |
| 877 | struct radeon_ps *ps); |
Alex Deucher | ae3e40e | 2013-07-18 16:39:53 -0400 | [diff] [blame] | 878 | void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev, |
| 879 | struct seq_file *m); |
Alex Deucher | 2b4c802 | 2013-07-18 16:48:46 -0400 | [diff] [blame] | 880 | int kv_dpm_force_performance_level(struct radeon_device *rdev, |
| 881 | enum radeon_dpm_forced_level level); |
Alex Deucher | 77df508 | 2013-08-09 10:02:40 -0400 | [diff] [blame] | 882 | void kv_dpm_powergate_uvd(struct radeon_device *rdev, bool gate); |
Alex Deucher | b7a5ae9 | 2013-09-09 19:33:08 -0400 | [diff] [blame] | 883 | void kv_dpm_enable_bapm(struct radeon_device *rdev, bool enable); |
Alex Deucher | 41a524a | 2013-08-14 01:01:40 -0400 | [diff] [blame] | 884 | |
Christian König | e409b12 | 2013-08-13 11:56:53 +0200 | [diff] [blame] | 885 | /* uvd v1.0 */ |
| 886 | uint32_t uvd_v1_0_get_rptr(struct radeon_device *rdev, |
| 887 | struct radeon_ring *ring); |
| 888 | uint32_t uvd_v1_0_get_wptr(struct radeon_device *rdev, |
| 889 | struct radeon_ring *ring); |
| 890 | void uvd_v1_0_set_wptr(struct radeon_device *rdev, |
| 891 | struct radeon_ring *ring); |
Christian König | 856754c | 2013-04-16 22:11:22 +0200 | [diff] [blame] | 892 | int uvd_v1_0_resume(struct radeon_device *rdev); |
Christian König | e409b12 | 2013-08-13 11:56:53 +0200 | [diff] [blame] | 893 | |
| 894 | int uvd_v1_0_init(struct radeon_device *rdev); |
| 895 | void uvd_v1_0_fini(struct radeon_device *rdev); |
| 896 | int uvd_v1_0_start(struct radeon_device *rdev); |
| 897 | void uvd_v1_0_stop(struct radeon_device *rdev); |
| 898 | |
| 899 | int uvd_v1_0_ring_test(struct radeon_device *rdev, struct radeon_ring *ring); |
Christian König | 856754c | 2013-04-16 22:11:22 +0200 | [diff] [blame] | 900 | void uvd_v1_0_fence_emit(struct radeon_device *rdev, |
| 901 | struct radeon_fence *fence); |
Christian König | e409b12 | 2013-08-13 11:56:53 +0200 | [diff] [blame] | 902 | int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 903 | bool uvd_v1_0_semaphore_emit(struct radeon_device *rdev, |
Christian König | e409b12 | 2013-08-13 11:56:53 +0200 | [diff] [blame] | 904 | struct radeon_ring *ring, |
| 905 | struct radeon_semaphore *semaphore, |
| 906 | bool emit_wait); |
| 907 | void uvd_v1_0_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); |
| 908 | |
| 909 | /* uvd v2.2 */ |
| 910 | int uvd_v2_2_resume(struct radeon_device *rdev); |
| 911 | void uvd_v2_2_fence_emit(struct radeon_device *rdev, |
| 912 | struct radeon_fence *fence); |
| 913 | |
| 914 | /* uvd v3.1 */ |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 915 | bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev, |
Christian König | e409b12 | 2013-08-13 11:56:53 +0200 | [diff] [blame] | 916 | struct radeon_ring *ring, |
| 917 | struct radeon_semaphore *semaphore, |
| 918 | bool emit_wait); |
| 919 | |
| 920 | /* uvd v4.2 */ |
| 921 | int uvd_v4_2_resume(struct radeon_device *rdev); |
| 922 | |
Christian König | d93f793 | 2013-05-23 12:10:04 +0200 | [diff] [blame] | 923 | /* vce v1.0 */ |
| 924 | uint32_t vce_v1_0_get_rptr(struct radeon_device *rdev, |
| 925 | struct radeon_ring *ring); |
| 926 | uint32_t vce_v1_0_get_wptr(struct radeon_device *rdev, |
| 927 | struct radeon_ring *ring); |
| 928 | void vce_v1_0_set_wptr(struct radeon_device *rdev, |
| 929 | struct radeon_ring *ring); |
| 930 | int vce_v1_0_init(struct radeon_device *rdev); |
| 931 | int vce_v1_0_start(struct radeon_device *rdev); |
| 932 | |
| 933 | /* vce v2.0 */ |
| 934 | int vce_v2_0_resume(struct radeon_device *rdev); |
| 935 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 936 | #endif |