| .TH TURBOSTAT 8 |
| .SH NAME |
| turbostat \- Report processor frequency and idle statistics |
| .SH SYNOPSIS |
| .ft B |
| .B turbostat |
| .RB [ Options ] |
| .RB command |
| .br |
| .B turbostat |
| .RB [ Options ] |
| .RB [ "\-i interval_sec" ] |
| .SH DESCRIPTION |
| \fBturbostat \fP reports processor topology, frequency, |
| idle power-state statistics, temperature and power on modern X86 processors. |
| Either \fBcommand\fP is forked and statistics are printed |
| upon its completion, or statistics are printed periodically. |
| |
| \fBturbostat \fP |
| must be run on root, and |
| minimally requires that the processor |
| supports an "invariant" TSC, plus the APERF and MPERF MSRs. |
| Additional information is reported depending on hardware counter support. |
| |
| .SS Options |
| The \fB-p\fP option limits output to the 1st thread in 1st core of each package. |
| .PP |
| The \fB-P\fP option limits output to the 1st thread in each Package. |
| .PP |
| The \fB-S\fP option limits output to a 1-line System Summary for each interval. |
| .PP |
| The \fB-v\fP option increases verbosity. |
| .PP |
| The \fB-s\fP option prints the SMI counter, equivalent to "-c 0x34" |
| .PP |
| The \fB-c MSR#\fP option includes the delta of the specified 32-bit MSR counter. |
| .PP |
| The \fB-C MSR#\fP option includes the delta of the specified 64-bit MSR counter. |
| .PP |
| The \fB-m MSR#\fP option includes the the specified 32-bit MSR value. |
| .PP |
| The \fB-M MSR#\fP option includes the the specified 64-bit MSR value. |
| .PP |
| The \fB-i interval_sec\fP option prints statistics every \fiinterval_sec\fP seconds. |
| The default is 5 seconds. |
| .PP |
| The \fBcommand\fP parameter forks \fBcommand\fP and upon its exit, |
| displays the statistics gathered since it was forked. |
| .PP |
| .SH FIELD DESCRIPTIONS |
| .nf |
| \fBpk\fP processor package number. |
| \fBcor\fP processor core number. |
| \fBCPU\fP Linux CPU (logical processor) number. |
| Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology. |
| \fB%c0\fP percent of the interval that the CPU retired instructions. |
| \fBGHz\fP average clock rate while the CPU was in c0 state. |
| \fBTSC\fP average GHz that the TSC ran during the entire interval. |
| \fB%c1, %c3, %c6, %c7\fP show the percentage residency in hardware core idle states. |
| \fBCTMP\fP Degrees Celsius reported by the per-core Digital Thermal Sensor. |
| \fBPTMP\fP Degrees Celsius reported by the per-package Package Thermal Monitor. |
| \fB%pc2, %pc3, %pc6, %pc7\fP percentage residency in hardware package idle states. |
| \fBPkg_W\fP Watts consumed by the whole package. |
| \fBCor_W\fP Watts consumed by the core part of the package. |
| \fBGFX_W\fP Watts consumed by the Graphics part of the package -- available only on client processors. |
| \fBRAM_W\fP Watts consumed by the DRAM DIMMS -- available only on server processors. |
| \fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package. |
| \fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM. |
| .fi |
| .PP |
| .SH EXAMPLE |
| Without any parameters, turbostat prints out counters ever 5 seconds. |
| (override interval with "-i sec" option, or specify a command |
| for turbostat to fork). |
| |
| The first row of statistics is a summary for the entire system. |
| For residency % columns, the summary is a weighted average. |
| For Temperature columns, the summary is the column maximum. |
| For Watts columns, the summary is a system total. |
| Subsequent rows show per-CPU statistics. |
| |
| .nf |
| [root@sandy]# ./turbostat |
| cor CPU %c0 GHz TSC %c1 %c3 %c6 %c7 CTMP PTMP %pc2 %pc3 %pc6 %pc7 Pkg_W Cor_W GFX_W |
| 0.06 0.80 2.29 0.11 0.00 0.00 99.83 47 40 0.26 0.01 0.44 98.78 3.49 0.12 0.14 |
| 0 0 0.07 0.80 2.29 0.07 0.00 0.00 99.86 40 40 0.26 0.01 0.44 98.78 3.49 0.12 0.14 |
| 0 4 0.03 0.80 2.29 0.12 |
| 1 1 0.04 0.80 2.29 0.25 0.01 0.00 99.71 40 |
| 1 5 0.16 0.80 2.29 0.13 |
| 2 2 0.05 0.80 2.29 0.06 0.01 0.00 99.88 40 |
| 2 6 0.03 0.80 2.29 0.08 |
| 3 3 0.05 0.80 2.29 0.08 0.00 0.00 99.87 47 |
| 3 7 0.04 0.84 2.29 0.09 |
| .fi |
| .SH SUMMARY EXAMPLE |
| The "-s" option prints the column headers just once, |
| and then the one line system summary for each sample interval. |
| |
| .nf |
| [root@wsm]# turbostat -S |
| %c0 GHz TSC %c1 %c3 %c6 CTMP %pc3 %pc6 |
| 1.40 2.81 3.38 10.78 43.47 44.35 42 13.67 2.09 |
| 1.34 2.90 3.38 11.48 58.96 28.23 41 19.89 0.15 |
| 1.55 2.72 3.38 26.73 37.66 34.07 42 2.53 2.80 |
| 1.37 2.83 3.38 16.95 60.05 21.63 42 5.76 0.20 |
| .fi |
| .SH VERBOSE EXAMPLE |
| The "-v" option adds verbosity to the output: |
| |
| .nf |
| [root@ivy]# turbostat -v |
| turbostat v3.0 November 23, 2012 - Len Brown <lenb@kernel.org> |
| CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9) |
| CPUID(6): APERF, DTS, PTM, EPB |
| RAPL: 851 sec. Joule Counter Range |
| cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300 |
| 16 * 100 = 1600 MHz max efficiency |
| 35 * 100 = 3500 MHz TSC frequency |
| cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6-noret) |
| cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727 |
| 37 * 100 = 3700 MHz max turbo 4 active cores |
| 38 * 100 = 3800 MHz max turbo 3 active cores |
| 39 * 100 = 3900 MHz max turbo 2 active cores |
| 39 * 100 = 3900 MHz max turbo 1 active cores |
| cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced) |
| cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.) |
| cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.) |
| cpu0: MSR_PKG_POWER_LIMIT: 0x830000148268 (UNlocked) |
| cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled) |
| cpu0: PKG Limit #2: ENabled (96.000000 Watts, 0.000977* sec, clamp DISabled) |
| cpu0: MSR_PP0_POLICY: 0 |
| cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked) |
| cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) |
| cpu0: MSR_PP1_POLICY: 0 |
| cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked) |
| cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) |
| cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C) |
| cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C) |
| cpu0: MSR_IA32_THERM_STATUS: 0x88560000 (19 C +/- 1) |
| cpu1: MSR_IA32_THERM_STATUS: 0x88560000 (19 C +/- 1) |
| cpu2: MSR_IA32_THERM_STATUS: 0x88540000 (21 C +/- 1) |
| cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1) |
| ... |
| .fi |
| The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency |
| available at the minimum package voltage. The \fBTSC frequency\fP is the nominal |
| maximum frequency of the processor if turbo-mode were not available. This frequency |
| should be sustainable on all CPUs indefinitely, given nominal power and cooling. |
| The remaining rows show what maximum turbo frequency is possible |
| depending on the number of idle cores. Note that this information is |
| not available on all processors. |
| .SH FORK EXAMPLE |
| If turbostat is invoked with a command, it will fork that command |
| and output the statistics gathered when the command exits. |
| eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds |
| until ^C while the other CPUs are mostly idle: |
| |
| .nf |
| [root@x980 lenb]# ./turbostat cat /dev/zero > /dev/null |
| ^C |
| cor CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6 |
| 8.86 3.61 3.38 15.06 31.19 44.89 0.00 0.00 |
| 0 0 1.46 3.22 3.38 16.84 29.48 52.22 0.00 0.00 |
| 0 6 0.21 3.06 3.38 18.09 |
| 1 2 0.53 3.33 3.38 2.80 46.40 50.27 |
| 1 8 0.89 3.47 3.38 2.44 |
| 2 4 1.36 3.43 3.38 9.04 23.71 65.89 |
| 2 10 0.18 2.86 3.38 10.22 |
| 8 1 0.04 2.87 3.38 99.96 0.01 0.00 |
| 8 7 99.72 3.63 3.38 0.27 |
| 9 3 0.31 3.21 3.38 7.64 56.55 35.50 |
| 9 9 0.08 2.95 3.38 7.88 |
| 10 5 1.42 3.43 3.38 2.14 30.99 65.44 |
| 10 11 0.16 2.88 3.38 3.40 |
| .fi |
| Above the cycle soaker drives cpu7 up its 3.6 GHz turbo limit |
| while the other processors are generally in various states of idle. |
| |
| Note that cpu1 and cpu7 are HT siblings within core8. |
| As cpu7 is very busy, it prevents its sibling, cpu1, |
| from entering a c-state deeper than c1. |
| |
| Note that turbostat reports average GHz of 3.63, while |
| the arithmetic average of the GHz column above is lower. |
| This is a weighted average, where the weight is %c0. ie. it is the total number of |
| un-halted cycles elapsed per time divided by the number of CPUs. |
| .SH SMI COUNTING EXAMPLE |
| On Intel Nehalem and newer processors, MSR 0x34 is a System Management Mode Interrupt (SMI) counter. |
| Using the -m option, you can display how many SMIs have fired since reset, or if there |
| are SMIs during the measurement interval, you can display the delta using the -d option. |
| .nf |
| [root@x980 ~]# turbostat -m 0x34 |
| cor CPU %c0 GHz TSC MSR 0x034 %c1 %c3 %c6 %pc3 %pc6 |
| 1.41 1.82 3.38 0x00000000 8.92 37.82 51.85 17.37 0.55 |
| 0 0 3.73 2.03 3.38 0x00000055 1.72 48.25 46.31 17.38 0.55 |
| 0 6 0.14 1.63 3.38 0x00000056 5.30 |
| 1 2 2.51 1.80 3.38 0x00000056 15.65 29.33 52.52 |
| 1 8 0.10 1.65 3.38 0x00000056 18.05 |
| 2 4 1.16 1.68 3.38 0x00000056 5.87 24.47 68.50 |
| 2 10 0.10 1.63 3.38 0x00000056 6.93 |
| 8 1 3.84 1.91 3.38 0x00000056 1.36 50.65 44.16 |
| 8 7 0.08 1.64 3.38 0x00000056 5.12 |
| 9 3 1.82 1.73 3.38 0x00000056 7.59 24.21 66.38 |
| 9 9 0.09 1.68 3.38 0x00000056 9.32 |
| 10 5 1.66 1.65 3.38 0x00000056 15.10 50.00 33.23 |
| 10 11 1.72 1.65 3.38 0x00000056 15.05 |
| ^C |
| [root@x980 ~]# |
| .fi |
| .SH NOTES |
| |
| .B "turbostat " |
| must be run as root. |
| |
| .B "turbostat " |
| reads hardware counters, but doesn't write them. |
| So it will not interfere with the OS or other programs, including |
| multiple invocations of itself. |
| |
| \fBturbostat \fP |
| may work poorly on Linux-2.6.20 through 2.6.29, |
| as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF |
| in those kernels. |
| |
| If the TSC column does not make sense, then |
| the other numbers will also make no sense. |
| Turbostat is lightweight, and its data collection is not atomic. |
| These issues are usually caused by an extremely short measurement |
| interval (much less than 1 second), or system activity that prevents |
| turbostat from being able to run on all CPUS to quickly collect data. |
| |
| The APERF, MPERF MSRs are defined to count non-halted cycles. |
| Although it is not guaranteed by the architecture, turbostat assumes |
| that they count at TSC rate, which is true on all processors tested to date. |
| |
| .SH REFERENCES |
| "Intel® Turbo Boost Technology |
| in Intel® Core™ Microarchitecture (Nehalem) Based Processors" |
| http://download.intel.com/design/processor/applnots/320354.pdf |
| |
| "Intel® 64 and IA-32 Architectures Software Developer's Manual |
| Volume 3B: System Programming Guide" |
| http://www.intel.com/products/processor/manuals/ |
| |
| .SH FILES |
| .ta |
| .nf |
| /dev/cpu/*/msr |
| .fi |
| |
| .SH "SEE ALSO" |
| msr(4), vmstat(8) |
| .PP |
| .SH AUTHOR |
| .nf |
| Written by Len Brown <len.brown@intel.com> |