| /* |
| * Device Tree Source for the r8a73a4 SoC |
| * |
| * Copyright (C) 2013 Renesas Solutions Corp. |
| * Copyright (C) 2013 Magnus Damm |
| * |
| * This file is licensed under the terms of the GNU General Public License |
| * version 2. This program is licensed "as is" without any warranty of any |
| * kind, whether express or implied. |
| */ |
| |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| / { |
| compatible = "renesas,r8a73a4"; |
| interrupt-parent = <&gic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a15"; |
| reg = <0>; |
| clock-frequency = <1500000000>; |
| }; |
| }; |
| |
| timer { |
| compatible = "arm,armv7-timer"; |
| interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
| <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
| }; |
| |
| dmac: dma-multiplexer { |
| compatible = "renesas,shdma-mux"; |
| #dma-cells = <1>; |
| dma-channels = <20>; |
| dma-requests = <256>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| dma0: dma-controller@e6700020 { |
| compatible = "renesas,shdma-r8a73a4"; |
| reg = <0 0xe6700020 0 0x89e0>; |
| interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH |
| 0 200 IRQ_TYPE_LEVEL_HIGH |
| 0 201 IRQ_TYPE_LEVEL_HIGH |
| 0 202 IRQ_TYPE_LEVEL_HIGH |
| 0 203 IRQ_TYPE_LEVEL_HIGH |
| 0 204 IRQ_TYPE_LEVEL_HIGH |
| 0 205 IRQ_TYPE_LEVEL_HIGH |
| 0 206 IRQ_TYPE_LEVEL_HIGH |
| 0 207 IRQ_TYPE_LEVEL_HIGH |
| 0 208 IRQ_TYPE_LEVEL_HIGH |
| 0 209 IRQ_TYPE_LEVEL_HIGH |
| 0 210 IRQ_TYPE_LEVEL_HIGH |
| 0 211 IRQ_TYPE_LEVEL_HIGH |
| 0 212 IRQ_TYPE_LEVEL_HIGH |
| 0 213 IRQ_TYPE_LEVEL_HIGH |
| 0 214 IRQ_TYPE_LEVEL_HIGH |
| 0 215 IRQ_TYPE_LEVEL_HIGH |
| 0 216 IRQ_TYPE_LEVEL_HIGH |
| 0 217 IRQ_TYPE_LEVEL_HIGH |
| 0 218 IRQ_TYPE_LEVEL_HIGH |
| 0 219 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "error", |
| "ch0", "ch1", "ch2", "ch3", |
| "ch4", "ch5", "ch6", "ch7", |
| "ch8", "ch9", "ch10", "ch11", |
| "ch12", "ch13", "ch14", "ch15", |
| "ch16", "ch17", "ch18", "ch19"; |
| }; |
| }; |
| |
| pfc: pfc@e6050000 { |
| compatible = "renesas,pfc-r8a73a4"; |
| reg = <0 0xe6050000 0 0x9000>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupts-extended = |
| <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>, |
| <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>, |
| <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>, |
| <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>, |
| <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>, |
| <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>, |
| <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>, |
| <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>, |
| <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>, |
| <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>, |
| <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>, |
| <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>, |
| <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>, |
| <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>, |
| <&irqc1 24 0>, <&irqc1 25 0>; |
| }; |
| |
| i2c5: i2c@e60b0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe60b0000 0 0x428>; |
| interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>; |
| |
| status = "disabled"; |
| }; |
| |
| cmt1: timer@e6130000 { |
| compatible = "renesas,cmt-48-r8a73a4", "renesas,cmt-48-gen2"; |
| reg = <0 0xe6130000 0 0x1004>; |
| interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>; |
| |
| renesas,channels-mask = <0xff>; |
| |
| status = "disabled"; |
| }; |
| |
| irqc0: interrupt-controller@e61c0000 { |
| compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| reg = <0 0xe61c0000 0 0x200>; |
| interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, |
| <0 1 IRQ_TYPE_LEVEL_HIGH>, |
| <0 2 IRQ_TYPE_LEVEL_HIGH>, |
| <0 3 IRQ_TYPE_LEVEL_HIGH>, |
| <0 4 IRQ_TYPE_LEVEL_HIGH>, |
| <0 5 IRQ_TYPE_LEVEL_HIGH>, |
| <0 6 IRQ_TYPE_LEVEL_HIGH>, |
| <0 7 IRQ_TYPE_LEVEL_HIGH>, |
| <0 8 IRQ_TYPE_LEVEL_HIGH>, |
| <0 9 IRQ_TYPE_LEVEL_HIGH>, |
| <0 10 IRQ_TYPE_LEVEL_HIGH>, |
| <0 11 IRQ_TYPE_LEVEL_HIGH>, |
| <0 12 IRQ_TYPE_LEVEL_HIGH>, |
| <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| <0 14 IRQ_TYPE_LEVEL_HIGH>, |
| <0 15 IRQ_TYPE_LEVEL_HIGH>, |
| <0 16 IRQ_TYPE_LEVEL_HIGH>, |
| <0 17 IRQ_TYPE_LEVEL_HIGH>, |
| <0 18 IRQ_TYPE_LEVEL_HIGH>, |
| <0 19 IRQ_TYPE_LEVEL_HIGH>, |
| <0 20 IRQ_TYPE_LEVEL_HIGH>, |
| <0 21 IRQ_TYPE_LEVEL_HIGH>, |
| <0 22 IRQ_TYPE_LEVEL_HIGH>, |
| <0 23 IRQ_TYPE_LEVEL_HIGH>, |
| <0 24 IRQ_TYPE_LEVEL_HIGH>, |
| <0 25 IRQ_TYPE_LEVEL_HIGH>, |
| <0 26 IRQ_TYPE_LEVEL_HIGH>, |
| <0 27 IRQ_TYPE_LEVEL_HIGH>, |
| <0 28 IRQ_TYPE_LEVEL_HIGH>, |
| <0 29 IRQ_TYPE_LEVEL_HIGH>, |
| <0 30 IRQ_TYPE_LEVEL_HIGH>, |
| <0 31 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| irqc1: interrupt-controller@e61c0200 { |
| compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| reg = <0 0xe61c0200 0 0x200>; |
| interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>, |
| <0 33 IRQ_TYPE_LEVEL_HIGH>, |
| <0 34 IRQ_TYPE_LEVEL_HIGH>, |
| <0 35 IRQ_TYPE_LEVEL_HIGH>, |
| <0 36 IRQ_TYPE_LEVEL_HIGH>, |
| <0 37 IRQ_TYPE_LEVEL_HIGH>, |
| <0 38 IRQ_TYPE_LEVEL_HIGH>, |
| <0 39 IRQ_TYPE_LEVEL_HIGH>, |
| <0 40 IRQ_TYPE_LEVEL_HIGH>, |
| <0 41 IRQ_TYPE_LEVEL_HIGH>, |
| <0 42 IRQ_TYPE_LEVEL_HIGH>, |
| <0 43 IRQ_TYPE_LEVEL_HIGH>, |
| <0 44 IRQ_TYPE_LEVEL_HIGH>, |
| <0 45 IRQ_TYPE_LEVEL_HIGH>, |
| <0 46 IRQ_TYPE_LEVEL_HIGH>, |
| <0 47 IRQ_TYPE_LEVEL_HIGH>, |
| <0 48 IRQ_TYPE_LEVEL_HIGH>, |
| <0 49 IRQ_TYPE_LEVEL_HIGH>, |
| <0 50 IRQ_TYPE_LEVEL_HIGH>, |
| <0 51 IRQ_TYPE_LEVEL_HIGH>, |
| <0 52 IRQ_TYPE_LEVEL_HIGH>, |
| <0 53 IRQ_TYPE_LEVEL_HIGH>, |
| <0 54 IRQ_TYPE_LEVEL_HIGH>, |
| <0 55 IRQ_TYPE_LEVEL_HIGH>, |
| <0 56 IRQ_TYPE_LEVEL_HIGH>, |
| <0 57 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| thermal@e61f0000 { |
| compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; |
| reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, |
| <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; |
| interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| i2c0: i2c@e6500000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6500000 0 0x428>; |
| interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@e6510000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6510000 0 0x428>; |
| interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@e6520000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6520000 0 0x428>; |
| interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c3: i2c@e6530000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6530000 0 0x428>; |
| interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c4: i2c@e6540000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6540000 0 0x428>; |
| interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c6: i2c@e6550000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6550000 0 0x428>; |
| interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c7: i2c@e6560000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6560000 0 0x428>; |
| interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| i2c8: i2c@e6570000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic"; |
| reg = <0 0xe6570000 0 0x428>; |
| interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| scifb0: serial@e6c20000 { |
| compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| reg = <0 0xe6c20000 0 0x100>; |
| interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| scifb1: serial@e6c30000 { |
| compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| reg = <0 0xe6c30000 0 0x100>; |
| interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| scifa0: serial@e6c40000 { |
| compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; |
| reg = <0 0xe6c40000 0 0x100>; |
| interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| scifa1: serial@e6c50000 { |
| compatible = "renesas,scifa-r8a73a4", "renesas,scifa"; |
| reg = <0 0xe6c50000 0 0x100>; |
| interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| scifb2: serial@e6ce0000 { |
| compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| reg = <0 0xe6ce0000 0 0x100>; |
| interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| scifb3: serial@e6cf0000 { |
| compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; |
| reg = <0 0xe6cf0000 0 0x100>; |
| interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| sdhi0: sd@ee100000 { |
| compatible = "renesas,sdhi-r8a73a4"; |
| reg = <0 0xee100000 0 0x100>; |
| interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| |
| sdhi1: sd@ee120000 { |
| compatible = "renesas,sdhi-r8a73a4"; |
| reg = <0 0xee120000 0 0x100>; |
| interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| |
| sdhi2: sd@ee140000 { |
| compatible = "renesas,sdhi-r8a73a4"; |
| reg = <0 0xee140000 0 0x100>; |
| interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>; |
| cap-sd-highspeed; |
| status = "disabled"; |
| }; |
| |
| mmcif0: mmc@ee200000 { |
| compatible = "renesas,sh-mmcif"; |
| reg = <0 0xee200000 0 0x80>; |
| interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| |
| mmcif1: mmc@ee220000 { |
| compatible = "renesas,sh-mmcif"; |
| reg = <0 0xee220000 0 0x80>; |
| interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>; |
| reg-io-width = <4>; |
| status = "disabled"; |
| }; |
| |
| gic: interrupt-controller@f1001000 { |
| compatible = "arm,cortex-a15-gic"; |
| #interrupt-cells = <3>; |
| #address-cells = <0>; |
| interrupt-controller; |
| reg = <0 0xf1001000 0 0x1000>, |
| <0 0xf1002000 0 0x1000>, |
| <0 0xf1004000 0 0x2000>, |
| <0 0xf1006000 0 0x2000>; |
| interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
| }; |
| }; |