arch/arm/boot/dts/dm8168-evm.dts

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "dm816x.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "DM8168 EVM";
	compatible = "ti,dm8168-evm", "ti,dm8168";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000	/* 1 GB */
		       0xc0000000 0x40000000>;	/* 1 GB */
	};

	/* FDC6331L controlled by SD_POW pin */
	vmmcsd_fixed: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	sata_refclk: fixedclock0 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
	};
};

&dm816x_pinmux {
	mcspi1_pins: pinmux_mcspi1_pins {
		pinctrl-single,pins = <
			DM816X_IOPAD(0x0a94, MUX_MODE0)			/* SPI_SCLK */
			DM816X_IOPAD(0x0a98, MUX_MODE0)			/* SPI_SCS0 */
			DM816X_IOPAD(0x0aa8, MUX_MODE0)			/* SPI_D0 */
			DM816X_IOPAD(0x0aac, MUX_MODE0)			/* SPI_D1 */
		>;
	};

	mmc_pins: pinmux_mmc_pins {
		pinctrl-single,pins = <
			DM816X_IOPAD(0x0a70, MUX_MODE0)			/* SD_POW */
			DM816X_IOPAD(0x0a74, MUX_MODE0)			/* SD_CLK */
			DM816X_IOPAD(0x0a78, MUX_MODE0)			/* SD_CMD */
			DM816X_IOPAD(0x0a7C, MUX_MODE0)			/* SD_DAT0 */
			DM816X_IOPAD(0x0a80, MUX_MODE0)			/* SD_DAT1 */
			DM816X_IOPAD(0x0a84, MUX_MODE0)			/* SD_DAT2 */
			DM816X_IOPAD(0x0a88, MUX_MODE0)			/* SD_DAT2 */
			DM816X_IOPAD(0x0a8c, MUX_MODE2)			/* GP1[7] */
			DM816X_IOPAD(0x0a90, MUX_MODE2)			/* GP1[8] */
		>;
	};

	usb0_pins: pinmux_usb0_pins {
		pinctrl-single,pins = <
			DM816X_IOPAD(0x0d04, MUX_MODE0)			/* USB0_DRVVBUS */
		>;
	};

	usb1_pins: pinmux_usb1_pins {
		pinctrl-single,pins = <
			DM816X_IOPAD(0x0d08, MUX_MODE0)			/* USB1_DRVVBUS */
		>;
	};

	nandflash_pins: nandflash_pins {
		pinctrl-single,pins = <
			DM816X_IOPAD(0x0b38, PULL_UP | MUX_MODE0)		/* PINCTRL207 GPMC_CS0*/
			DM816X_IOPAD(0x0b60, PULL_ENA | MUX_MODE0)		/* PINCTRL217 GPMC_ADV_ALE */
			DM816X_IOPAD(0x0b54, PULL_UP | PULL_ENA | MUX_MODE0)	/* PINCTRL214 GPMC_OE_RE */
			DM816X_IOPAD(0x0b58, PULL_ENA | MUX_MODE0)		/* PINCTRL215 GPMC_BE0_CLE */
			DM816X_IOPAD(0x0b50, PULL_UP | MUX_MODE0)		/* PINCTRL213 GPMC_WE */
			DM816X_IOPAD(0x0b6c, MUX_MODE0)				/* PINCTRL220 GPMC_WAIT */
			DM816X_IOPAD(0x0be4, PULL_ENA | MUX_MODE0)		/* PINCTRL250 GPMC_CLK */
			DM816X_IOPAD(0x0ba4, MUX_MODE0)				/* PINCTRL234 GPMC_D0 */
			DM816X_IOPAD(0x0ba8, MUX_MODE0)				/* PINCTRL234 GPMC_D1 */
			DM816X_IOPAD(0x0bac, MUX_MODE0)				/* PINCTRL234 GPMC_D2 */
			DM816X_IOPAD(0x0bb0, MUX_MODE0)				/* PINCTRL234 GPMC_D3 */
			DM816X_IOPAD(0x0bb4, MUX_MODE0)				/* PINCTRL234 GPMC_D4 */
			DM816X_IOPAD(0x0bb8, MUX_MODE0)				/* PINCTRL234 GPMC_D5 */
			DM816X_IOPAD(0x0bbc, MUX_MODE0)				/* PINCTRL234 GPMC_D6 */
			DM816X_IOPAD(0x0bc0, MUX_MODE0)				/* PINCTRL234 GPMC_D7 */
			DM816X_IOPAD(0x0bc4, MUX_MODE0)				/* PINCTRL234 GPMC_D8 */
			DM816X_IOPAD(0x0bc8, MUX_MODE0)				/* PINCTRL234 GPMC_D9 */
			DM816X_IOPAD(0x0bcc, MUX_MODE0)				/* PINCTRL234 GPMC_D10 */
			DM816X_IOPAD(0x0bd0, MUX_MODE0)				/* PINCTRL234 GPMC_D11 */
			DM816X_IOPAD(0x0bd4, MUX_MODE0)				/* PINCTRL234 GPMC_D12 */
			DM816X_IOPAD(0x0bd8, MUX_MODE0)				/* PINCTRL234 GPMC_D13 */
			DM816X_IOPAD(0x0bdc, MUX_MODE0)				/* PINCTRL234 GPMC_D14 */
			DM816X_IOPAD(0x0be0, MUX_MODE0)				/* PINCTRL234 GPMC_D15 */
		>;
	};
};

&i2c1 {
	extgpio0: pcf8575@20 {
		compatible = "nxp,pcf8575";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&i2c2 {
	extgpio1: pcf8575@20 {
		compatible = "nxp,pcf8575";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&gpmc {
	ranges = <0 0 0x04000000 0x01000000>;	/* CS0: 16MB for NAND */
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins>;

	nand@0,0 {
		compatible = "ti,omap2-nand";
		linux,mtd-name= "micron,mt29f2g16aadwp";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>; /* termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		#address-cells = <1>;
		#size-cells = <1>;
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		nand-bus-width = <16>;
		gpmc,device-width = <2>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		partition@0 {
			label = "X-Loader";
			reg = <0 0x80000>;
		};
		partition@0x80000 {
			label = "U-Boot";
			reg = <0x80000 0x1c0000>;
		};
		partition@0x1c0000 {
			label = "Environment";
			reg = <0x240000 0x40000>;
		};
		partition@0x280000 {
			label = "Kernel";
			reg = <0x280000 0x500000>;
		};
		partition@0x780000 {
			label = "Filesystem";
			reg = <0x780000 0xf880000>;
		};
	};
};

&mcspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcspi1_pins>;

	m25p80@0 {
		compatible = "w25x32";
		spi-max-frequency = <48000000>;
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc_pins>;
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <4>;
	cd-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
};

/* At least dm8168-evm rev c won't support multipoint, later may */
&usb0 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb0_pins>;
	mentor,multipoint = <0>;
};

&usb1 {
	pinctrl-names = "default";
	pinctrl-0 = <&usb1_pins>;
	mentor,multipoint = <0>;
};

&sata {
	clocks = <&sysclk5_ck>, <&sata_refclk>;
};