arch/blackfin/mach-bf537/boards/minotaur.c - LeafOS-Devices/android_kernel_samsung_gta4xl - Gitiles

 /*
  */

 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
 #endif
 #include <linux/ata_platform.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/usb/sl811.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
 #include <linux/spi/ad7877.h>

 /*
  * Name the Board for the /proc/cpuinfo
  */
 char *bfin_board_name = "CamSig Minotaur BF537";

 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 static struct resource bfin_pcmcia_cf_resources[] = {
 	{
 		.start = 0x20310000, /* IO PORT */
 		.end = 0x20312000,
 		.flags = IORESOURCE_MEM,
 	}, {
 		.start = 0x20311000, /* Attribute Memory */
 		.end = 0x20311FFF,
 		.flags = IORESOURCE_MEM,
 	}, {
 		.start = IRQ_PF4,
 		.end = IRQ_PF4,
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 	}, {
 		.start = IRQ_PF6, /* Card Detect PF6 */
 		.end = IRQ_PF6,
 		.flags = IORESOURCE_IRQ,
 	},
 };

 static struct platform_device bfin_pcmcia_cf_device = {
 	.name = "bfin_cf_pcmcia",
 	.id = -1,
 	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
 	.resource = bfin_pcmcia_cf_resources,
 };
 #endif

 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 static struct platform_device rtc_device = {
 	.name = "rtc-bfin",
 	.id   = -1,
 };
 #endif

 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 static struct platform_device bfin_mii_bus = {
 	.name = "bfin_mii_bus",
 };

 static struct platform_device bfin_mac_device = {
 	.name = "bfin_mac",
 	.dev.platform_data = &bfin_mii_bus,
 };
 #endif

 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 static struct resource net2272_bfin_resources[] = {
 	{
 		.start = 0x20300000,
 		.end = 0x20300000 + 0x100,
 		.flags = IORESOURCE_MEM,
 	}, {
 		.start = IRQ_PF7,
 		.end = IRQ_PF7,
 		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 	},
 };

 static struct platform_device net2272_bfin_device = {
 	.name = "net2272",
 	.id = -1,
 	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
 	.resource = net2272_bfin_resources,
 };
 #endif

 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 /* all SPI peripherals info goes here */

 #if defined(CONFIG_MTD_M25P80) \
 	|| defined(CONFIG_MTD_M25P80_MODULE)

 /* Partition sizes */
 #define FLASH_SIZE       0x00400000
 #define PSIZE_UBOOT      0x00030000
 #define PSIZE_INITRAMFS  0x00240000

 static struct mtd_partition bfin_spi_flash_partitions[] = {
 	{
 		.name       = "bootloader(spi)",
 		.size       = PSIZE_UBOOT,
 		.offset     = 0x000000,
 		.mask_flags = MTD_CAP_ROM
 	}, {
 		.name       = "initramfs(spi)",
 		.size       = PSIZE_INITRAMFS,
 		.offset     = PSIZE_UBOOT
 	}, {
 		.name       = "opt(spi)",
 		.size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
 		.offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
 	}
 };

 static struct flash_platform_data bfin_spi_flash_data = {
 	.name = "m25p80",
 	.parts = bfin_spi_flash_partitions,
 	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 	.type = "m25p64",
 };

 /* SPI flash chip (m25p64) */
 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 	.enable_dma = 0,         /* use dma transfer with this chip*/
 	.bits_per_word = 8,
 };
 #endif

 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 	.enable_dma = 0,
 	.bits_per_word = 8,
 };
 #endif

 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_MTD_M25P80) \
 	|| defined(CONFIG_MTD_M25P80_MODULE)
 	{
 		/* the modalias must be the same as spi device driver name */
 		.modalias = "m25p80", /* Name of spi_driver for this device */
 		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 		.bus_num = 0, /* Framework bus number */
 		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 		.platform_data = &bfin_spi_flash_data,
 		.controller_data = &spi_flash_chip_info,
 		.mode = SPI_MODE_3,
 	},
 #endif

 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 	{
 		.modalias = "mmc_spi",
 		.max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 		.bus_num = 0,
 		.chip_select = 5,
 		.controller_data = &mmc_spi_chip_info,
 		.mode = SPI_MODE_3,
 	},
 #endif
 };

 /* SPI controller data */
 static struct bfin5xx_spi_master bfin_spi0_info = {
 	.num_chipselect = 8,
 	.enable_dma = 1,  /* master has the ability to do dma transfer */
 };

 /* SPI (0) */
 static struct resource bfin_spi0_resource[] = {
 	[0] = {
 		.start = SPI0_REGBASE,
 		.end   = SPI0_REGBASE + 0xFF,
 		.flags = IORESOURCE_MEM,
 		},
 	[1] = {
 		.start = CH_SPI,
 		.end   = CH_SPI,
 		.flags = IORESOURCE_IRQ,
 	},
 };

 static struct platform_device bfin_spi0_device = {
 	.name = "bfin-spi",
 	.id = 0, /* Bus number */
 	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
 	.resource = bfin_spi0_resource,
 	.dev = {
 		.platform_data = &bfin_spi0_info, /* Passed to driver */
 	},
 };
 #endif  /* spi master and devices */

 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
 	{
 		.start = 0xFFC00400,
 		.end = 0xFFC004FF,
 		.flags = IORESOURCE_MEM,
 	}, {
 		.start = 0xFFC02000,
 		.end = 0xFFC020FF,
 		.flags = IORESOURCE_MEM,
 	},
 };

 static struct platform_device bfin_uart_device = {
 	.name = "bfin-uart",
 	.id = 1,
 	.num_resources = ARRAY_SIZE(bfin_uart_resources),
 	.resource = bfin_uart_resources,
 };
 #endif

 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
 static struct resource bfin_sir0_resources[] = {
 	{
 		.start = 0xFFC00400,
 		.end = 0xFFC004FF,
 		.flags = IORESOURCE_MEM,
 	},
 	{
 		.start = IRQ_UART0_RX,
 		.end = IRQ_UART0_RX+1,
 		.flags = IORESOURCE_IRQ,
 	},
 	{
 		.start = CH_UART0_RX,
 		.end = CH_UART0_RX+1,
 		.flags = IORESOURCE_DMA,
 	},
 };

 static struct platform_device bfin_sir0_device = {
 	.name = "bfin_sir",
 	.id = 0,
 	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
 	.resource = bfin_sir0_resources,
 };
 #endif
 #ifdef CONFIG_BFIN_SIR1
 static struct resource bfin_sir1_resources[] = {
 	{
 		.start = 0xFFC02000,
 		.end = 0xFFC020FF,
 		.flags = IORESOURCE_MEM,
 	},
 	{
 		.start = IRQ_UART1_RX,
 		.end = IRQ_UART1_RX+1,
 		.flags = IORESOURCE_IRQ,
 	},
 	{
 		.start = CH_UART1_RX,
 		.end = CH_UART1_RX+1,
 		.flags = IORESOURCE_DMA,
 	},
 };

 static struct platform_device bfin_sir1_device = {
 	.name = "bfin_sir",
 	.id = 1,
 	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
 	.resource = bfin_sir1_resources,
 };
 #endif
 #endif

 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 static struct resource bfin_twi0_resource[] = {
 	[0] = {
 		.start = TWI0_REGBASE,
 		.end   = TWI0_REGBASE + 0xFF,
 		.flags = IORESOURCE_MEM,
 	},
 	[1] = {
 		.start = IRQ_TWI,
 		.end   = IRQ_TWI,
 		.flags = IORESOURCE_IRQ,
 	},
 };

 static struct platform_device i2c_bfin_twi_device = {
 	.name = "i2c-bfin-twi",
 	.id = 0,
 	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
 	.resource = bfin_twi0_resource,
 };
 #endif

 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 static struct platform_device bfin_sport0_uart_device = {
 	.name = "bfin-sport-uart",
 	.id = 0,
 };

 static struct platform_device bfin_sport1_uart_device = {
 	.name = "bfin-sport-uart",
 	.id = 1,
 };
 #endif

 static struct platform_device *minotaur_devices[] __initdata = {
 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 	&bfin_pcmcia_cf_device,
 #endif

 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 	&rtc_device,
 #endif

 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 	&bfin_mii_bus,
 	&bfin_mac_device,
 #endif

 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 	&net2272_bfin_device,
 #endif

 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 	&bfin_spi0_device,
 #endif

 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 	&bfin_uart_device,
 #endif

 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 #ifdef CONFIG_BFIN_SIR0
 	&bfin_sir0_device,
 #endif
 #ifdef CONFIG_BFIN_SIR1
 	&bfin_sir1_device,
 #endif
 #endif

 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 	&i2c_bfin_twi_device,
 #endif

 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 	&bfin_sport0_uart_device,
 	&bfin_sport1_uart_device,
 #endif

 };

 static int __init minotaur_init(void)
 {
 	printk(KERN_INFO "%s(): registering device resources\n", __func__);
 	platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 	spi_register_board_info(bfin_spi_board_info,
 				ARRAY_SIZE(bfin_spi_board_info));
 #endif

 	return 0;
 }

 arch_initcall(minotaur_init);

 void native_machine_restart(char *cmd)
 {
 	/* workaround reboot hang when booting from SPI */
 	if ((bfin_read_SYSCR() & 0x7) == 0x3)
 		bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 }
	/*
	*/

	#include <linux/device.h>
	#include <linux/platform_device.h>
	#include <linux/mtd/mtd.h>
	#include <linux/mtd/partitions.h>
	#include <linux/spi/spi.h>
	#include <linux/spi/flash.h>
	#if defined(CONFIG_USB_ISP1362_HCD) \|\| defined(CONFIG_USB_ISP1362_HCD_MODULE)
	#include <linux/usb/isp1362.h>
	#endif
	#include <linux/ata_platform.h>
	#include <linux/irq.h>
	#include <linux/interrupt.h>
	#include <linux/usb/sl811.h>
	#include <asm/dma.h>
	#include <asm/bfin5xx_spi.h>
	#include <asm/reboot.h>
	#include <linux/spi/ad7877.h>

	/*
	* Name the Board for the /proc/cpuinfo
	*/
	char *bfin_board_name = "CamSig Minotaur BF537";

	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	static struct resource bfin_pcmcia_cf_resources[] = {
	{
	.start = 0x20310000, /* IO PORT */
	.end = 0x20312000,
	.flags = IORESOURCE_MEM,
	}, {
	.start = 0x20311000, /* Attribute Memory */
	.end = 0x20311FFF,
	.flags = IORESOURCE_MEM,
	}, {
	.start = IRQ_PF4,
	.end = IRQ_PF4,
	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	}, {
	.start = IRQ_PF6, /* Card Detect PF6 */
	.end = IRQ_PF6,
	.flags = IORESOURCE_IRQ,
	},
	};

	static struct platform_device bfin_pcmcia_cf_device = {
	.name = "bfin_cf_pcmcia",
	.id = -1,
	.num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
	.resource = bfin_pcmcia_cf_resources,
	};
	#endif

	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	static struct platform_device rtc_device = {
	.name = "rtc-bfin",
	.id = -1,
	};
	#endif

	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
	static struct platform_device bfin_mii_bus = {
	.name = "bfin_mii_bus",
	};

	static struct platform_device bfin_mac_device = {
	.name = "bfin_mac",
	.dev.platform_data = &bfin_mii_bus,
	};
	#endif

	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	static struct resource net2272_bfin_resources[] = {
	{
	.start = 0x20300000,
	.end = 0x20300000 + 0x100,
	.flags = IORESOURCE_MEM,
	}, {
	.start = IRQ_PF7,
	.end = IRQ_PF7,
	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	},
	};

	static struct platform_device net2272_bfin_device = {
	.name = "net2272",
	.id = -1,
	.num_resources = ARRAY_SIZE(net2272_bfin_resources),
	.resource = net2272_bfin_resources,
	};
	#endif

	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	/* all SPI peripherals info goes here */

	#if defined(CONFIG_MTD_M25P80) \
	\|\| defined(CONFIG_MTD_M25P80_MODULE)

	/* Partition sizes */
	#define FLASH_SIZE 0x00400000
	#define PSIZE_UBOOT 0x00030000
	#define PSIZE_INITRAMFS 0x00240000

	static struct mtd_partition bfin_spi_flash_partitions[] = {
	{
	.name = "bootloader(spi)",
	.size = PSIZE_UBOOT,
	.offset = 0x000000,
	.mask_flags = MTD_CAP_ROM
	}, {
	.name = "initramfs(spi)",
	.size = PSIZE_INITRAMFS,
	.offset = PSIZE_UBOOT
	}, {
	.name = "opt(spi)",
	.size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
	.offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
	}
	};

	static struct flash_platform_data bfin_spi_flash_data = {
	.name = "m25p80",
	.parts = bfin_spi_flash_partitions,
	.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
	.type = "m25p64",
	};

	/* SPI flash chip (m25p64) */
	static struct bfin5xx_spi_chip spi_flash_chip_info = {
	.enable_dma = 0, /* use dma transfer with this chip*/
	.bits_per_word = 8,
	};
	#endif

	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	static struct bfin5xx_spi_chip mmc_spi_chip_info = {
	.enable_dma = 0,
	.bits_per_word = 8,
	};
	#endif

	static struct spi_board_info bfin_spi_board_info[] __initdata = {
	#if defined(CONFIG_MTD_M25P80) \
	\|\| defined(CONFIG_MTD_M25P80_MODULE)
	{
	/* the modalias must be the same as spi device driver name */
	.modalias = "m25p80", /* Name of spi_driver for this device */
	.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
	.bus_num = 0, /* Framework bus number */
	.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
	.platform_data = &bfin_spi_flash_data,
	.controller_data = &spi_flash_chip_info,
	.mode = SPI_MODE_3,
	},
	#endif

	#if defined(CONFIG_MMC_SPI) \|\| defined(CONFIG_MMC_SPI_MODULE)
	{
	.modalias = "mmc_spi",
	.max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
	.bus_num = 0,
	.chip_select = 5,
	.controller_data = &mmc_spi_chip_info,
	.mode = SPI_MODE_3,
	},
	#endif
	};

	/* SPI controller data */
	static struct bfin5xx_spi_master bfin_spi0_info = {
	.num_chipselect = 8,
	.enable_dma = 1, /* master has the ability to do dma transfer */
	};

	/* SPI (0) */
	static struct resource bfin_spi0_resource[] = {
	[0] = {
	.start = SPI0_REGBASE,
	.end = SPI0_REGBASE + 0xFF,
	.flags = IORESOURCE_MEM,
	},
	[1] = {
	.start = CH_SPI,
	.end = CH_SPI,
	.flags = IORESOURCE_IRQ,
	},
	};

	static struct platform_device bfin_spi0_device = {
	.name = "bfin-spi",
	.id = 0, /* Bus number */
	.num_resources = ARRAY_SIZE(bfin_spi0_resource),
	.resource = bfin_spi0_resource,
	.dev = {
	.platform_data = &bfin_spi0_info, /* Passed to driver */
	},
	};
	#endif /* spi master and devices */

	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	static struct resource bfin_uart_resources[] = {
	{
	.start = 0xFFC00400,
	.end = 0xFFC004FF,
	.flags = IORESOURCE_MEM,
	}, {
	.start = 0xFFC02000,
	.end = 0xFFC020FF,
	.flags = IORESOURCE_MEM,
	},
	};

	static struct platform_device bfin_uart_device = {
	.name = "bfin-uart",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_uart_resources),
	.resource = bfin_uart_resources,
	};
	#endif

	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
	#ifdef CONFIG_BFIN_SIR0
	static struct resource bfin_sir0_resources[] = {
	{
	.start = 0xFFC00400,
	.end = 0xFFC004FF,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = IRQ_UART0_RX,
	.end = IRQ_UART0_RX+1,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = CH_UART0_RX,
	.end = CH_UART0_RX+1,
	.flags = IORESOURCE_DMA,
	},
	};

	static struct platform_device bfin_sir0_device = {
	.name = "bfin_sir",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_sir0_resources),
	.resource = bfin_sir0_resources,
	};
	#endif
	#ifdef CONFIG_BFIN_SIR1
	static struct resource bfin_sir1_resources[] = {
	{
	.start = 0xFFC02000,
	.end = 0xFFC020FF,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = IRQ_UART1_RX,
	.end = IRQ_UART1_RX+1,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = CH_UART1_RX,
	.end = CH_UART1_RX+1,
	.flags = IORESOURCE_DMA,
	},
	};

	static struct platform_device bfin_sir1_device = {
	.name = "bfin_sir",
	.id = 1,
	.num_resources = ARRAY_SIZE(bfin_sir1_resources),
	.resource = bfin_sir1_resources,
	};
	#endif
	#endif

	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	static struct resource bfin_twi0_resource[] = {
	[0] = {
	.start = TWI0_REGBASE,
	.end = TWI0_REGBASE + 0xFF,
	.flags = IORESOURCE_MEM,
	},
	[1] = {
	.start = IRQ_TWI,
	.end = IRQ_TWI,
	.flags = IORESOURCE_IRQ,
	},
	};

	static struct platform_device i2c_bfin_twi_device = {
	.name = "i2c-bfin-twi",
	.id = 0,
	.num_resources = ARRAY_SIZE(bfin_twi0_resource),
	.resource = bfin_twi0_resource,
	};
	#endif

	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	static struct platform_device bfin_sport0_uart_device = {
	.name = "bfin-sport-uart",
	.id = 0,
	};

	static struct platform_device bfin_sport1_uart_device = {
	.name = "bfin-sport-uart",
	.id = 1,
	};
	#endif

	static struct platform_device *minotaur_devices[] __initdata = {
	#if defined(CONFIG_BFIN_CFPCMCIA) \|\| defined(CONFIG_BFIN_CFPCMCIA_MODULE)
	&bfin_pcmcia_cf_device,
	#endif

	#if defined(CONFIG_RTC_DRV_BFIN) \|\| defined(CONFIG_RTC_DRV_BFIN_MODULE)
	&rtc_device,
	#endif

	#if defined(CONFIG_BFIN_MAC) \|\| defined(CONFIG_BFIN_MAC_MODULE)
	&bfin_mii_bus,
	&bfin_mac_device,
	#endif

	#if defined(CONFIG_USB_NET2272) \|\| defined(CONFIG_USB_NET2272_MODULE)
	&net2272_bfin_device,
	#endif

	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	&bfin_spi0_device,
	#endif

	#if defined(CONFIG_SERIAL_BFIN) \|\| defined(CONFIG_SERIAL_BFIN_MODULE)
	&bfin_uart_device,
	#endif

	#if defined(CONFIG_BFIN_SIR) \|\| defined(CONFIG_BFIN_SIR_MODULE)
	#ifdef CONFIG_BFIN_SIR0
	&bfin_sir0_device,
	#endif
	#ifdef CONFIG_BFIN_SIR1
	&bfin_sir1_device,
	#endif
	#endif

	#if defined(CONFIG_I2C_BLACKFIN_TWI) \|\| defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
	&i2c_bfin_twi_device,
	#endif

	#if defined(CONFIG_SERIAL_BFIN_SPORT) \|\| defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
	&bfin_sport0_uart_device,
	&bfin_sport1_uart_device,
	#endif

	};

	static int __init minotaur_init(void)
	{
	printk(KERN_INFO "%s(): registering device resources\n", __func__);
	platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
	#if defined(CONFIG_SPI_BFIN) \|\| defined(CONFIG_SPI_BFIN_MODULE)
	spi_register_board_info(bfin_spi_board_info,
	ARRAY_SIZE(bfin_spi_board_info));
	#endif

	return 0;
	}

	arch_initcall(minotaur_init);

	void native_machine_restart(char *cmd)
	{
	/* workaround reboot hang when booting from SPI */
	if ((bfin_read_SYSCR() & 0x7) == 0x3)
	bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
	}