| ST Microelectronics Nomadik SRC System Reset and Control |
| |
| This binding uses the common clock binding: |
| Documentation/devicetree/bindings/clock/clock-bindings.txt |
| |
| The Nomadik SRC controller is responsible of controlling chrystals, |
| PLLs and clock gates. |
| |
| Required properties for the SRC node: |
| - compatible: must be "stericsson,nomadik-src" |
| - reg: must contain the SRC register base and size |
| |
| Optional properties for the SRC node: |
| - disable-sxtalo: if present this will disable the SXTALO |
| i.e. the driver output for the slow 32kHz chrystal, if the |
| board has its own circuitry for providing this oscillator |
| - disable-mxtal: if present this will disable the MXTALO, |
| i.e. the driver output for the main (~19.2 MHz) chrystal, |
| if the board has its own circuitry for providing this |
| osciallator |
| |
| |
| PLL nodes: these nodes represent the two PLLs on the system, |
| which should both have the main chrystal, represented as a |
| fixed frequency clock, as parent. |
| |
| Required properties for the two PLL nodes: |
| - compatible: must be "st,nomadik-pll-clock" |
| - clock-cells: must be 0 |
| - clock-id: must be 1 or 2 for PLL1 and PLL2 respectively |
| - clocks: this clock will have main chrystal as parent |
| |
| |
| HCLK nodes: these represent the clock gates on individual |
| lines from the HCLK clock tree and the gate for individual |
| lines from the PCLK clock tree. |
| |
| Requires properties for the HCLK nodes: |
| - compatible: must be "st,nomadik-hclk-clock" |
| - clock-cells: must be 0 |
| - clock-id: must be the clock ID from 0 to 63 according to |
| this table: |
| |
| 0: HCLKDMA0 |
| 1: HCLKSMC |
| 2: HCLKSDRAM |
| 3: HCLKDMA1 |
| 4: HCLKCLCD |
| 5: PCLKIRDA |
| 6: PCLKSSP |
| 7: PCLKUART0 |
| 8: PCLKSDI |
| 9: PCLKI2C0 |
| 10: PCLKI2C1 |
| 11: PCLKUART1 |
| 12: PCLMSP0 |
| 13: HCLKUSB |
| 14: HCLKDIF |
| 15: HCLKSAA |
| 16: HCLKSVA |
| 17: PCLKHSI |
| 18: PCLKXTI |
| 19: PCLKUART2 |
| 20: PCLKMSP1 |
| 21: PCLKMSP2 |
| 22: PCLKOWM |
| 23: HCLKHPI |
| 24: PCLKSKE |
| 25: PCLKHSEM |
| 26: HCLK3D |
| 27: HCLKHASH |
| 28: HCLKCRYP |
| 29: PCLKMSHC |
| 30: HCLKUSBM |
| 31: HCLKRNG |
| (32, 33, 34, 35 RESERVED) |
| 36: CLDCLK |
| 37: IRDACLK |
| 38: SSPICLK |
| 39: UART0CLK |
| 40: SDICLK |
| 41: I2C0CLK |
| 42: I2C1CLK |
| 43: UART1CLK |
| 44: MSPCLK0 |
| 45: USBCLK |
| 46: DIFCLK |
| 47: IPI2CCLK |
| 48: IPBMCCLK |
| 49: HSICLKRX |
| 50: HSICLKTX |
| 51: UART2CLK |
| 52: MSPCLK1 |
| 53: MSPCLK2 |
| 54: OWMCLK |
| (55 RESERVED) |
| 56: SKECLK |
| (57 RESERVED) |
| 58: 3DCLK |
| 59: PCLKMSP3 |
| 60: MSPCLK3 |
| 61: MSHCCLK |
| 62: USBMCLK |
| 63: RNGCCLK |