| /dts-v1/; |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| model = "Qualcomm MSM8960 CDP"; |
| compatible = "qcom,msm8960-cdp", "qcom,msm8960"; |
| interrupt-parent = <&intc>; |
| |
| intc: interrupt-controller@2000000 { |
| compatible = "qcom,msm-qgic2"; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| reg = < 0x02000000 0x1000 >, |
| < 0x02002000 0x1000 >; |
| }; |
| |
| timer@200a000 { |
| compatible = "qcom,kpss-timer", "qcom,msm-timer"; |
| interrupts = <1 1 0x301>, |
| <1 2 0x301>, |
| <1 3 0x301>; |
| reg = <0x0200a000 0x100>; |
| clock-frequency = <27000000>, |
| <32768>; |
| cpu-offset = <0x80000>; |
| }; |
| |
| msmgpio: gpio@fd510000 { |
| compatible = "qcom,msm-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| ngpio = <150>; |
| interrupts = <0 32 0x4>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0xfd510000 0x4000>; |
| }; |
| |
| serial@16440000 { |
| compatible = "qcom,msm-hsuart", "qcom,msm-uart"; |
| reg = <0x16440000 0x1000>, |
| <0x16400000 0x1000>; |
| interrupts = <0 154 0x0>; |
| }; |
| |
| qcom,ssbi@500000 { |
| compatible = "qcom,ssbi"; |
| reg = <0x500000 0x1000>; |
| qcom,controller-type = "pmic-arbiter"; |
| }; |
| }; |