| /* |
| * SMP support for R-Mobile / SH-Mobile - r8a7779 portion |
| * |
| * Copyright (C) 2011 Renesas Solutions Corp. |
| * Copyright (C) 2011 Magnus Damm |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; version 2 of the License. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| #include <linux/kernel.h> |
| #include <linux/init.h> |
| #include <linux/smp.h> |
| #include <linux/spinlock.h> |
| #include <linux/io.h> |
| #include <linux/delay.h> |
| #include <linux/soc/renesas/rcar-sysc.h> |
| |
| #include <asm/cacheflush.h> |
| #include <asm/smp_plat.h> |
| #include <asm/smp_scu.h> |
| |
| #include "common.h" |
| #include "r8a7779.h" |
| |
| #define AVECR IOMEM(0xfe700040) |
| #define R8A7779_SCU_BASE 0xf0000000 |
| |
| static const struct rcar_sysc_ch r8a7779_ch_cpu1 = { |
| .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ |
| .chan_bit = 1, /* ARM1 */ |
| .isr_bit = 1, /* ARM1 */ |
| }; |
| |
| static const struct rcar_sysc_ch r8a7779_ch_cpu2 = { |
| .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ |
| .chan_bit = 2, /* ARM2 */ |
| .isr_bit = 2, /* ARM2 */ |
| }; |
| |
| static const struct rcar_sysc_ch r8a7779_ch_cpu3 = { |
| .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ |
| .chan_bit = 3, /* ARM3 */ |
| .isr_bit = 3, /* ARM3 */ |
| }; |
| |
| static const struct rcar_sysc_ch * const r8a7779_ch_cpu[4] = { |
| [1] = &r8a7779_ch_cpu1, |
| [2] = &r8a7779_ch_cpu2, |
| [3] = &r8a7779_ch_cpu3, |
| }; |
| |
| static int r8a7779_platform_cpu_kill(unsigned int cpu) |
| { |
| const struct rcar_sysc_ch *ch = NULL; |
| int ret = -EIO; |
| |
| cpu = cpu_logical_map(cpu); |
| |
| if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) |
| ch = r8a7779_ch_cpu[cpu]; |
| |
| if (ch) |
| ret = rcar_sysc_power_down(ch); |
| |
| return ret ? ret : 1; |
| } |
| |
| static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) |
| { |
| const struct rcar_sysc_ch *ch = NULL; |
| unsigned int lcpu = cpu_logical_map(cpu); |
| int ret; |
| |
| if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu)) |
| ch = r8a7779_ch_cpu[lcpu]; |
| |
| if (ch) |
| ret = rcar_sysc_power_up(ch); |
| else |
| ret = -EIO; |
| |
| return ret; |
| } |
| |
| static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) |
| { |
| /* Map the reset vector (in headsmp-scu.S, headsmp.S) */ |
| __raw_writel(__pa(shmobile_boot_vector), AVECR); |
| |
| /* setup r8a7779 specific SCU bits */ |
| shmobile_smp_scu_prepare_cpus(R8A7779_SCU_BASE, max_cpus); |
| |
| r8a7779_pm_init(); |
| |
| /* power off secondary CPUs */ |
| r8a7779_platform_cpu_kill(1); |
| r8a7779_platform_cpu_kill(2); |
| r8a7779_platform_cpu_kill(3); |
| } |
| |
| #ifdef CONFIG_HOTPLUG_CPU |
| static int r8a7779_cpu_kill(unsigned int cpu) |
| { |
| if (shmobile_smp_scu_cpu_kill(cpu)) |
| return r8a7779_platform_cpu_kill(cpu); |
| |
| return 0; |
| } |
| #endif /* CONFIG_HOTPLUG_CPU */ |
| |
| const struct smp_operations r8a7779_smp_ops __initconst = { |
| .smp_prepare_cpus = r8a7779_smp_prepare_cpus, |
| .smp_boot_secondary = r8a7779_boot_secondary, |
| #ifdef CONFIG_HOTPLUG_CPU |
| .cpu_die = shmobile_smp_scu_cpu_die, |
| .cpu_kill = r8a7779_cpu_kill, |
| #endif |
| }; |