| /dts-v1/; |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| model = "Qualcomm MSM8660 SURF"; |
| compatible = "qcom,msm8660-surf", "qcom,msm8660"; |
| interrupt-parent = <&intc>; |
| |
| intc: interrupt-controller@2080000 { |
| compatible = "qcom,msm-8660-qgic"; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| reg = < 0x02080000 0x1000 >, |
| < 0x02081000 0x1000 >; |
| }; |
| |
| timer@2000004 { |
| compatible = "qcom,msm-gpt", "qcom,msm-timer"; |
| interrupts = <1 1 0x301>; |
| reg = <0x02000004 0x10>; |
| clock-frequency = <32768>; |
| cpu-offset = <0x40000>; |
| }; |
| |
| timer@2000024 { |
| compatible = "qcom,msm-dgt", "qcom,msm-timer"; |
| interrupts = <1 0 0x301>; |
| reg = <0x02000024 0x10>, |
| <0x02000034 0x4>; |
| clock-frequency = <6750000>; |
| cpu-offset = <0x40000>; |
| }; |
| |
| serial@19c400000 { |
| compatible = "qcom,msm-hsuart", "qcom,msm-uart"; |
| reg = <0x19c40000 0x1000>, |
| <0x19c00000 0x1000>; |
| interrupts = <0 195 0x0>; |
| }; |
| |
| qcom,ssbi@500000 { |
| compatible = "qcom,ssbi"; |
| reg = <0x500000 0x1000>; |
| qcom,controller-type = "pmic-arbiter"; |
| }; |
| }; |