| Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 2 | if (BF533 || BF532 || BF531) |
| 3 | |
| Mike Frysinger | 4f25eb8 | 2007-11-15 20:49:44 +0800 | [diff] [blame] | 4 | source "arch/blackfin/mach-bf533/boards/Kconfig" |
| 5 | |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 6 | menu "BF533/2/1 Specific Configuration" |
| 7 | |
| 8 | comment "Interrupt Priority Assignment" |
| 9 | menu "Priority" |
| 10 | |
| 11 | config UART_ERROR |
| 12 | int "UART ERROR" |
| 13 | default 7 |
| 14 | config SPORT0_ERROR |
| 15 | int "SPORT0 ERROR" |
| 16 | default 7 |
| 17 | config SPI_ERROR |
| 18 | int "SPI ERROR" |
| 19 | default 7 |
| 20 | config SPORT1_ERROR |
| 21 | int "SPORT1 ERROR" |
| 22 | default 7 |
| 23 | config PPI_ERROR |
| 24 | int "PPI ERROR" |
| 25 | default 7 |
| 26 | config DMA_ERROR |
| 27 | int "DMA ERROR" |
| 28 | default 7 |
| 29 | config PLLWAKE_ERROR |
| 30 | int "PLL WAKEUP ERROR" |
| 31 | default 7 |
| 32 | |
| 33 | config RTC_ERROR |
| 34 | int "RTC ERROR" |
| 35 | default 8 |
| 36 | config DMA0_PPI |
| 37 | int "DMA0 PPI" |
| 38 | default 8 |
| 39 | |
| 40 | config DMA1_SPORT0RX |
| 41 | int "DMA1 (SPORT0 RX)" |
| 42 | default 9 |
| 43 | config DMA2_SPORT0TX |
| 44 | int "DMA2 (SPORT0 TX)" |
| 45 | default 9 |
| 46 | config DMA3_SPORT1RX |
| 47 | int "DMA3 (SPORT1 RX)" |
| 48 | default 9 |
| 49 | config DMA4_SPORT1TX |
| 50 | int "DMA4 (SPORT1 TX)" |
| 51 | default 9 |
| 52 | config DMA5_SPI |
| 53 | int "DMA5 (SPI)" |
| 54 | default 10 |
| 55 | config DMA6_UARTRX |
| 56 | int "DMA6 (UART0 RX)" |
| 57 | default 10 |
| 58 | config DMA7_UARTTX |
| 59 | int "DMA7 (UART0 TX)" |
| 60 | default 10 |
| 61 | config TIMER0 |
| 62 | int "TIMER0" |
| Graf Yang | 1fa9be7 | 2009-05-15 11:01:59 +0000 | [diff] [blame] | 63 | default 7 if TICKSOURCE_GPTMR0 |
| Yi Li | 6a01f23 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 64 | default 8 |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 65 | config TIMER1 |
| 66 | int "TIMER1" |
| 67 | default 11 |
| 68 | config TIMER2 |
| 69 | int "TIMER2" |
| 70 | default 11 |
| 71 | config PFA |
| 72 | int "PF Interrupt A" |
| 73 | default 12 |
| 74 | config PFB |
| 75 | int "PF Interrupt B" |
| 76 | default 12 |
| 77 | config MEMDMA0 |
| 78 | int "MEMORY DMA0" |
| 79 | default 13 |
| 80 | config MEMDMA1 |
| 81 | int "MEMORY DMA1" |
| 82 | default 13 |
| 83 | config WDTIMER |
| 84 | int "WATCH DOG TIMER" |
| 85 | default 13 |
| 86 | |
| 87 | help |
| 88 | Enter the priority numbers between 7-13 ONLY. Others are Reserved. |
| 89 | This applies to all the above. It is not recommended to assign the |
| 90 | highest priority number 7 to UART or any other device. |
| 91 | |
| 92 | endmenu |
| 93 | |
| 94 | endmenu |
| 95 | |
| 96 | endif |