blob: 894293c598db62fe6b23a365d048c8a6225a8285 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 *
3 * Trampoline.S Derived from Setup.S by Linus Torvalds
4 *
5 * 4 Jan 1997 Michael Chastain: changed to gnu as.
Vivek Goyal90b1c202007-05-02 19:27:07 +02006 * 15 Sept 2005 Eric Biederman: 64bit PIC support
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * Entry: CS:IP point to the start of our code, we are
9 * in real mode with no stack, but the rest of the
10 * trampoline page to make our stack and everything else
11 * is a mystery.
12 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070013 * On entry to trampoline_data, the processor is in real mode
14 * with 16-bit addressing and 16-bit data. CS has some value
15 * and IP is zero. Thus, data addresses need to be absolute
16 * (no relocation) and are taken with regard to r_base.
17 *
Vivek Goyal90b1c202007-05-02 19:27:07 +020018 * With the addition of trampoline_level4_pgt this code can
19 * now enter a 64bit kernel that lives at arbitrary 64bit
20 * physical addresses.
21 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 * If you work on this file, check the object module with objdump
23 * --full-contents --reloc to make sure there are no relocation
Vivek Goyal90b1c202007-05-02 19:27:07 +020024 * entries.
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 */
26
27#include <linux/linkage.h>
Vivek Goyal90b1c202007-05-02 19:27:07 +020028#include <asm/pgtable.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <asm/page.h>
Vivek Goyal90b1c202007-05-02 19:27:07 +020030#include <asm/msr.h>
31#include <asm/segment.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
Jan Beulich121d7bf2007-10-17 18:04:37 +020033.section .rodata, "a", @progbits
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
35.code16
36
37ENTRY(trampoline_data)
38r_base = .
Vivek Goyal90b1c202007-05-02 19:27:07 +020039 cli # We should be safe anyway
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 wbinvd
41 mov %cs, %ax # Code and data in the same place
42 mov %ax, %ds
Vivek Goyal90b1c202007-05-02 19:27:07 +020043 mov %ax, %es
44 mov %ax, %ss
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
47 movl $0xA5A5A5A5, trampoline_data - r_base
48 # write marker for master knows we're running
49
Vivek Goyal90b1c202007-05-02 19:27:07 +020050 # Setup stack
51 movw $(trampoline_stack_end - r_base), %sp
52
53 call verify_cpu # Verify the cpu supports long mode
Vivek Goyala4831e02007-05-02 19:27:08 +020054 testl %eax, %eax # Check for return code
55 jnz no_longmode
Vivek Goyal90b1c202007-05-02 19:27:07 +020056
57 mov %cs, %ax
58 movzx %ax, %esi # Find the 32bit trampoline location
59 shll $4, %esi
60
61 # Fixup the vectors
62 addl %esi, startup_32_vector - r_base
63 addl %esi, startup_64_vector - r_base
64 addl %esi, tgdt + 2 - r_base # Fixup the gdt pointer
65
Vivek Goyal983d5db2006-01-12 03:35:20 +010066 /*
67 * GDT tables in non default location kernel can be beyond 16MB and
68 * lgdt will not be able to load the address as in real mode default
69 * operand size is 16bit. Use lgdtl instead to force operand size
70 * to 32 bit.
71 */
72
Vivek Goyal90b1c202007-05-02 19:27:07 +020073 lidtl tidt - r_base # load idt with 0, 0
74 lgdtl tgdt - r_base # load gdt with whatever is appropriate
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
76 xor %ax, %ax
77 inc %ax # protected mode (PE) bit
78 lmsw %ax # into protected mode
Vivek Goyal90b1c202007-05-02 19:27:07 +020079
80 # flush prefetch and jump to startup_32
81 ljmpl *(startup_32_vector - r_base)
82
83 .code32
84 .balign 4
85startup_32:
86 movl $__KERNEL_DS, %eax # Initialize the %ds segment register
87 movl %eax, %ds
88
89 xorl %eax, %eax
90 btsl $5, %eax # Enable PAE mode
91 movl %eax, %cr4
92
93 # Setup trampoline 4 level pagetables
94 leal (trampoline_level4_pgt - r_base)(%esi), %eax
95 movl %eax, %cr3
96
97 movl $MSR_EFER, %ecx
98 movl $(1 << _EFER_LME), %eax # Enable Long Mode
99 xorl %edx, %edx
100 wrmsr
101
102 xorl %eax, %eax
103 btsl $31, %eax # Enable paging and in turn activate Long Mode
104 btsl $0, %eax # Enable protected mode
105 movl %eax, %cr0
106
107 /*
108 * At this point we're in long mode but in 32bit compatibility mode
109 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
110 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
111 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
112 */
113 ljmp *(startup_64_vector - r_base)(%esi)
114
115 .code64
116 .balign 4
117startup_64:
118 # Now jump into the kernel using virtual addresses
119 movq $secondary_startup_64, %rax
120 jmp *%rax
121
122 .code16
Vivek Goyal90b1c202007-05-02 19:27:07 +0200123no_longmode:
124 hlt
125 jmp no_longmode
Thomas Gleixnere0a84f62007-10-11 11:15:19 +0200126#include "verify_cpu_64.S"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127
128 # Careful these need to be in the same 64K segment as the above;
Vivek Goyal90b1c202007-05-02 19:27:07 +0200129tidt:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 .word 0 # idt limit = 0
131 .word 0, 0 # idt base = 0L
132
Vivek Goyal90b1c202007-05-02 19:27:07 +0200133 # Duplicate the global descriptor table
134 # so the kernel can live anywhere
135 .balign 4
136tgdt:
137 .short tgdt_end - tgdt # gdt limit
138 .long tgdt - r_base
139 .short 0
140 .quad 0x00cf9b000000ffff # __KERNEL32_CS
141 .quad 0x00af9b000000ffff # __KERNEL_CS
142 .quad 0x00cf93000000ffff # __KERNEL_DS
143tgdt_end:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144
Vivek Goyal90b1c202007-05-02 19:27:07 +0200145 .balign 4
146startup_32_vector:
147 .long startup_32 - r_base
148 .word __KERNEL32_CS, 0
149
150 .balign 4
151startup_64_vector:
152 .long startup_64 - r_base
153 .word __KERNEL_CS, 0
154
155trampoline_stack:
156 .org 0x1000
157trampoline_stack_end:
158ENTRY(trampoline_level4_pgt)
159 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
160 .fill 510,8,0
161 .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
162
163ENTRY(trampoline_end)