Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 1 | #ifndef _GEN_PV_LOCK_SLOWPATH |
| 2 | #error "do not include this file" |
| 3 | #endif |
| 4 | |
| 5 | #include <linux/hash.h> |
| 6 | #include <linux/bootmem.h> |
Waiman Long | cba77f0 | 2015-07-11 21:19:19 -0400 | [diff] [blame] | 7 | #include <linux/debug_locks.h> |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 8 | |
| 9 | /* |
| 10 | * Implement paravirt qspinlocks; the general idea is to halt the vcpus instead |
| 11 | * of spinning them. |
| 12 | * |
| 13 | * This relies on the architecture to provide two paravirt hypercalls: |
| 14 | * |
| 15 | * pv_wait(u8 *ptr, u8 val) -- suspends the vcpu if *ptr == val |
| 16 | * pv_kick(cpu) -- wakes a suspended vcpu |
| 17 | * |
| 18 | * Using these we implement __pv_queued_spin_lock_slowpath() and |
| 19 | * __pv_queued_spin_unlock() to replace native_queued_spin_lock_slowpath() and |
| 20 | * native_queued_spin_unlock(). |
| 21 | */ |
| 22 | |
| 23 | #define _Q_SLOW_VAL (3U << _Q_LOCKED_OFFSET) |
| 24 | |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 25 | /* |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 26 | * Queue Node Adaptive Spinning |
| 27 | * |
| 28 | * A queue node vCPU will stop spinning if the vCPU in the previous node is |
| 29 | * not running. The one lock stealing attempt allowed at slowpath entry |
| 30 | * mitigates the slight slowdown for non-overcommitted guest with this |
| 31 | * aggressive wait-early mechanism. |
| 32 | * |
| 33 | * The status of the previous node will be checked at fixed interval |
| 34 | * controlled by PV_PREV_CHECK_MASK. This is to ensure that we won't |
| 35 | * pound on the cacheline of the previous node too heavily. |
| 36 | */ |
| 37 | #define PV_PREV_CHECK_MASK 0xff |
| 38 | |
| 39 | /* |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 40 | * Queue node uses: vcpu_running & vcpu_halted. |
| 41 | * Queue head uses: vcpu_running & vcpu_hashed. |
| 42 | */ |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 43 | enum vcpu_state { |
| 44 | vcpu_running = 0, |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 45 | vcpu_halted, /* Used only in pv_wait_node */ |
| 46 | vcpu_hashed, /* = pv_hash'ed + vcpu_halted */ |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 47 | }; |
| 48 | |
| 49 | struct pv_node { |
| 50 | struct mcs_spinlock mcs; |
| 51 | struct mcs_spinlock __res[3]; |
| 52 | |
| 53 | int cpu; |
| 54 | u8 state; |
| 55 | }; |
| 56 | |
| 57 | /* |
Waiman Long | eaff0e7 | 2015-12-10 15:17:46 -0500 | [diff] [blame] | 58 | * Include queued spinlock statistics code |
| 59 | */ |
| 60 | #include "qspinlock_stat.h" |
| 61 | |
| 62 | /* |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 63 | * By replacing the regular queued_spin_trylock() with the function below, |
| 64 | * it will be called once when a lock waiter enter the PV slowpath before |
| 65 | * being queued. By allowing one lock stealing attempt here when the pending |
| 66 | * bit is off, it helps to reduce the performance impact of lock waiter |
| 67 | * preemption without the drawback of lock starvation. |
| 68 | */ |
| 69 | #define queued_spin_trylock(l) pv_queued_spin_steal_lock(l) |
| 70 | static inline bool pv_queued_spin_steal_lock(struct qspinlock *lock) |
| 71 | { |
| 72 | struct __qspinlock *l = (void *)lock; |
| 73 | |
Peter Zijlstra | 64a5e3c | 2016-07-14 14:26:11 +0200 | [diff] [blame] | 74 | if (!(atomic_read(&lock->val) & _Q_LOCKED_PENDING_MASK) && |
| 75 | (cmpxchg(&l->locked, 0, _Q_LOCKED_VAL) == 0)) { |
| 76 | qstat_inc(qstat_pv_lock_stealing, true); |
| 77 | return true; |
| 78 | } |
| 79 | |
| 80 | return false; |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 81 | } |
| 82 | |
| 83 | /* |
| 84 | * The pending bit is used by the queue head vCPU to indicate that it |
| 85 | * is actively spinning on the lock and no lock stealing is allowed. |
| 86 | */ |
| 87 | #if _Q_PENDING_BITS == 8 |
| 88 | static __always_inline void set_pending(struct qspinlock *lock) |
| 89 | { |
| 90 | struct __qspinlock *l = (void *)lock; |
| 91 | |
| 92 | WRITE_ONCE(l->pending, 1); |
| 93 | } |
| 94 | |
| 95 | static __always_inline void clear_pending(struct qspinlock *lock) |
| 96 | { |
| 97 | struct __qspinlock *l = (void *)lock; |
| 98 | |
| 99 | WRITE_ONCE(l->pending, 0); |
| 100 | } |
| 101 | |
| 102 | /* |
| 103 | * The pending bit check in pv_queued_spin_steal_lock() isn't a memory |
| 104 | * barrier. Therefore, an atomic cmpxchg() is used to acquire the lock |
| 105 | * just to be sure that it will get it. |
| 106 | */ |
| 107 | static __always_inline int trylock_clear_pending(struct qspinlock *lock) |
| 108 | { |
| 109 | struct __qspinlock *l = (void *)lock; |
| 110 | |
| 111 | return !READ_ONCE(l->locked) && |
| 112 | (cmpxchg(&l->locked_pending, _Q_PENDING_VAL, _Q_LOCKED_VAL) |
| 113 | == _Q_PENDING_VAL); |
| 114 | } |
| 115 | #else /* _Q_PENDING_BITS == 8 */ |
| 116 | static __always_inline void set_pending(struct qspinlock *lock) |
| 117 | { |
Peter Zijlstra | e37837f | 2016-04-18 01:01:27 +0200 | [diff] [blame] | 118 | atomic_or(_Q_PENDING_VAL, &lock->val); |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static __always_inline void clear_pending(struct qspinlock *lock) |
| 122 | { |
Peter Zijlstra | e37837f | 2016-04-18 01:01:27 +0200 | [diff] [blame] | 123 | atomic_andnot(_Q_PENDING_VAL, &lock->val); |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 124 | } |
| 125 | |
| 126 | static __always_inline int trylock_clear_pending(struct qspinlock *lock) |
| 127 | { |
| 128 | int val = atomic_read(&lock->val); |
| 129 | |
| 130 | for (;;) { |
| 131 | int old, new; |
| 132 | |
| 133 | if (val & _Q_LOCKED_MASK) |
| 134 | break; |
| 135 | |
| 136 | /* |
| 137 | * Try to clear pending bit & set locked bit |
| 138 | */ |
| 139 | old = val; |
| 140 | new = (val & ~_Q_PENDING_MASK) | _Q_LOCKED_VAL; |
| 141 | val = atomic_cmpxchg(&lock->val, old, new); |
| 142 | |
| 143 | if (val == old) |
| 144 | return 1; |
| 145 | } |
| 146 | return 0; |
| 147 | } |
| 148 | #endif /* _Q_PENDING_BITS == 8 */ |
| 149 | |
| 150 | /* |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 151 | * Lock and MCS node addresses hash table for fast lookup |
| 152 | * |
| 153 | * Hashing is done on a per-cacheline basis to minimize the need to access |
| 154 | * more than one cacheline. |
| 155 | * |
| 156 | * Dynamically allocate a hash table big enough to hold at least 4X the |
| 157 | * number of possible cpus in the system. Allocation is done on page |
| 158 | * granularity. So the minimum number of hash buckets should be at least |
| 159 | * 256 (64-bit) or 512 (32-bit) to fully utilize a 4k page. |
| 160 | * |
| 161 | * Since we should not be holding locks from NMI context (very rare indeed) the |
| 162 | * max load factor is 0.75, which is around the point where open addressing |
| 163 | * breaks down. |
| 164 | * |
| 165 | */ |
| 166 | struct pv_hash_entry { |
| 167 | struct qspinlock *lock; |
| 168 | struct pv_node *node; |
| 169 | }; |
| 170 | |
| 171 | #define PV_HE_PER_LINE (SMP_CACHE_BYTES / sizeof(struct pv_hash_entry)) |
| 172 | #define PV_HE_MIN (PAGE_SIZE / sizeof(struct pv_hash_entry)) |
| 173 | |
| 174 | static struct pv_hash_entry *pv_lock_hash; |
| 175 | static unsigned int pv_lock_hash_bits __read_mostly; |
| 176 | |
| 177 | /* |
| 178 | * Allocate memory for the PV qspinlock hash buckets |
| 179 | * |
| 180 | * This function should be called from the paravirt spinlock initialization |
| 181 | * routine. |
| 182 | */ |
| 183 | void __init __pv_init_lock_hash(void) |
| 184 | { |
| 185 | int pv_hash_size = ALIGN(4 * num_possible_cpus(), PV_HE_PER_LINE); |
| 186 | |
| 187 | if (pv_hash_size < PV_HE_MIN) |
| 188 | pv_hash_size = PV_HE_MIN; |
| 189 | |
| 190 | /* |
| 191 | * Allocate space from bootmem which should be page-size aligned |
| 192 | * and hence cacheline aligned. |
| 193 | */ |
| 194 | pv_lock_hash = alloc_large_system_hash("PV qspinlock", |
| 195 | sizeof(struct pv_hash_entry), |
| 196 | pv_hash_size, 0, HASH_EARLY, |
| 197 | &pv_lock_hash_bits, NULL, |
| 198 | pv_hash_size, pv_hash_size); |
| 199 | } |
| 200 | |
| 201 | #define for_each_hash_entry(he, offset, hash) \ |
| 202 | for (hash &= ~(PV_HE_PER_LINE - 1), he = &pv_lock_hash[hash], offset = 0; \ |
| 203 | offset < (1 << pv_lock_hash_bits); \ |
| 204 | offset++, he = &pv_lock_hash[(hash + offset) & ((1 << pv_lock_hash_bits) - 1)]) |
| 205 | |
| 206 | static struct qspinlock **pv_hash(struct qspinlock *lock, struct pv_node *node) |
| 207 | { |
| 208 | unsigned long offset, hash = hash_ptr(lock, pv_lock_hash_bits); |
| 209 | struct pv_hash_entry *he; |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 210 | int hopcnt = 0; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 211 | |
| 212 | for_each_hash_entry(he, offset, hash) { |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 213 | hopcnt++; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 214 | if (!cmpxchg(&he->lock, NULL, lock)) { |
| 215 | WRITE_ONCE(he->node, node); |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 216 | qstat_hop(hopcnt); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 217 | return &he->lock; |
| 218 | } |
| 219 | } |
| 220 | /* |
| 221 | * Hard assume there is a free entry for us. |
| 222 | * |
| 223 | * This is guaranteed by ensuring every blocked lock only ever consumes |
| 224 | * a single entry, and since we only have 4 nesting levels per CPU |
| 225 | * and allocated 4*nr_possible_cpus(), this must be so. |
| 226 | * |
| 227 | * The single entry is guaranteed by having the lock owner unhash |
| 228 | * before it releases. |
| 229 | */ |
| 230 | BUG(); |
| 231 | } |
| 232 | |
| 233 | static struct pv_node *pv_unhash(struct qspinlock *lock) |
| 234 | { |
| 235 | unsigned long offset, hash = hash_ptr(lock, pv_lock_hash_bits); |
| 236 | struct pv_hash_entry *he; |
| 237 | struct pv_node *node; |
| 238 | |
| 239 | for_each_hash_entry(he, offset, hash) { |
| 240 | if (READ_ONCE(he->lock) == lock) { |
| 241 | node = READ_ONCE(he->node); |
| 242 | WRITE_ONCE(he->lock, NULL); |
| 243 | return node; |
| 244 | } |
| 245 | } |
| 246 | /* |
| 247 | * Hard assume we'll find an entry. |
| 248 | * |
| 249 | * This guarantees a limited lookup time and is itself guaranteed by |
| 250 | * having the lock owner do the unhash -- IFF the unlock sees the |
| 251 | * SLOW flag, there MUST be a hash entry. |
| 252 | */ |
| 253 | BUG(); |
| 254 | } |
| 255 | |
| 256 | /* |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 257 | * Return true if when it is time to check the previous node which is not |
| 258 | * in a running state. |
| 259 | */ |
| 260 | static inline bool |
| 261 | pv_wait_early(struct pv_node *prev, int loop) |
| 262 | { |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 263 | if ((loop & PV_PREV_CHECK_MASK) != 0) |
| 264 | return false; |
| 265 | |
| 266 | return READ_ONCE(prev->state) != vcpu_running; |
| 267 | } |
| 268 | |
| 269 | /* |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 270 | * Initialize the PV part of the mcs_spinlock node. |
| 271 | */ |
| 272 | static void pv_init_node(struct mcs_spinlock *node) |
| 273 | { |
| 274 | struct pv_node *pn = (struct pv_node *)node; |
| 275 | |
| 276 | BUILD_BUG_ON(sizeof(struct pv_node) > 5*sizeof(struct mcs_spinlock)); |
| 277 | |
| 278 | pn->cpu = smp_processor_id(); |
| 279 | pn->state = vcpu_running; |
| 280 | } |
| 281 | |
| 282 | /* |
| 283 | * Wait for node->locked to become true, halt the vcpu after a short spin. |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 284 | * pv_kick_node() is used to set _Q_SLOW_VAL and fill in hash table on its |
| 285 | * behalf. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 286 | */ |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 287 | static void pv_wait_node(struct mcs_spinlock *node, struct mcs_spinlock *prev) |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 288 | { |
| 289 | struct pv_node *pn = (struct pv_node *)node; |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 290 | struct pv_node *pp = (struct pv_node *)prev; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 291 | int loop; |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 292 | bool wait_early; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 293 | |
Waiman Long | 08be8f6 | 2016-05-31 12:53:47 -0400 | [diff] [blame] | 294 | for (;;) { |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 295 | for (wait_early = false, loop = SPIN_THRESHOLD; loop; loop--) { |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 296 | if (READ_ONCE(node->locked)) |
| 297 | return; |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 298 | if (pv_wait_early(pp, loop)) { |
| 299 | wait_early = true; |
| 300 | break; |
| 301 | } |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 302 | cpu_relax(); |
| 303 | } |
| 304 | |
| 305 | /* |
| 306 | * Order pn->state vs pn->locked thusly: |
| 307 | * |
| 308 | * [S] pn->state = vcpu_halted [S] next->locked = 1 |
| 309 | * MB MB |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 310 | * [L] pn->locked [RmW] pn->state = vcpu_hashed |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 311 | * |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 312 | * Matches the cmpxchg() from pv_kick_node(). |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 313 | */ |
Peter Zijlstra | b92b8b3 | 2015-05-12 10:51:55 +0200 | [diff] [blame] | 314 | smp_store_mb(pn->state, vcpu_halted); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 315 | |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 316 | if (!READ_ONCE(node->locked)) { |
| 317 | qstat_inc(qstat_pv_wait_node, true); |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 318 | qstat_inc(qstat_pv_wait_early, wait_early); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 319 | pv_wait(&pn->state, vcpu_halted); |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 320 | } |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 321 | |
| 322 | /* |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 323 | * If pv_kick_node() changed us to vcpu_hashed, retain that |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 324 | * value so that pv_wait_head_or_lock() knows to not also try |
| 325 | * to hash this lock. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 326 | */ |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 327 | cmpxchg(&pn->state, vcpu_halted, vcpu_running); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 328 | |
| 329 | /* |
| 330 | * If the locked flag is still not set after wakeup, it is a |
| 331 | * spurious wakeup and the vCPU should wait again. However, |
| 332 | * there is a pretty high overhead for CPU halting and kicking. |
| 333 | * So it is better to spin for a while in the hope that the |
| 334 | * MCS lock will be released soon. |
| 335 | */ |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 336 | qstat_inc(qstat_pv_spurious_wakeup, !READ_ONCE(node->locked)); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 337 | } |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 338 | |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 339 | /* |
| 340 | * By now our node->locked should be 1 and our caller will not actually |
| 341 | * spin-wait for it. We do however rely on our caller to do a |
| 342 | * load-acquire for us. |
| 343 | */ |
| 344 | } |
| 345 | |
| 346 | /* |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 347 | * Called after setting next->locked = 1 when we're the lock owner. |
| 348 | * |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 349 | * Instead of waking the waiters stuck in pv_wait_node() advance their state |
| 350 | * such that they're waiting in pv_wait_head_or_lock(), this avoids a |
| 351 | * wake/sleep cycle. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 352 | */ |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 353 | static void pv_kick_node(struct qspinlock *lock, struct mcs_spinlock *node) |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 354 | { |
| 355 | struct pv_node *pn = (struct pv_node *)node; |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 356 | struct __qspinlock *l = (void *)lock; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 357 | |
| 358 | /* |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 359 | * If the vCPU is indeed halted, advance its state to match that of |
| 360 | * pv_wait_node(). If OTOH this fails, the vCPU was running and will |
| 361 | * observe its next->locked value and advance itself. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 362 | * |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 363 | * Matches with smp_store_mb() and cmpxchg() in pv_wait_node() |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 364 | */ |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 365 | if (cmpxchg(&pn->state, vcpu_halted, vcpu_hashed) != vcpu_halted) |
| 366 | return; |
| 367 | |
| 368 | /* |
| 369 | * Put the lock into the hash table and set the _Q_SLOW_VAL. |
| 370 | * |
| 371 | * As this is the same vCPU that will check the _Q_SLOW_VAL value and |
| 372 | * the hash table later on at unlock time, no atomic instruction is |
| 373 | * needed. |
| 374 | */ |
| 375 | WRITE_ONCE(l->locked, _Q_SLOW_VAL); |
| 376 | (void)pv_hash(lock, pn); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 377 | } |
| 378 | |
| 379 | /* |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 380 | * Wait for l->locked to become clear and acquire the lock; |
| 381 | * halt the vcpu after a short spin. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 382 | * __pv_queued_spin_unlock() will wake us. |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 383 | * |
| 384 | * The current value of the lock will be returned for additional processing. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 385 | */ |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 386 | static u32 |
| 387 | pv_wait_head_or_lock(struct qspinlock *lock, struct mcs_spinlock *node) |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 388 | { |
| 389 | struct pv_node *pn = (struct pv_node *)node; |
| 390 | struct __qspinlock *l = (void *)lock; |
| 391 | struct qspinlock **lp = NULL; |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 392 | int waitcnt = 0; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 393 | int loop; |
| 394 | |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 395 | /* |
| 396 | * If pv_kick_node() already advanced our state, we don't need to |
| 397 | * insert ourselves into the hash table anymore. |
| 398 | */ |
| 399 | if (READ_ONCE(pn->state) == vcpu_hashed) |
| 400 | lp = (struct qspinlock **)1; |
| 401 | |
Waiman Long | 32d6251 | 2015-12-10 15:17:45 -0500 | [diff] [blame] | 402 | /* |
| 403 | * Tracking # of slowpath locking operations |
| 404 | */ |
| 405 | qstat_inc(qstat_pv_lock_slowpath, true); |
| 406 | |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 407 | for (;; waitcnt++) { |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 408 | /* |
Waiman Long | cd0272f | 2015-11-09 19:09:27 -0500 | [diff] [blame] | 409 | * Set correct vCPU state to be used by queue node wait-early |
| 410 | * mechanism. |
| 411 | */ |
| 412 | WRITE_ONCE(pn->state, vcpu_running); |
| 413 | |
| 414 | /* |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 415 | * Set the pending bit in the active lock spinning loop to |
| 416 | * disable lock stealing before attempting to acquire the lock. |
| 417 | */ |
| 418 | set_pending(lock); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 419 | for (loop = SPIN_THRESHOLD; loop; loop--) { |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 420 | if (trylock_clear_pending(lock)) |
| 421 | goto gotlock; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 422 | cpu_relax(); |
| 423 | } |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 424 | clear_pending(lock); |
| 425 | |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 426 | |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 427 | if (!lp) { /* ONCE */ |
| 428 | lp = pv_hash(lock, pn); |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 429 | |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 430 | /* |
Will Deacon | 3b3fdf1 | 2015-07-13 16:58:30 +0100 | [diff] [blame] | 431 | * We must hash before setting _Q_SLOW_VAL, such that |
| 432 | * when we observe _Q_SLOW_VAL in __pv_queued_spin_unlock() |
| 433 | * we'll be sure to be able to observe our hash entry. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 434 | * |
Will Deacon | 3b3fdf1 | 2015-07-13 16:58:30 +0100 | [diff] [blame] | 435 | * [S] <hash> [Rmw] l->locked == _Q_SLOW_VAL |
| 436 | * MB RMB |
| 437 | * [RmW] l->locked = _Q_SLOW_VAL [L] <unhash> |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 438 | * |
Will Deacon | 3b3fdf1 | 2015-07-13 16:58:30 +0100 | [diff] [blame] | 439 | * Matches the smp_rmb() in __pv_queued_spin_unlock(). |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 440 | */ |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 441 | if (xchg(&l->locked, _Q_SLOW_VAL) == 0) { |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 442 | /* |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 443 | * The lock was free and now we own the lock. |
| 444 | * Change the lock value back to _Q_LOCKED_VAL |
| 445 | * and unhash the table. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 446 | */ |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 447 | WRITE_ONCE(l->locked, _Q_LOCKED_VAL); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 448 | WRITE_ONCE(*lp, NULL); |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 449 | goto gotlock; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 450 | } |
| 451 | } |
Wanpeng Li | 229ce63 | 2016-07-14 16:15:56 +0800 | [diff] [blame] | 452 | WRITE_ONCE(pn->state, vcpu_hashed); |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 453 | qstat_inc(qstat_pv_wait_head, true); |
| 454 | qstat_inc(qstat_pv_wait_again, waitcnt); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 455 | pv_wait(&l->locked, _Q_SLOW_VAL); |
| 456 | |
| 457 | /* |
Waiman Long | 08be8f6 | 2016-05-31 12:53:47 -0400 | [diff] [blame] | 458 | * Because of lock stealing, the queue head vCPU may not be |
| 459 | * able to acquire the lock before it has to wait again. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 460 | */ |
| 461 | } |
| 462 | |
| 463 | /* |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 464 | * The cmpxchg() or xchg() call before coming here provides the |
| 465 | * acquire semantics for locking. The dummy ORing of _Q_LOCKED_VAL |
| 466 | * here is to indicate to the compiler that the value will always |
| 467 | * be nozero to enable better code optimization. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 468 | */ |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 469 | gotlock: |
| 470 | return (u32)(atomic_read(&lock->val) | _Q_LOCKED_VAL); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 471 | } |
| 472 | |
| 473 | /* |
Waiman Long | d780453 | 2015-11-09 19:09:24 -0500 | [diff] [blame] | 474 | * PV versions of the unlock fastpath and slowpath functions to be used |
| 475 | * instead of queued_spin_unlock(). |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 476 | */ |
Waiman Long | d780453 | 2015-11-09 19:09:24 -0500 | [diff] [blame] | 477 | __visible void |
| 478 | __pv_queued_spin_unlock_slowpath(struct qspinlock *lock, u8 locked) |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 479 | { |
| 480 | struct __qspinlock *l = (void *)lock; |
| 481 | struct pv_node *node; |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 482 | |
Peter Zijlstra | 0b792bf | 2015-07-21 12:13:43 +0200 | [diff] [blame] | 483 | if (unlikely(locked != _Q_SLOW_VAL)) { |
| 484 | WARN(!debug_locks_silent, |
| 485 | "pvqspinlock: lock 0x%lx has corrupted value 0x%x!\n", |
| 486 | (unsigned long)lock, atomic_read(&lock->val)); |
Waiman Long | cba77f0 | 2015-07-11 21:19:19 -0400 | [diff] [blame] | 487 | return; |
| 488 | } |
| 489 | |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 490 | /* |
Will Deacon | 3b3fdf1 | 2015-07-13 16:58:30 +0100 | [diff] [blame] | 491 | * A failed cmpxchg doesn't provide any memory-ordering guarantees, |
| 492 | * so we need a barrier to order the read of the node data in |
| 493 | * pv_unhash *after* we've read the lock being _Q_SLOW_VAL. |
| 494 | * |
Waiman Long | 1c4941f | 2015-11-10 16:18:56 -0500 | [diff] [blame] | 495 | * Matches the cmpxchg() in pv_wait_head_or_lock() setting _Q_SLOW_VAL. |
Will Deacon | 3b3fdf1 | 2015-07-13 16:58:30 +0100 | [diff] [blame] | 496 | */ |
| 497 | smp_rmb(); |
| 498 | |
| 499 | /* |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 500 | * Since the above failed to release, this must be the SLOW path. |
| 501 | * Therefore start by looking up the blocked node and unhashing it. |
| 502 | */ |
| 503 | node = pv_unhash(lock); |
| 504 | |
| 505 | /* |
| 506 | * Now that we have a reference to the (likely) blocked pv_node, |
| 507 | * release the lock. |
| 508 | */ |
| 509 | smp_store_release(&l->locked, 0); |
| 510 | |
| 511 | /* |
| 512 | * At this point the memory pointed at by lock can be freed/reused, |
| 513 | * however we can still use the pv_node to kick the CPU. |
Waiman Long | 75d2270 | 2015-07-11 16:36:52 -0400 | [diff] [blame] | 514 | * The other vCPU may not really be halted, but kicking an active |
| 515 | * vCPU is harmless other than the additional latency in completing |
| 516 | * the unlock. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 517 | */ |
Waiman Long | 45e898b | 2015-11-09 19:09:25 -0500 | [diff] [blame] | 518 | qstat_inc(qstat_pv_kick_unlock, true); |
Waiman Long | 93edc8b | 2015-09-11 14:37:34 -0400 | [diff] [blame] | 519 | pv_kick(node->cpu); |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 520 | } |
Waiman Long | d780453 | 2015-11-09 19:09:24 -0500 | [diff] [blame] | 521 | |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 522 | /* |
| 523 | * Include the architecture specific callee-save thunk of the |
| 524 | * __pv_queued_spin_unlock(). This thunk is put together with |
Waiman Long | d780453 | 2015-11-09 19:09:24 -0500 | [diff] [blame] | 525 | * __pv_queued_spin_unlock() to make the callee-save thunk and the real unlock |
| 526 | * function close to each other sharing consecutive instruction cachelines. |
| 527 | * Alternatively, architecture specific version of __pv_queued_spin_unlock() |
| 528 | * can be defined. |
Waiman Long | a23db28 | 2015-04-24 14:56:37 -0400 | [diff] [blame] | 529 | */ |
| 530 | #include <asm/qspinlock_paravirt.h> |
| 531 | |
Waiman Long | d780453 | 2015-11-09 19:09:24 -0500 | [diff] [blame] | 532 | #ifndef __pv_queued_spin_unlock |
| 533 | __visible void __pv_queued_spin_unlock(struct qspinlock *lock) |
| 534 | { |
| 535 | struct __qspinlock *l = (void *)lock; |
| 536 | u8 locked; |
| 537 | |
| 538 | /* |
| 539 | * We must not unlock if SLOW, because in that case we must first |
| 540 | * unhash. Otherwise it would be possible to have multiple @lock |
| 541 | * entries, which would be BAD. |
| 542 | */ |
Pan Xinhui | b193049 | 2016-09-19 05:23:52 -0400 | [diff] [blame] | 543 | locked = cmpxchg_release(&l->locked, _Q_LOCKED_VAL, 0); |
Waiman Long | d780453 | 2015-11-09 19:09:24 -0500 | [diff] [blame] | 544 | if (likely(locked == _Q_LOCKED_VAL)) |
| 545 | return; |
| 546 | |
| 547 | __pv_queued_spin_unlock_slowpath(lock, locked); |
| 548 | } |
| 549 | #endif /* __pv_queued_spin_unlock */ |