blob: dab4d393908c6323279ea61e1443f0e31961834f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * I/O SAPIC support.
3 *
4 * Copyright (C) 1999 Intel Corp.
5 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
6 * Copyright (C) 2000-2002 J.I. Lee <jung-ik.lee@intel.com>
7 * Copyright (C) 1999-2000, 2002-2003 Hewlett-Packard Co.
8 * David Mosberger-Tang <davidm@hpl.hp.com>
9 * Copyright (C) 1999 VA Linux Systems
10 * Copyright (C) 1999,2000 Walt Drummond <drummond@valinux.com>
11 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090012 * 00/04/19 D. Mosberger Rewritten to mirror more closely the x86 I/O
13 * APIC code. In particular, we now have separate
14 * handlers for edge and level triggered
15 * interrupts.
16 * 00/10/27 Asit Mallick, Goutham Rao <goutham.rao@intel.com> IRQ vector
17 * allocation PCI to vector mapping, shared PCI
18 * interrupts.
19 * 00/10/27 D. Mosberger Document things a bit more to make them more
20 * understandable. Clean up much of the old
21 * IOSAPIC cruft.
22 * 01/07/27 J.I. Lee PCI irq routing, Platform/Legacy interrupts
23 * and fixes for ACPI S5(SoftOff) support.
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 * 02/01/23 J.I. Lee iosapic pgm fixes for PCI irq routing from _PRT
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090025 * 02/01/07 E. Focht <efocht@ess.nec.de> Redirectable interrupt
26 * vectors in iosapic_set_affinity(),
27 * initializations for /proc/irq/#/smp_affinity
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 * 02/04/02 P. Diefenbaugh Cleaned up ACPI PCI IRQ routing.
29 * 02/04/18 J.I. Lee bug fix in iosapic_init_pci_irq
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090030 * 02/04/30 J.I. Lee bug fix in find_iosapic to fix ACPI PCI IRQ to
31 * IOSAPIC mapping error
Linus Torvalds1da177e2005-04-16 15:20:36 -070032 * 02/07/29 T. Kochi Allocate interrupt vectors dynamically
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090033 * 02/08/04 T. Kochi Cleaned up terminology (irq, global system
34 * interrupt, vector, etc.)
35 * 02/09/20 D. Mosberger Simplified by taking advantage of ACPI's
36 * pci_irq code.
Linus Torvalds1da177e2005-04-16 15:20:36 -070037 * 03/02/19 B. Helgaas Make pcat_compat system-wide, not per-IOSAPIC.
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090038 * Remove iosapic_address & gsi_base from
39 * external interfaces. Rationalize
40 * __init/__devinit attributes.
Linus Torvalds1da177e2005-04-16 15:20:36 -070041 * 04/12/04 Ashok Raj <ashok.raj@intel.com> Intel Corporation 2004
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090042 * Updated to work with irq migration necessary
43 * for CPU Hotplug
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 */
45/*
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090046 * Here is what the interrupt logic between a PCI device and the kernel looks
47 * like:
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090049 * (1) A PCI device raises one of the four interrupt pins (INTA, INTB, INTC,
50 * INTD). The device is uniquely identified by its bus-, and slot-number
51 * (the function number does not matter here because all functions share
52 * the same interrupt lines).
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090054 * (2) The motherboard routes the interrupt line to a pin on a IOSAPIC
55 * controller. Multiple interrupt lines may have to share the same
56 * IOSAPIC pin (if they're level triggered and use the same polarity).
57 * Each interrupt line has a unique Global System Interrupt (GSI) number
58 * which can be calculated as the sum of the controller's base GSI number
59 * and the IOSAPIC pin number to which the line connects.
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090061 * (3) The IOSAPIC uses an internal routing table entries (RTEs) to map the
62 * IOSAPIC pin into the IA-64 interrupt vector. This interrupt vector is then
63 * sent to the CPU.
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090065 * (4) The kernel recognizes an interrupt as an IRQ. The IRQ interface is
66 * used as architecture-independent interrupt handling mechanism in Linux.
67 * As an IRQ is a number, we have to have
68 * IA-64 interrupt vector number <-> IRQ number mapping. On smaller
69 * systems, we use one-to-one mapping between IA-64 vector and IRQ. A
70 * platform can implement platform_irq_to_vector(irq) and
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 * platform_local_vector_to_irq(vector) APIs to differentiate the mapping.
Tony Luck7f304912008-08-01 10:13:32 -070072 * Please see also arch/ia64/include/asm/hw_irq.h for those APIs.
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 *
74 * To sum up, there are three levels of mappings involved:
75 *
76 * PCI pin -> global system interrupt (GSI) -> IA-64 vector <-> IRQ
77 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090078 * Note: The term "IRQ" is loosely used everywhere in Linux kernel to
79 * describeinterrupts. Now we use "IRQ" only for Linux IRQ's. ISA IRQ
80 * (isa_irq) is the only exception in this source code.
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
83#include <linux/acpi.h>
84#include <linux/init.h>
85#include <linux/irq.h>
86#include <linux/kernel.h>
87#include <linux/list.h>
88#include <linux/pci.h>
89#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070090#include <linux/string.h>
Kenji Kaneshige24eeb562005-04-25 13:26:23 -070091#include <linux/bootmem.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
93#include <asm/delay.h>
94#include <asm/hw_irq.h>
95#include <asm/io.h>
96#include <asm/iosapic.h>
97#include <asm/machvec.h>
98#include <asm/processor.h>
99#include <asm/ptrace.h>
100#include <asm/system.h>
101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102#undef DEBUG_INTERRUPT_ROUTING
103
104#ifdef DEBUG_INTERRUPT_ROUTING
105#define DBG(fmt...) printk(fmt)
106#else
107#define DBG(fmt...)
108#endif
109
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900110#define NR_PREALLOCATE_RTE_ENTRIES \
111 (PAGE_SIZE / sizeof(struct iosapic_rte_info))
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700112#define RTE_PREALLOCATED (1)
113
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114static DEFINE_SPINLOCK(iosapic_lock);
115
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900116/*
117 * These tables map IA-64 vectors to the IOSAPIC pin that generates this
118 * vector.
119 */
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900120
121#define NO_REF_RTE 0
122
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900123static struct iosapic {
124 char __iomem *addr; /* base address of IOSAPIC */
125 unsigned int gsi_base; /* GSI base */
126 unsigned short num_rte; /* # of RTEs on this IOSAPIC */
127 int rtes_inuse; /* # of RTEs in use on this IOSAPIC */
128#ifdef CONFIG_NUMA
129 unsigned short node; /* numa node association via pxm */
130#endif
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900131 spinlock_t lock; /* lock for indirect reg access */
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900132} iosapic_lists[NR_IOSAPICS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700134struct iosapic_rte_info {
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900135 struct list_head rte_list; /* RTEs sharing the same vector */
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700136 char rte_index; /* IOSAPIC RTE index */
137 int refcnt; /* reference counter */
138 unsigned int flags; /* flags */
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900139 struct iosapic *iosapic;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700140} ____cacheline_aligned;
141
142static struct iosapic_intr_info {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900143 struct list_head rtes; /* RTEs using this vector (empty =>
144 * not an IOSAPIC interrupt) */
Kenji Kaneshigec4c376f2007-07-30 11:54:41 +0900145 int count; /* # of registered RTEs */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900146 u32 low32; /* current value of low word of
147 * Redirection table entry */
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700148 unsigned int dest; /* destination CPU physical ID */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 unsigned char dmode : 3; /* delivery mode (see iosapic.h) */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900150 unsigned char polarity: 1; /* interrupt polarity
151 * (see iosapic.h) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 unsigned char trigger : 1; /* trigger mode (see iosapic.h) */
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900153} iosapic_intr_info[NR_IRQS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700155static unsigned char pcat_compat __devinitdata; /* 8259 compatibility flag */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700157static int iosapic_kmalloc_ok;
158static LIST_HEAD(free_rte_list);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900160static inline void
161iosapic_write(struct iosapic *iosapic, unsigned int reg, u32 val)
162{
163 unsigned long flags;
164
165 spin_lock_irqsave(&iosapic->lock, flags);
166 __iosapic_write(iosapic->addr, reg, val);
167 spin_unlock_irqrestore(&iosapic->lock, flags);
168}
169
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170/*
171 * Find an IOSAPIC associated with a GSI
172 */
173static inline int
174find_iosapic (unsigned int gsi)
175{
176 int i;
177
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700178 for (i = 0; i < NR_IOSAPICS; i++) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900179 if ((unsigned) (gsi - iosapic_lists[i].gsi_base) <
180 iosapic_lists[i].num_rte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 return i;
182 }
183
184 return -1;
185}
186
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900187static inline int __gsi_to_irq(unsigned int gsi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900189 int irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190 struct iosapic_intr_info *info;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700191 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900193 for (irq = 0; irq < NR_IRQS; irq++) {
194 info = &iosapic_intr_info[irq];
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700195 list_for_each_entry(rte, &info->rtes, rte_list)
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900196 if (rte->iosapic->gsi_base + rte->rte_index == gsi)
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900197 return irq;
198 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199 return -1;
200}
201
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202int
203gsi_to_irq (unsigned int gsi)
204{
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700205 unsigned long flags;
206 int irq;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700207
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900208 spin_lock_irqsave(&iosapic_lock, flags);
209 irq = __gsi_to_irq(gsi);
210 spin_unlock_irqrestore(&iosapic_lock, flags);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700211 return irq;
212}
213
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900214static struct iosapic_rte_info *find_rte(unsigned int irq, unsigned int gsi)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700215{
216 struct iosapic_rte_info *rte;
217
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900218 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900219 if (rte->iosapic->gsi_base + rte->rte_index == gsi)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700220 return rte;
221 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222}
223
224static void
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900225set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226{
227 unsigned long pol, trigger, dmode;
228 u32 low32, high32;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 int rte_index;
230 char redir;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700231 struct iosapic_rte_info *rte;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900232 ia64_vector vector = irq_to_vector(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233
234 DBG(KERN_DEBUG"IOSAPIC: routing vector %d to 0x%x\n", vector, dest);
235
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900236 rte = find_rte(irq, gsi);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700237 if (!rte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 return; /* not an IOSAPIC interrupt */
239
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700240 rte_index = rte->rte_index;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900241 pol = iosapic_intr_info[irq].polarity;
242 trigger = iosapic_intr_info[irq].trigger;
243 dmode = iosapic_intr_info[irq].dmode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244
245 redir = (dmode == IOSAPIC_LOWEST_PRIORITY) ? 1 : 0;
246
247#ifdef CONFIG_SMP
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900248 set_irq_affinity_info(irq, (int)(dest & 0xffff), redir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249#endif
250
251 low32 = ((pol << IOSAPIC_POLARITY_SHIFT) |
252 (trigger << IOSAPIC_TRIGGER_SHIFT) |
253 (dmode << IOSAPIC_DELIVERY_SHIFT) |
254 ((mask ? 1 : 0) << IOSAPIC_MASK_SHIFT) |
255 vector);
256
257 /* dest contains both id and eid */
258 high32 = (dest << IOSAPIC_DEST_SHIFT);
259
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900260 iosapic_write(rte->iosapic, IOSAPIC_RTE_HIGH(rte_index), high32);
261 iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900262 iosapic_intr_info[irq].low32 = low32;
263 iosapic_intr_info[irq].dest = dest;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264}
265
266static void
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900267nop (unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268{
269 /* do nothing... */
270}
271
Zou Nan haia79561132006-12-07 09:51:35 -0800272
273#ifdef CONFIG_KEXEC
274void
275kexec_disable_iosapic(void)
276{
277 struct iosapic_intr_info *info;
278 struct iosapic_rte_info *rte;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900279 ia64_vector vec;
280 int irq;
281
282 for (irq = 0; irq < NR_IRQS; irq++) {
283 info = &iosapic_intr_info[irq];
284 vec = irq_to_vector(irq);
Zou Nan haia79561132006-12-07 09:51:35 -0800285 list_for_each_entry(rte, &info->rtes,
286 rte_list) {
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900287 iosapic_write(rte->iosapic,
Zou Nan haia79561132006-12-07 09:51:35 -0800288 IOSAPIC_RTE_LOW(rte->rte_index),
289 IOSAPIC_MASK|vec);
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900290 iosapic_eoi(rte->iosapic->addr, vec);
Zou Nan haia79561132006-12-07 09:51:35 -0800291 }
292 }
293}
294#endif
295
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296static void
297mask_irq (unsigned int irq)
298{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 u32 low32;
300 int rte_index;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700301 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302
Kenji Kaneshigec4c376f2007-07-30 11:54:41 +0900303 if (!iosapic_intr_info[irq].count)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304 return; /* not an IOSAPIC interrupt! */
305
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900306 /* set only the mask bit */
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900307 low32 = iosapic_intr_info[irq].low32 |= IOSAPIC_MASK;
308 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) {
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900309 rte_index = rte->rte_index;
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900310 iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312}
313
314static void
315unmask_irq (unsigned int irq)
316{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 u32 low32;
318 int rte_index;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700319 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320
Kenji Kaneshigec4c376f2007-07-30 11:54:41 +0900321 if (!iosapic_intr_info[irq].count)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 return; /* not an IOSAPIC interrupt! */
323
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900324 low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK;
325 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) {
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900326 rte_index = rte->rte_index;
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900327 iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700328 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329}
330
331
Yinghai Lud5dedd42009-04-27 17:59:21 -0700332static int
Rusty Russell0de26522008-12-13 21:20:26 +1030333iosapic_set_affinity(unsigned int irq, const struct cpumask *mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334{
335#ifdef CONFIG_SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 u32 high32, low32;
Rusty Russell0de26522008-12-13 21:20:26 +1030337 int cpu, dest, rte_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700339 struct iosapic_rte_info *rte;
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900340 struct iosapic *iosapic;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341
342 irq &= (~IA64_IRQ_REDIRECTED);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343
Rusty Russell0de26522008-12-13 21:20:26 +1030344 cpu = cpumask_first_and(cpu_online_mask, mask);
345 if (cpu >= nr_cpu_ids)
Yinghai Lud5dedd42009-04-27 17:59:21 -0700346 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347
Rusty Russell0de26522008-12-13 21:20:26 +1030348 if (irq_prepare_move(irq, cpu))
Yinghai Lud5dedd42009-04-27 17:59:21 -0700349 return -1;
Yasuaki Ishimatsucd378f12007-07-17 21:22:48 +0900350
Rusty Russell0de26522008-12-13 21:20:26 +1030351 dest = cpu_physical_id(cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
Kenji Kaneshigec4c376f2007-07-30 11:54:41 +0900353 if (!iosapic_intr_info[irq].count)
Yinghai Lud5dedd42009-04-27 17:59:21 -0700354 return -1; /* not an IOSAPIC interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355
356 set_irq_affinity_info(irq, dest, redir);
357
358 /* dest contains both id and eid */
359 high32 = dest << IOSAPIC_DEST_SHIFT;
360
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900361 low32 = iosapic_intr_info[irq].low32 & ~(7 << IOSAPIC_DELIVERY_SHIFT);
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900362 if (redir)
363 /* change delivery mode to lowest priority */
364 low32 |= (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
365 else
366 /* change delivery mode to fixed */
367 low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT);
Yasuaki Ishimatsucd378f12007-07-17 21:22:48 +0900368 low32 &= IOSAPIC_VECTOR_MASK;
369 low32 |= irq_to_vector(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900371 iosapic_intr_info[irq].low32 = low32;
372 iosapic_intr_info[irq].dest = dest;
373 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) {
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900374 iosapic = rte->iosapic;
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900375 rte_index = rte->rte_index;
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900376 iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32);
377 iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 }
Yinghai Lud5dedd42009-04-27 17:59:21 -0700379
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380#endif
Yinghai Lud5dedd42009-04-27 17:59:21 -0700381 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382}
383
384/*
385 * Handlers for level-triggered interrupts.
386 */
387
388static unsigned int
389iosapic_startup_level_irq (unsigned int irq)
390{
391 unmask_irq(irq);
392 return 0;
393}
394
395static void
396iosapic_end_level_irq (unsigned int irq)
397{
398 ia64_vector vec = irq_to_vector(irq);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700399 struct iosapic_rte_info *rte;
Yasuaki Ishimatsucd378f12007-07-17 21:22:48 +0900400 int do_unmask_irq = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700401
Kenji Kaneshigea6cd63222008-02-25 14:32:22 +0900402 irq_complete_move(irq);
Yasuaki Ishimatsucd378f12007-07-17 21:22:48 +0900403 if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) {
404 do_unmask_irq = 1;
405 mask_irq(irq);
406 }
407
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900408 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900409 iosapic_eoi(rte->iosapic->addr, vec);
Yasuaki Ishimatsucd378f12007-07-17 21:22:48 +0900410
411 if (unlikely(do_unmask_irq)) {
412 move_masked_irq(irq);
413 unmask_irq(irq);
414 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415}
416
417#define iosapic_shutdown_level_irq mask_irq
418#define iosapic_enable_level_irq unmask_irq
419#define iosapic_disable_level_irq mask_irq
420#define iosapic_ack_level_irq nop
421
Simon Horman9e004eb2007-12-07 14:44:05 -0800422static struct irq_chip irq_type_iosapic_level = {
Ingo Molnar06344db2006-11-16 00:43:02 -0800423 .name = "IO-SAPIC-level",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424 .startup = iosapic_startup_level_irq,
425 .shutdown = iosapic_shutdown_level_irq,
426 .enable = iosapic_enable_level_irq,
427 .disable = iosapic_disable_level_irq,
428 .ack = iosapic_ack_level_irq,
429 .end = iosapic_end_level_irq,
KAMEZAWA Hiroyukie253eb02007-03-07 14:57:35 -0800430 .mask = mask_irq,
431 .unmask = unmask_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 .set_affinity = iosapic_set_affinity
433};
434
435/*
436 * Handlers for edge-triggered interrupts.
437 */
438
439static unsigned int
440iosapic_startup_edge_irq (unsigned int irq)
441{
442 unmask_irq(irq);
443 /*
444 * IOSAPIC simply drops interrupts pended while the
445 * corresponding pin was masked, so we can't know if an
446 * interrupt is pending already. Let's hope not...
447 */
448 return 0;
449}
450
451static void
452iosapic_ack_edge_irq (unsigned int irq)
453{
Thomas Gleixner86bc3df2009-06-10 12:45:00 -0700454 struct irq_desc *idesc = irq_desc + irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455
Kenji Kaneshigea6cd63222008-02-25 14:32:22 +0900456 irq_complete_move(irq);
Chen, Kenneth W41503de2006-05-16 16:29:00 -0700457 move_native_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700458 /*
459 * Once we have recorded IRQ_PENDING already, we can mask the
460 * interrupt for real. This prevents IRQ storms from unhandled
461 * devices.
462 */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900463 if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) ==
464 (IRQ_PENDING|IRQ_DISABLED))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465 mask_irq(irq);
466}
467
468#define iosapic_enable_edge_irq unmask_irq
469#define iosapic_disable_edge_irq nop
470#define iosapic_end_edge_irq nop
471
Simon Horman9e004eb2007-12-07 14:44:05 -0800472static struct irq_chip irq_type_iosapic_edge = {
Ingo Molnar06344db2006-11-16 00:43:02 -0800473 .name = "IO-SAPIC-edge",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474 .startup = iosapic_startup_edge_irq,
475 .shutdown = iosapic_disable_edge_irq,
476 .enable = iosapic_enable_edge_irq,
477 .disable = iosapic_disable_edge_irq,
478 .ack = iosapic_ack_edge_irq,
479 .end = iosapic_end_edge_irq,
KAMEZAWA Hiroyukie253eb02007-03-07 14:57:35 -0800480 .mask = mask_irq,
481 .unmask = unmask_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482 .set_affinity = iosapic_set_affinity
483};
484
Simon Horman9e004eb2007-12-07 14:44:05 -0800485static unsigned int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486iosapic_version (char __iomem *addr)
487{
488 /*
489 * IOSAPIC Version Register return 32 bit structure like:
490 * {
491 * unsigned int version : 8;
492 * unsigned int reserved1 : 8;
493 * unsigned int max_redir : 8;
494 * unsigned int reserved2 : 8;
495 * }
496 */
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900497 return __iosapic_read(addr, IOSAPIC_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498}
499
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900500static int iosapic_find_sharable_irq(unsigned long trigger, unsigned long pol)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700501{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900502 int i, irq = -ENOSPC, min_count = -1;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700503 struct iosapic_intr_info *info;
504
505 /*
506 * shared vectors for edge-triggered interrupts are not
507 * supported yet
508 */
509 if (trigger == IOSAPIC_EDGE)
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900510 return -EINVAL;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700511
Roel Kluin5b592392009-02-21 23:40:27 +0100512 for (i = 0; i < NR_IRQS; i++) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700513 info = &iosapic_intr_info[i];
514 if (info->trigger == trigger && info->polarity == pol &&
Yasuaki Ishimatsuf8c087f2007-07-17 21:22:14 +0900515 (info->dmode == IOSAPIC_FIXED ||
516 info->dmode == IOSAPIC_LOWEST_PRIORITY) &&
517 can_request_irq(i, IRQF_SHARED)) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700518 if (min_count == -1 || info->count < min_count) {
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900519 irq = i;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700520 min_count = info->count;
521 }
522 }
523 }
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900524 return irq;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700525}
526
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527/*
528 * if the given vector is already owned by other,
529 * assign a new vector for the other and make the vector available
530 */
531static void __init
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900532iosapic_reassign_vector (int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900534 int new_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535
Kenji Kaneshigec4c376f2007-07-30 11:54:41 +0900536 if (iosapic_intr_info[irq].count) {
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900537 new_irq = create_irq();
538 if (new_irq < 0)
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800539 panic("%s: out of interrupt vectors!\n", __func__);
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900540 printk(KERN_INFO "Reassigning vector %d to %d\n",
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900541 irq_to_vector(irq), irq_to_vector(new_irq));
542 memcpy(&iosapic_intr_info[new_irq], &iosapic_intr_info[irq],
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543 sizeof(struct iosapic_intr_info));
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900544 INIT_LIST_HEAD(&iosapic_intr_info[new_irq].rtes);
545 list_move(iosapic_intr_info[irq].rtes.next,
546 &iosapic_intr_info[new_irq].rtes);
547 memset(&iosapic_intr_info[irq], 0,
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900548 sizeof(struct iosapic_intr_info));
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900549 iosapic_intr_info[irq].low32 = IOSAPIC_MASK;
550 INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 }
552}
553
Sam Ravnborg056e6d82007-07-30 22:50:13 +0200554static struct iosapic_rte_info * __init_refok iosapic_alloc_rte (void)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700555{
556 int i;
557 struct iosapic_rte_info *rte;
558 int preallocated = 0;
559
560 if (!iosapic_kmalloc_ok && list_empty(&free_rte_list)) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900561 rte = alloc_bootmem(sizeof(struct iosapic_rte_info) *
562 NR_PREALLOCATE_RTE_ENTRIES);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700563 for (i = 0; i < NR_PREALLOCATE_RTE_ENTRIES; i++, rte++)
564 list_add(&rte->rte_list, &free_rte_list);
565 }
566
567 if (!list_empty(&free_rte_list)) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900568 rte = list_entry(free_rte_list.next, struct iosapic_rte_info,
569 rte_list);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700570 list_del(&rte->rte_list);
571 preallocated++;
572 } else {
573 rte = kmalloc(sizeof(struct iosapic_rte_info), GFP_ATOMIC);
574 if (!rte)
575 return NULL;
576 }
577
578 memset(rte, 0, sizeof(struct iosapic_rte_info));
579 if (preallocated)
580 rte->flags |= RTE_PREALLOCATED;
581
582 return rte;
583}
584
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900585static inline int irq_is_shared (int irq)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700586{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900587 return (iosapic_intr_info[irq].count > 1);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700588}
589
Isaku Yamahata33b39e82008-05-19 22:13:42 +0900590struct irq_chip*
591ia64_native_iosapic_get_irq_chip(unsigned long trigger)
592{
593 if (trigger == IOSAPIC_EDGE)
594 return &irq_type_iosapic_edge;
595 else
596 return &irq_type_iosapic_level;
597}
598
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400599static int
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900600register_intr (unsigned int gsi, int irq, unsigned char delivery,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601 unsigned long polarity, unsigned long trigger)
602{
Thomas Gleixner86bc3df2009-06-10 12:45:00 -0700603 struct irq_desc *idesc;
Thomas Gleixnerfb824f42009-06-10 12:45:00 -0700604 struct irq_chip *irq_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 int index;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700606 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607
608 index = find_iosapic(gsi);
609 if (index < 0) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900610 printk(KERN_WARNING "%s: No IOSAPIC for GSI %u\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800611 __func__, gsi);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400612 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613 }
614
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900615 rte = find_rte(irq, gsi);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700616 if (!rte) {
617 rte = iosapic_alloc_rte();
618 if (!rte) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900619 printk(KERN_WARNING "%s: cannot allocate memory\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800620 __func__);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400621 return -ENOMEM;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700622 }
623
Yasuaki Ishimatsuc5e3f9e2007-07-17 21:20:42 +0900624 rte->iosapic = &iosapic_lists[index];
625 rte->rte_index = gsi - rte->iosapic->gsi_base;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700626 rte->refcnt++;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900627 list_add_tail(&rte->rte_list, &iosapic_intr_info[irq].rtes);
628 iosapic_intr_info[irq].count++;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700629 iosapic_lists[index].rtes_inuse++;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700630 }
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900631 else if (rte->refcnt == NO_REF_RTE) {
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900632 struct iosapic_intr_info *info = &iosapic_intr_info[irq];
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900633 if (info->count > 0 &&
634 (info->trigger != trigger || info->polarity != polarity)){
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900635 printk (KERN_WARNING
636 "%s: cannot override the interrupt\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800637 __func__);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400638 return -EINVAL;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700639 }
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900640 rte->refcnt++;
641 iosapic_intr_info[irq].count++;
642 iosapic_lists[index].rtes_inuse++;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700643 }
644
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900645 iosapic_intr_info[irq].polarity = polarity;
646 iosapic_intr_info[irq].dmode = delivery;
647 iosapic_intr_info[irq].trigger = trigger;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648
Isaku Yamahata33b39e82008-05-19 22:13:42 +0900649 irq_type = iosapic_get_irq_chip(trigger);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900651 idesc = irq_desc + irq;
Isaku Yamahata33b39e82008-05-19 22:13:42 +0900652 if (irq_type != NULL && idesc->chip != irq_type) {
Thomas Gleixner8a7c3cd2009-06-10 12:44:59 -0700653 if (idesc->chip != &no_irq_chip)
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900654 printk(KERN_WARNING
655 "%s: changing vector %d from %s to %s\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800656 __func__, irq_to_vector(irq),
Andrew Morton351a5832006-11-16 00:42:58 -0800657 idesc->chip->name, irq_type->name);
Ingo Molnard1bef4e2006-06-29 02:24:36 -0700658 idesc->chip = irq_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 }
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400660 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661}
662
663static unsigned int
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900664get_target_cpu (unsigned int gsi, int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665{
666#ifdef CONFIG_SMP
667 static int cpu = -1;
Ashok Rajff741902005-11-11 14:32:40 -0800668 extern int cpe_vector;
Yasuaki Ishimatsu4994be12007-07-17 21:22:33 +0900669 cpumask_t domain = irq_to_domain(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670
671 /*
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700672 * In case of vector shared by multiple RTEs, all RTEs that
673 * share the vector need to use the same destination CPU.
674 */
Kenji Kaneshigec4c376f2007-07-30 11:54:41 +0900675 if (iosapic_intr_info[irq].count)
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900676 return iosapic_intr_info[irq].dest;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700677
678 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 * If the platform supports redirection via XTP, let it
680 * distribute interrupts.
681 */
682 if (smp_int_redirect & SMP_IRQ_REDIRECTION)
683 return cpu_physical_id(smp_processor_id());
684
685 /*
686 * Some interrupts (ACPI SCI, for instance) are registered
687 * before the BSP is marked as online.
688 */
689 if (!cpu_online(smp_processor_id()))
690 return cpu_physical_id(smp_processor_id());
691
Ashok Rajff741902005-11-11 14:32:40 -0800692#ifdef CONFIG_ACPI
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900693 if (cpe_vector > 0 && irq_to_vector(irq) == IA64_CPEP_VECTOR)
Ashok Rajb88e9262006-01-19 16:18:47 -0800694 return get_cpei_target_cpu();
Ashok Rajff741902005-11-11 14:32:40 -0800695#endif
696
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697#ifdef CONFIG_NUMA
698 {
699 int num_cpus, cpu_index, iosapic_index, numa_cpu, i = 0;
Rusty Russellfbb776c2008-12-26 22:23:40 +1030700 const struct cpumask *cpu_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
702 iosapic_index = find_iosapic(gsi);
703 if (iosapic_index < 0 ||
704 iosapic_lists[iosapic_index].node == MAX_NUMNODES)
705 goto skip_numa_setup;
706
Rusty Russellfbb776c2008-12-26 22:23:40 +1030707 cpu_mask = cpumask_of_node(iosapic_lists[iosapic_index].node);
708 num_cpus = 0;
709 for_each_cpu_and(numa_cpu, cpu_mask, &domain) {
710 if (cpu_online(numa_cpu))
711 num_cpus++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700712 }
713
Linus Torvalds1da177e2005-04-16 15:20:36 -0700714 if (!num_cpus)
715 goto skip_numa_setup;
716
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900717 /* Use irq assignment to distribute across cpus in node */
718 cpu_index = irq % num_cpus;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719
Rusty Russellfbb776c2008-12-26 22:23:40 +1030720 for_each_cpu_and(numa_cpu, cpu_mask, &domain)
721 if (cpu_online(numa_cpu) && i++ >= cpu_index)
722 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723
Rusty Russellfbb776c2008-12-26 22:23:40 +1030724 if (numa_cpu < nr_cpu_ids)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725 return cpu_physical_id(numa_cpu);
726 }
727skip_numa_setup:
728#endif
729 /*
730 * Otherwise, round-robin interrupt vectors across all the
731 * processors. (It'd be nice if we could be smarter in the
732 * case of NUMA.)
733 */
734 do {
Rusty Russellfbb776c2008-12-26 22:23:40 +1030735 if (++cpu >= nr_cpu_ids)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 cpu = 0;
Yasuaki Ishimatsu4994be12007-07-17 21:22:33 +0900737 } while (!cpu_online(cpu) || !cpu_isset(cpu, domain));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738
739 return cpu_physical_id(cpu);
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900740#else /* CONFIG_SMP */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741 return cpu_physical_id(smp_processor_id());
742#endif
743}
744
Kenji Kaneshigec9d059d2007-11-07 15:38:30 +0900745static inline unsigned char choose_dmode(void)
746{
747#ifdef CONFIG_SMP
748 if (smp_int_redirect & SMP_IRQ_REDIRECTION)
749 return IOSAPIC_LOWEST_PRIORITY;
750#endif
751 return IOSAPIC_FIXED;
752}
753
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754/*
755 * ACPI can describe IOSAPIC interrupts via static tables and namespace
756 * methods. This provides an interface to register those interrupts and
757 * program the IOSAPIC RTE.
758 */
759int
760iosapic_register_intr (unsigned int gsi,
761 unsigned long polarity, unsigned long trigger)
762{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900763 int irq, mask = 1, err;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 unsigned int dest;
765 unsigned long flags;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700766 struct iosapic_rte_info *rte;
767 u32 low32;
Kenji Kaneshigec9d059d2007-11-07 15:38:30 +0900768 unsigned char dmode;
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900769
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770 /*
771 * If this GSI has already been registered (i.e., it's a
772 * shared interrupt, or we lost a race to register it),
773 * don't touch the RTE.
774 */
775 spin_lock_irqsave(&iosapic_lock, flags);
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900776 irq = __gsi_to_irq(gsi);
777 if (irq > 0) {
778 rte = find_rte(irq, gsi);
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900779 if(iosapic_intr_info[irq].count == 0) {
780 assign_irq_vector(irq);
781 dynamic_irq_init(irq);
782 } else if (rte->refcnt != NO_REF_RTE) {
783 rte->refcnt++;
784 goto unlock_iosapic_lock;
785 }
786 } else
787 irq = create_irq();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700789 /* If vector is running out, we try to find a sharable vector */
Yasuaki Ishimatsueb21ab22007-07-17 21:21:48 +0900790 if (irq < 0) {
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900791 irq = iosapic_find_sharable_irq(trigger, polarity);
792 if (irq < 0)
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900793 goto unlock_iosapic_lock;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900794 }
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700795
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900796 spin_lock(&irq_desc[irq].lock);
797 dest = get_target_cpu(gsi, irq);
Kenji Kaneshigec9d059d2007-11-07 15:38:30 +0900798 dmode = choose_dmode();
799 err = register_intr(gsi, irq, dmode, polarity, trigger);
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900800 if (err < 0) {
Kenji Kaneshige224685c2007-08-01 21:18:44 +0900801 spin_unlock(&irq_desc[irq].lock);
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900802 irq = err;
Kenji Kaneshige224685c2007-08-01 21:18:44 +0900803 goto unlock_iosapic_lock;
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900804 }
805
806 /*
807 * If the vector is shared and already unmasked for other
808 * interrupt sources, don't mask it.
809 */
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900810 low32 = iosapic_intr_info[irq].low32;
811 if (irq_is_shared(irq) && !(low32 & IOSAPIC_MASK))
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900812 mask = 0;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900813 set_rte(gsi, irq, dest, mask);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700814
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815 printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n",
816 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
817 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900818 cpu_logical_id(dest), dest, irq_to_vector(irq));
Kenji Kaneshige224685c2007-08-01 21:18:44 +0900819
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900820 spin_unlock(&irq_desc[irq].lock);
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900821 unlock_iosapic_lock:
822 spin_unlock_irqrestore(&iosapic_lock, flags);
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900823 return irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824}
825
Linus Torvalds1da177e2005-04-16 15:20:36 -0700826void
827iosapic_unregister_intr (unsigned int gsi)
828{
829 unsigned long flags;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900830 int irq, index;
Thomas Gleixner86bc3df2009-06-10 12:45:00 -0700831 struct irq_desc *idesc;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700832 u32 low32;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833 unsigned long trigger, polarity;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700834 unsigned int dest;
835 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836
837 /*
838 * If the irq associated with the gsi is not found,
839 * iosapic_unregister_intr() is unbalanced. We need to check
840 * this again after getting locks.
841 */
842 irq = gsi_to_irq(gsi);
843 if (irq < 0) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900844 printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n",
845 gsi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846 WARN_ON(1);
847 return;
848 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900850 spin_lock_irqsave(&iosapic_lock, flags);
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900851 if ((rte = find_rte(irq, gsi)) == NULL) {
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900852 printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n",
853 gsi);
854 WARN_ON(1);
855 goto out;
856 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700857
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900858 if (--rte->refcnt > 0)
859 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700860
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900861 idesc = irq_desc + irq;
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900862 rte->refcnt = NO_REF_RTE;
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900863
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900864 /* Mask the interrupt */
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900865 low32 = iosapic_intr_info[irq].low32 | IOSAPIC_MASK;
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +0900866 iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte->rte_index), low32);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700867
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900868 iosapic_intr_info[irq].count--;
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900869 index = find_iosapic(gsi);
870 iosapic_lists[index].rtes_inuse--;
871 WARN_ON(iosapic_lists[index].rtes_inuse < 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700872
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900873 trigger = iosapic_intr_info[irq].trigger;
874 polarity = iosapic_intr_info[irq].polarity;
875 dest = iosapic_intr_info[irq].dest;
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900876 printk(KERN_INFO
877 "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d unregistered\n",
878 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
879 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900880 cpu_logical_id(dest), dest, irq_to_vector(irq));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900882 if (iosapic_intr_info[irq].count == 0) {
Alex Williamson451fe002007-01-24 22:48:04 -0700883#ifdef CONFIG_SMP
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900884 /* Clear affinity */
Mike Travise65e49d2009-01-12 15:27:13 -0800885 cpumask_setall(idesc->affinity);
Alex Williamson451fe002007-01-24 22:48:04 -0700886#endif
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +0900887 /* Clear the interrupt information */
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900888 iosapic_intr_info[irq].dest = 0;
889 iosapic_intr_info[irq].dmode = 0;
890 iosapic_intr_info[irq].polarity = 0;
891 iosapic_intr_info[irq].trigger = 0;
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900892 iosapic_intr_info[irq].low32 |= IOSAPIC_MASK;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700893
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900894 /* Destroy and reserve IRQ */
895 destroy_and_reserve_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896 }
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700897 out:
Yasuaki Ishimatsu40598cb2007-07-17 21:20:54 +0900898 spin_unlock_irqrestore(&iosapic_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700899}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700900
901/*
902 * ACPI calls this when it finds an entry for a platform interrupt.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700903 */
904int __init
905iosapic_register_platform_intr (u32 int_type, unsigned int gsi,
906 int iosapic_vector, u16 eid, u16 id,
907 unsigned long polarity, unsigned long trigger)
908{
909 static const char * const name[] = {"unknown", "PMI", "INIT", "CPEI"};
910 unsigned char delivery;
Yasuaki Ishimatsueb21ab22007-07-17 21:21:48 +0900911 int irq, vector, mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912 unsigned int dest = ((id << 8) | eid) & 0xffff;
913
914 switch (int_type) {
915 case ACPI_INTERRUPT_PMI:
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900916 irq = vector = iosapic_vector;
Yasuaki Ishimatsu4994be12007-07-17 21:22:33 +0900917 bind_irq_vector(irq, vector, CPU_MASK_ALL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918 /*
919 * since PMI vector is alloc'd by FW(ACPI) not by kernel,
920 * we need to make sure the vector is available
921 */
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900922 iosapic_reassign_vector(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923 delivery = IOSAPIC_PMI;
924 break;
925 case ACPI_INTERRUPT_INIT:
Yasuaki Ishimatsueb21ab22007-07-17 21:21:48 +0900926 irq = create_irq();
927 if (irq < 0)
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800928 panic("%s: out of interrupt vectors!\n", __func__);
Yasuaki Ishimatsueb21ab22007-07-17 21:21:48 +0900929 vector = irq_to_vector(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 delivery = IOSAPIC_INIT;
931 break;
932 case ACPI_INTERRUPT_CPEI:
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900933 irq = vector = IA64_CPE_VECTOR;
Yasuaki Ishimatsu4994be12007-07-17 21:22:33 +0900934 BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
Kenji Kaneshigeaa0ebec2007-11-09 10:51:01 +0900935 delivery = IOSAPIC_FIXED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 mask = 1;
937 break;
938 default:
Harvey Harrisond4ed8082008-03-04 15:15:00 -0800939 printk(KERN_ERR "%s: invalid int type 0x%x\n", __func__,
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900940 int_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700941 return -1;
942 }
943
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900944 register_intr(gsi, irq, delivery, polarity, trigger);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900946 printk(KERN_INFO
947 "PLATFORM int %s (0x%x): GSI %u (%s, %s) -> CPU %d (0x%04x)"
948 " vector %d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 int_type < ARRAY_SIZE(name) ? name[int_type] : "unknown",
950 int_type, gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
951 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
952 cpu_logical_id(dest), dest, vector);
953
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900954 set_rte(gsi, irq, dest, mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 return vector;
956}
957
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958/*
959 * ACPI calls this when it finds an entry for a legacy ISA IRQ override.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960 */
Tony Luck0f7ac292007-05-07 13:17:00 -0700961void __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
963 unsigned long polarity,
964 unsigned long trigger)
965{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900966 int vector, irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967 unsigned int dest = cpu_physical_id(smp_processor_id());
Kenji Kaneshigec9d059d2007-11-07 15:38:30 +0900968 unsigned char dmode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700969
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +0900970 irq = vector = isa_irq_to_vector(isa_irq);
Yasuaki Ishimatsu4994be12007-07-17 21:22:33 +0900971 BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
Kenji Kaneshigec9d059d2007-11-07 15:38:30 +0900972 dmode = choose_dmode();
973 register_intr(gsi, irq, dmode, polarity, trigger);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974
975 DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
976 isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",
977 polarity == IOSAPIC_POL_HIGH ? "high" : "low",
978 cpu_logical_id(dest), dest, vector);
979
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +0900980 set_rte(gsi, irq, dest, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981}
982
983void __init
Isaku Yamahata33b39e82008-05-19 22:13:42 +0900984ia64_native_iosapic_pcat_compat_init(void)
985{
986 if (pcat_compat) {
987 /*
988 * Disable the compatibility mode interrupts (8259 style),
989 * needs IN/OUT support enabled.
990 */
991 printk(KERN_INFO
992 "%s: Disabling PC-AT compatible 8259 interrupts\n",
993 __func__);
994 outb(0xff, 0xA1);
995 outb(0xff, 0x21);
996 }
997}
998
999void __init
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000iosapic_system_init (int system_pcat_compat)
1001{
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +09001002 int irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +09001004 for (irq = 0; irq < NR_IRQS; ++irq) {
1005 iosapic_intr_info[irq].low32 = IOSAPIC_MASK;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001006 /* mark as unused */
Yasuaki Ishimatsu4bbdec72007-07-17 21:22:03 +09001007 INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes);
Yasuaki Ishimatsue1b30a32007-07-17 21:22:23 +09001008
1009 iosapic_intr_info[irq].count = 0;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001010 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011
1012 pcat_compat = system_pcat_compat;
Isaku Yamahata33b39e82008-05-19 22:13:42 +09001013 if (pcat_compat)
1014 iosapic_pcat_compat_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001015}
1016
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001017static inline int
1018iosapic_alloc (void)
1019{
1020 int index;
1021
1022 for (index = 0; index < NR_IOSAPICS; index++)
1023 if (!iosapic_lists[index].addr)
1024 return index;
1025
Harvey Harrisond4ed8082008-03-04 15:15:00 -08001026 printk(KERN_WARNING "%s: failed to allocate iosapic\n", __func__);
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001027 return -1;
1028}
1029
1030static inline void
1031iosapic_free (int index)
1032{
1033 memset(&iosapic_lists[index], 0, sizeof(iosapic_lists[0]));
1034}
1035
1036static inline int
1037iosapic_check_gsi_range (unsigned int gsi_base, unsigned int ver)
1038{
1039 int index;
1040 unsigned int gsi_end, base, end;
1041
1042 /* check gsi range */
1043 gsi_end = gsi_base + ((ver >> 16) & 0xff);
1044 for (index = 0; index < NR_IOSAPICS; index++) {
1045 if (!iosapic_lists[index].addr)
1046 continue;
1047
1048 base = iosapic_lists[index].gsi_base;
1049 end = base + iosapic_lists[index].num_rte - 1;
1050
Satoru Takeuchie6d1ba52006-03-27 17:13:46 +09001051 if (gsi_end < base || end < gsi_base)
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001052 continue; /* OK */
1053
1054 return -EBUSY;
1055 }
1056 return 0;
1057}
1058
1059int __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060iosapic_init (unsigned long phys_addr, unsigned int gsi_base)
1061{
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001062 int num_rte, err, index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001063 unsigned int isa_irq, ver;
1064 char __iomem *addr;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001065 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001066
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001067 spin_lock_irqsave(&iosapic_lock, flags);
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +09001068 index = find_iosapic(gsi_base);
1069 if (index >= 0) {
1070 spin_unlock_irqrestore(&iosapic_lock, flags);
1071 return -EBUSY;
1072 }
1073
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001074 addr = ioremap(phys_addr, 0);
Roel Kluine7369e02009-08-11 14:52:11 -07001075 if (addr == NULL) {
1076 spin_unlock_irqrestore(&iosapic_lock, flags);
1077 return -ENOMEM;
1078 }
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001079 ver = iosapic_version(addr);
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001080 if ((err = iosapic_check_gsi_range(gsi_base, ver))) {
1081 iounmap(addr);
1082 spin_unlock_irqrestore(&iosapic_lock, flags);
1083 return err;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001084 }
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001085
1086 /*
1087 * The MAX_REDIR register holds the highest input pin number
1088 * (starting from 0). We add 1 so that we can use it for
1089 * number of pins (= RTEs)
1090 */
1091 num_rte = ((ver >> 16) & 0xff) + 1;
1092
1093 index = iosapic_alloc();
1094 iosapic_lists[index].addr = addr;
1095 iosapic_lists[index].gsi_base = gsi_base;
1096 iosapic_lists[index].num_rte = num_rte;
1097#ifdef CONFIG_NUMA
1098 iosapic_lists[index].node = MAX_NUMNODES;
1099#endif
Yasuaki Ishimatsuc1726d62007-07-17 21:21:26 +09001100 spin_lock_init(&iosapic_lists[index].lock);
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001101 spin_unlock_irqrestore(&iosapic_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001102
1103 if ((gsi_base == 0) && pcat_compat) {
1104 /*
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001105 * Map the legacy ISA devices into the IOSAPIC data. Some of
1106 * these may get reprogrammed later on with data from the ACPI
1107 * Interrupt Source Override table.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001108 */
1109 for (isa_irq = 0; isa_irq < 16; ++isa_irq)
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001110 iosapic_override_isa_irq(isa_irq, isa_irq,
1111 IOSAPIC_POL_HIGH,
1112 IOSAPIC_EDGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001113 }
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001114 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001115}
1116
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001117#ifdef CONFIG_HOTPLUG
1118int
1119iosapic_remove (unsigned int gsi_base)
1120{
1121 int index, err = 0;
1122 unsigned long flags;
1123
1124 spin_lock_irqsave(&iosapic_lock, flags);
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001125 index = find_iosapic(gsi_base);
1126 if (index < 0) {
1127 printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -08001128 __func__, gsi_base);
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001129 goto out;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001130 }
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001131
1132 if (iosapic_lists[index].rtes_inuse) {
1133 err = -EBUSY;
1134 printk(KERN_WARNING "%s: IOSAPIC for GSI base %u is busy\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -08001135 __func__, gsi_base);
Yasuaki Ishimatsue3a8f7b2007-07-17 21:20:29 +09001136 goto out;
1137 }
1138
1139 iounmap(iosapic_lists[index].addr);
1140 iosapic_free(index);
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001141 out:
1142 spin_unlock_irqrestore(&iosapic_lock, flags);
1143 return err;
1144}
1145#endif /* CONFIG_HOTPLUG */
1146
Linus Torvalds1da177e2005-04-16 15:20:36 -07001147#ifdef CONFIG_NUMA
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001148void __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -07001149map_iosapic_to_node(unsigned int gsi_base, int node)
1150{
1151 int index;
1152
1153 index = find_iosapic(gsi_base);
1154 if (index < 0) {
1155 printk(KERN_WARNING "%s: No IOSAPIC for GSI %u\n",
Harvey Harrisond4ed8082008-03-04 15:15:00 -08001156 __func__, gsi_base);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157 return;
1158 }
1159 iosapic_lists[index].node = node;
1160 return;
1161}
1162#endif
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001163
1164static int __init iosapic_enable_kmalloc (void)
1165{
1166 iosapic_kmalloc_ok = 1;
1167 return 0;
1168}
1169core_initcall (iosapic_enable_kmalloc);