Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Author: Armin Kuster <akuster@mvista.com> |
| 3 | * |
| 4 | * 2002 (c) MontaVista, Software, Inc. This file is licensed under |
| 5 | * the terms of the GNU General Public License version 2. This program |
| 6 | * is licensed "as is" without any warranty of any kind, whether express |
| 7 | * or implied. |
| 8 | */ |
| 9 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | #include <linux/init.h> |
| 11 | #include <linux/smp.h> |
| 12 | #include <linux/threads.h> |
| 13 | #include <linux/param.h> |
| 14 | #include <linux/string.h> |
| 15 | #include <platforms/4xx/ibm405gpr.h> |
| 16 | #include <asm/ibm4xx.h> |
| 17 | #include <asm/ocp.h> |
| 18 | #include <asm/ppc4xx_pic.h> |
| 19 | |
| 20 | static struct ocp_func_emac_data ibm405gpr_emac0_def = { |
| 21 | .rgmii_idx = -1, /* No RGMII */ |
| 22 | .rgmii_mux = -1, /* No RGMII */ |
| 23 | .zmii_idx = -1, /* ZMII device index */ |
| 24 | .zmii_mux = 0, /* ZMII input of this EMAC */ |
| 25 | .mal_idx = 0, /* MAL device index */ |
| 26 | .mal_rx_chan = 0, /* MAL rx channel number */ |
| 27 | .mal_tx_chan = 0, /* MAL tx channel number */ |
| 28 | .wol_irq = 9, /* WOL interrupt number */ |
| 29 | .mdio_idx = -1, /* No shared MDIO */ |
| 30 | .tah_idx = -1, /* No TAH */ |
| 31 | }; |
| 32 | OCP_SYSFS_EMAC_DATA() |
| 33 | |
| 34 | static struct ocp_func_mal_data ibm405gpr_mal0_def = { |
| 35 | .num_tx_chans = 1, /* Number of TX channels */ |
| 36 | .num_rx_chans = 1, /* Number of RX channels */ |
| 37 | .txeob_irq = 11, /* TX End Of Buffer IRQ */ |
| 38 | .rxeob_irq = 12, /* RX End Of Buffer IRQ */ |
| 39 | .txde_irq = 13, /* TX Descriptor Error IRQ */ |
| 40 | .rxde_irq = 14, /* RX Descriptor Error IRQ */ |
| 41 | .serr_irq = 10, /* MAL System Error IRQ */ |
Eugene Surovegin | 3a0a401 | 2005-09-03 15:55:53 -0700 | [diff] [blame] | 42 | .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | }; |
| 44 | OCP_SYSFS_MAL_DATA() |
| 45 | |
| 46 | static struct ocp_func_iic_data ibm405gpr_iic0_def = { |
| 47 | .fast_mode = 0, /* Use standad mode (100Khz) */ |
| 48 | }; |
| 49 | |
| 50 | OCP_SYSFS_IIC_DATA() |
| 51 | |
| 52 | struct ocp_def core_ocp[] = { |
| 53 | { .vendor = OCP_VENDOR_IBM, |
| 54 | .function = OCP_FUNC_OPB, |
| 55 | .index = 0, |
| 56 | .paddr = 0xEF600000, |
| 57 | .irq = OCP_IRQ_NA, |
| 58 | .pm = OCP_CPM_NA, |
| 59 | }, |
| 60 | { .vendor = OCP_VENDOR_IBM, |
| 61 | .function = OCP_FUNC_16550, |
| 62 | .index = 0, |
| 63 | .paddr = UART0_IO_BASE, |
| 64 | .irq = UART0_INT, |
| 65 | .pm = IBM_CPM_UART0 |
| 66 | }, |
| 67 | { .vendor = OCP_VENDOR_IBM, |
| 68 | .function = OCP_FUNC_16550, |
| 69 | .index = 1, |
| 70 | .paddr = UART1_IO_BASE, |
| 71 | .irq = UART1_INT, |
| 72 | .pm = IBM_CPM_UART1 |
| 73 | }, |
| 74 | { .vendor = OCP_VENDOR_IBM, |
| 75 | .function = OCP_FUNC_IIC, |
| 76 | .paddr = 0xEF600500, |
| 77 | .irq = 2, |
| 78 | .pm = IBM_CPM_IIC0, |
| 79 | .additions = &ibm405gpr_iic0_def, |
| 80 | .show = &ocp_show_iic_data, |
| 81 | }, |
| 82 | { .vendor = OCP_VENDOR_IBM, |
| 83 | .function = OCP_FUNC_GPIO, |
| 84 | .paddr = 0xEF600700, |
| 85 | .irq = OCP_IRQ_NA, |
| 86 | .pm = IBM_CPM_GPIO0 |
| 87 | }, |
| 88 | { .vendor = OCP_VENDOR_IBM, |
| 89 | .function = OCP_FUNC_MAL, |
| 90 | .paddr = OCP_PADDR_NA, |
| 91 | .irq = OCP_IRQ_NA, |
| 92 | .pm = OCP_CPM_NA, |
| 93 | .additions = &ibm405gpr_mal0_def, |
| 94 | .show = &ocp_show_mal_data, |
| 95 | }, |
| 96 | { .vendor = OCP_VENDOR_IBM, |
| 97 | .function = OCP_FUNC_EMAC, |
| 98 | .index = 0, |
| 99 | .paddr = EMAC0_BASE, |
| 100 | .irq = 15, |
| 101 | .pm = IBM_CPM_EMAC0, |
| 102 | .additions = &ibm405gpr_emac0_def, |
| 103 | .show = &ocp_show_emac_data, |
| 104 | }, |
| 105 | { .vendor = OCP_VENDOR_INVALID |
| 106 | } |
| 107 | }; |
| 108 | |
| 109 | /* Polarity and triggering settings for internal interrupt sources */ |
| 110 | struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { |
| 111 | { .polarity = 0xffffe000, |
| 112 | .triggering = 0x10000000, |
| 113 | .ext_irq_mask = 0x00001fff, /* IRQ7 - IRQ12, IRQ0 - IRQ6 */ |
| 114 | } |
| 115 | }; |