Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* entry-table.S: main trap vector tables and exception jump table |
| 2 | * |
| 3 | * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | #include <linux/sys.h> |
| 14 | #include <linux/config.h> |
| 15 | #include <linux/linkage.h> |
| 16 | #include <asm/spr-regs.h> |
| 17 | |
| 18 | ############################################################################### |
| 19 | # |
| 20 | # Declare the main trap and vector tables |
| 21 | # |
| 22 | # There are six tables: |
| 23 | # |
| 24 | # (1) The trap table for debug mode |
| 25 | # (2) The trap table for kernel mode |
| 26 | # (3) The trap table for user mode |
| 27 | # |
| 28 | # The CPU jumps to an appropriate slot in the appropriate table to perform |
| 29 | # exception processing. We have three different tables for the three |
| 30 | # different CPU modes because there is no hardware differentiation between |
| 31 | # stack pointers for these three modes, and so we have to invent one when |
| 32 | # crossing mode boundaries. |
| 33 | # |
| 34 | # (4) The exception handler vector table |
| 35 | # |
| 36 | # The user and kernel trap tables use the same prologue for normal |
| 37 | # exception processing. The prologue then jumps to the handler in this |
| 38 | # table, as indexed by the exception ID from the TBR. |
| 39 | # |
| 40 | # (5) The fixup table for kernel-trap single-step |
| 41 | # (6) The fixup table for user-trap single-step |
| 42 | # |
| 43 | # Due to the way single-stepping works on this CPU (single-step is not |
| 44 | # disabled when crossing exception boundaries, only when in debug mode), |
| 45 | # we have to catch the single-step event in break.S and jump to the fixup |
| 46 | # routine pointed to by this table. |
| 47 | # |
| 48 | # The linker script places the user mode and kernel mode trap tables on to |
| 49 | # the same 8Kb page, so that break.S can be more efficient when performing |
| 50 | # single-step bypass management |
| 51 | # |
| 52 | ############################################################################### |
| 53 | |
| 54 | # trap table for entry from debug mode |
| 55 | .section .trap.break,"ax" |
| 56 | .balign 256*16 |
| 57 | .globl __entry_breaktrap_table |
| 58 | __entry_breaktrap_table: |
| 59 | |
| 60 | # trap table for entry from user mode |
| 61 | .section .trap.user,"ax" |
| 62 | .balign 256*16 |
| 63 | .globl __entry_usertrap_table |
| 64 | __entry_usertrap_table: |
| 65 | |
| 66 | # trap table for entry from kernel mode |
| 67 | .section .trap.kernel,"ax" |
| 68 | .balign 256*16 |
| 69 | .globl __entry_kerneltrap_table |
| 70 | __entry_kerneltrap_table: |
| 71 | |
| 72 | # exception handler jump table |
| 73 | .section .trap.vector,"ax" |
| 74 | .balign 256*4 |
| 75 | .globl __entry_vector_table |
| 76 | __entry_vector_table: |
| 77 | |
| 78 | # trap fixup table for single-stepping in user mode |
| 79 | .section .trap.fixup.user,"a" |
| 80 | .balign 256*4 |
| 81 | .globl __break_usertrap_fixup_table |
| 82 | __break_usertrap_fixup_table: |
| 83 | |
| 84 | # trap fixup table for single-stepping in user mode |
| 85 | .section .trap.fixup.kernel,"a" |
| 86 | .balign 256*4 |
| 87 | .globl __break_kerneltrap_fixup_table |
| 88 | __break_kerneltrap_fixup_table: |
| 89 | |
| 90 | # handler declaration for a sofware or program interrupt |
| 91 | .macro VECTOR_SOFTPROG tbr_tt, vec |
| 92 | .section .trap.user |
| 93 | .org \tbr_tt |
| 94 | bra __entry_uspace_softprog_interrupt |
| 95 | .section .trap.fixup.user |
| 96 | .org \tbr_tt >> 2 |
| 97 | .long __break_step_uspace_softprog_interrupt |
| 98 | .section .trap.kernel |
| 99 | .org \tbr_tt |
| 100 | bra __entry_kernel_softprog_interrupt |
| 101 | .section .trap.fixup.kernel |
| 102 | .org \tbr_tt >> 2 |
| 103 | .long __break_step_kernel_softprog_interrupt |
| 104 | .section .trap.vector |
| 105 | .org \tbr_tt >> 2 |
| 106 | .long \vec |
| 107 | .endm |
| 108 | |
| 109 | # handler declaration for a maskable external interrupt |
| 110 | .macro VECTOR_IRQ tbr_tt, vec |
| 111 | .section .trap.user |
| 112 | .org \tbr_tt |
| 113 | bra __entry_uspace_external_interrupt |
| 114 | .section .trap.fixup.user |
| 115 | .org \tbr_tt >> 2 |
| 116 | .long __break_step_uspace_external_interrupt |
| 117 | .section .trap.kernel |
| 118 | .org \tbr_tt |
| 119 | bra __entry_kernel_external_interrupt |
| 120 | .section .trap.fixup.kernel |
| 121 | .org \tbr_tt >> 2 |
| 122 | .long __break_step_kernel_external_interrupt |
| 123 | .section .trap.vector |
| 124 | .org \tbr_tt >> 2 |
| 125 | .long \vec |
| 126 | .endm |
| 127 | |
| 128 | # handler declaration for an NMI external interrupt |
| 129 | .macro VECTOR_NMI tbr_tt, vec |
| 130 | .section .trap.user |
| 131 | .org \tbr_tt |
| 132 | break |
| 133 | break |
| 134 | break |
| 135 | break |
| 136 | .section .trap.kernel |
| 137 | .org \tbr_tt |
| 138 | break |
| 139 | break |
| 140 | break |
| 141 | break |
| 142 | .section .trap.vector |
| 143 | .org \tbr_tt >> 2 |
| 144 | .long \vec |
| 145 | .endm |
| 146 | |
| 147 | # handler declaration for an MMU only sofware or program interrupt |
| 148 | .macro VECTOR_SP_MMU tbr_tt, vec |
| 149 | #ifdef CONFIG_MMU |
| 150 | VECTOR_SOFTPROG \tbr_tt, \vec |
| 151 | #else |
| 152 | VECTOR_NMI \tbr_tt, 0 |
| 153 | #endif |
| 154 | .endm |
| 155 | |
| 156 | |
| 157 | ############################################################################### |
| 158 | # |
| 159 | # specification of the vectors |
| 160 | # - note: each macro inserts code into multiple sections |
| 161 | # |
| 162 | ############################################################################### |
| 163 | VECTOR_SP_MMU TBR_TT_INSTR_MMU_MISS, __entry_insn_mmu_miss |
| 164 | VECTOR_SOFTPROG TBR_TT_INSTR_ACC_ERROR, __entry_insn_access_error |
| 165 | VECTOR_SOFTPROG TBR_TT_INSTR_ACC_EXCEP, __entry_insn_access_exception |
| 166 | VECTOR_SOFTPROG TBR_TT_PRIV_INSTR, __entry_privileged_instruction |
| 167 | VECTOR_SOFTPROG TBR_TT_ILLEGAL_INSTR, __entry_illegal_instruction |
| 168 | VECTOR_SOFTPROG TBR_TT_FP_EXCEPTION, __entry_media_exception |
| 169 | VECTOR_SOFTPROG TBR_TT_MP_EXCEPTION, __entry_media_exception |
| 170 | VECTOR_SOFTPROG TBR_TT_DATA_ACC_ERROR, __entry_data_access_error |
| 171 | VECTOR_SP_MMU TBR_TT_DATA_MMU_MISS, __entry_data_mmu_miss |
| 172 | VECTOR_SOFTPROG TBR_TT_DATA_ACC_EXCEP, __entry_data_access_exception |
| 173 | VECTOR_SOFTPROG TBR_TT_DATA_STR_ERROR, __entry_data_store_error |
| 174 | VECTOR_SOFTPROG TBR_TT_DIVISION_EXCEP, __entry_division_exception |
| 175 | |
| 176 | #ifdef CONFIG_MMU |
| 177 | .section .trap.user |
| 178 | .org TBR_TT_INSTR_TLB_MISS |
| 179 | .globl __trap_user_insn_tlb_miss |
| 180 | __trap_user_insn_tlb_miss: |
| 181 | movsg ear0,gr28 /* faulting address */ |
| 182 | movsg scr0,gr31 /* get mapped PTD coverage start address */ |
| 183 | xor.p gr28,gr31,gr31 /* compare addresses */ |
| 184 | bra __entry_user_insn_tlb_miss |
| 185 | |
| 186 | .org TBR_TT_DATA_TLB_MISS |
| 187 | .globl __trap_user_data_tlb_miss |
| 188 | __trap_user_data_tlb_miss: |
| 189 | movsg ear0,gr28 /* faulting address */ |
| 190 | movsg scr1,gr31 /* get mapped PTD coverage start address */ |
| 191 | xor.p gr28,gr31,gr31 /* compare addresses */ |
| 192 | bra __entry_user_data_tlb_miss |
| 193 | |
| 194 | .section .trap.kernel |
| 195 | .org TBR_TT_INSTR_TLB_MISS |
| 196 | .globl __trap_kernel_insn_tlb_miss |
| 197 | __trap_kernel_insn_tlb_miss: |
| 198 | movsg ear0,gr29 /* faulting address */ |
| 199 | movsg scr0,gr31 /* get mapped PTD coverage start address */ |
| 200 | xor.p gr29,gr31,gr31 /* compare addresses */ |
| 201 | bra __entry_kernel_insn_tlb_miss |
| 202 | |
| 203 | .org TBR_TT_DATA_TLB_MISS |
| 204 | .globl __trap_kernel_data_tlb_miss |
| 205 | __trap_kernel_data_tlb_miss: |
| 206 | movsg ear0,gr29 /* faulting address */ |
| 207 | movsg scr1,gr31 /* get mapped PTD coverage start address */ |
| 208 | xor.p gr29,gr31,gr31 /* compare addresses */ |
| 209 | bra __entry_kernel_data_tlb_miss |
| 210 | |
| 211 | .section .trap.fixup.user |
| 212 | .org TBR_TT_INSTR_TLB_MISS >> 2 |
| 213 | .globl __trap_fixup_user_insn_tlb_miss |
| 214 | __trap_fixup_user_insn_tlb_miss: |
| 215 | .long __break_user_insn_tlb_miss |
| 216 | .org TBR_TT_DATA_TLB_MISS >> 2 |
| 217 | .globl __trap_fixup_user_data_tlb_miss |
| 218 | __trap_fixup_user_data_tlb_miss: |
| 219 | .long __break_user_data_tlb_miss |
| 220 | |
| 221 | .section .trap.fixup.kernel |
| 222 | .org TBR_TT_INSTR_TLB_MISS >> 2 |
| 223 | .globl __trap_fixup_kernel_insn_tlb_miss |
| 224 | __trap_fixup_kernel_insn_tlb_miss: |
| 225 | .long __break_kernel_insn_tlb_miss |
| 226 | .org TBR_TT_DATA_TLB_MISS >> 2 |
| 227 | .globl __trap_fixup_kernel_data_tlb_miss |
| 228 | __trap_fixup_kernel_data_tlb_miss: |
| 229 | .long __break_kernel_data_tlb_miss |
| 230 | |
| 231 | .section .trap.vector |
| 232 | .org TBR_TT_INSTR_TLB_MISS >> 2 |
| 233 | .long __entry_insn_mmu_fault |
| 234 | .org TBR_TT_DATA_TLB_MISS >> 2 |
| 235 | .long __entry_data_mmu_fault |
| 236 | #endif |
| 237 | |
| 238 | VECTOR_SP_MMU TBR_TT_DATA_DAT_EXCEP, __entry_data_dat_fault |
| 239 | VECTOR_NMI TBR_TT_DECREMENT_TIMER, __entry_do_NMI |
| 240 | VECTOR_SOFTPROG TBR_TT_COMPOUND_EXCEP, __entry_compound_exception |
| 241 | VECTOR_IRQ TBR_TT_INTERRUPT_1, __entry_do_IRQ |
| 242 | VECTOR_IRQ TBR_TT_INTERRUPT_2, __entry_do_IRQ |
| 243 | VECTOR_IRQ TBR_TT_INTERRUPT_3, __entry_do_IRQ |
| 244 | VECTOR_IRQ TBR_TT_INTERRUPT_4, __entry_do_IRQ |
| 245 | VECTOR_IRQ TBR_TT_INTERRUPT_5, __entry_do_IRQ |
| 246 | VECTOR_IRQ TBR_TT_INTERRUPT_6, __entry_do_IRQ |
| 247 | VECTOR_IRQ TBR_TT_INTERRUPT_7, __entry_do_IRQ |
| 248 | VECTOR_IRQ TBR_TT_INTERRUPT_8, __entry_do_IRQ |
| 249 | VECTOR_IRQ TBR_TT_INTERRUPT_9, __entry_do_IRQ |
| 250 | VECTOR_IRQ TBR_TT_INTERRUPT_10, __entry_do_IRQ |
| 251 | VECTOR_IRQ TBR_TT_INTERRUPT_11, __entry_do_IRQ |
| 252 | VECTOR_IRQ TBR_TT_INTERRUPT_12, __entry_do_IRQ |
| 253 | VECTOR_IRQ TBR_TT_INTERRUPT_13, __entry_do_IRQ |
| 254 | VECTOR_IRQ TBR_TT_INTERRUPT_14, __entry_do_IRQ |
| 255 | VECTOR_NMI TBR_TT_INTERRUPT_15, __entry_do_NMI |
| 256 | |
| 257 | # miscellaneous user mode entry points |
| 258 | .section .trap.user |
| 259 | .org TBR_TT_TRAP0 |
| 260 | .rept 127 |
| 261 | bra __entry_uspace_softprog_interrupt |
| 262 | bra __break_step_uspace_softprog_interrupt |
| 263 | .long 0,0 |
| 264 | .endr |
| 265 | .org TBR_TT_BREAK |
| 266 | bra __entry_break |
| 267 | .long 0,0,0 |
| 268 | |
| 269 | # miscellaneous kernel mode entry points |
| 270 | .section .trap.kernel |
| 271 | .org TBR_TT_TRAP0 |
| 272 | .rept 127 |
| 273 | bra __entry_kernel_softprog_interrupt |
| 274 | bra __break_step_kernel_softprog_interrupt |
| 275 | .long 0,0 |
| 276 | .endr |
| 277 | .org TBR_TT_BREAK |
| 278 | bra __entry_break |
| 279 | .long 0,0,0 |
| 280 | |
| 281 | # miscellaneous debug mode entry points |
| 282 | .section .trap.break |
| 283 | .org TBR_TT_BREAK |
| 284 | movsg bpcsr,gr30 |
| 285 | jmpl @(gr30,gr0) |
| 286 | |
| 287 | # miscellaneous vectors |
| 288 | .section .trap.vector |
| 289 | .org TBR_TT_TRAP0 >> 2 |
| 290 | .long system_call |
| 291 | .rept 126 |
| 292 | .long __entry_unsupported_trap |
| 293 | .endr |
| 294 | .org TBR_TT_BREAK >> 2 |
| 295 | .long __entry_debug_exception |