| #ifndef MFD_TMIO_H |
| #define MFD_TMIO_H |
| |
| #define tmio_ioread8(addr) readb(addr) |
| #define tmio_ioread16(addr) readw(addr) |
| #define tmio_ioread16_rep(r, b, l) readsw(r, b, l) |
| #define tmio_ioread32(addr) \ |
| (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16)) |
| |
| #define tmio_iowrite8(val, addr) writeb((val), (addr)) |
| #define tmio_iowrite16(val, addr) writew((val), (addr)) |
| #define tmio_iowrite16_rep(r, b, l) writesw(r, b, l) |
| #define tmio_iowrite32(val, addr) \ |
| do { \ |
| writew((val), (addr)); \ |
| writew((val) >> 16, (addr) + 2); \ |
| } while (0) |
| |
| /* |
| * data for the NAND controller |
| */ |
| struct tmio_nand_data { |
| struct nand_bbt_descr *badblock_pattern; |
| struct mtd_partition *partition; |
| unsigned int num_partitions; |
| }; |
| |
| #endif |