Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * xHCI host controller driver |
| 3 | * |
| 4 | * Copyright (C) 2008 Intel Corp. |
| 5 | * |
| 6 | * Author: Sarah Sharp |
| 7 | * Some code borrowed from the Linux EHCI driver. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 15 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 16 | * for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software Foundation, |
| 20 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 21 | */ |
| 22 | |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 23 | #include <linux/pci.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 24 | #include <linux/irq.h> |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 25 | #include <linux/log2.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 26 | #include <linux/module.h> |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 27 | #include <linux/moduleparam.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/slab.h> |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 29 | |
| 30 | #include "xhci.h" |
| 31 | |
| 32 | #define DRIVER_AUTHOR "Sarah Sharp" |
| 33 | #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver" |
| 34 | |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 35 | /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */ |
| 36 | static int link_quirk; |
| 37 | module_param(link_quirk, int, S_IRUGO | S_IWUSR); |
| 38 | MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); |
| 39 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 40 | /* TODO: copied from ehci-hcd.c - can this be refactored? */ |
| 41 | /* |
| 42 | * handshake - spin reading hc until handshake completes or fails |
| 43 | * @ptr: address of hc register to be read |
| 44 | * @mask: bits to look at in result of read |
| 45 | * @done: value of those bits when handshake succeeds |
| 46 | * @usec: timeout in microseconds |
| 47 | * |
| 48 | * Returns negative errno, or zero on success |
| 49 | * |
| 50 | * Success happens when the "mask" bits have the specified value (hardware |
| 51 | * handshake done). There are two failure modes: "usec" have passed (major |
| 52 | * hardware flakeout), or the register reads as all-ones (hardware removed). |
| 53 | */ |
| 54 | static int handshake(struct xhci_hcd *xhci, void __iomem *ptr, |
| 55 | u32 mask, u32 done, int usec) |
| 56 | { |
| 57 | u32 result; |
| 58 | |
| 59 | do { |
| 60 | result = xhci_readl(xhci, ptr); |
| 61 | if (result == ~(u32)0) /* card removed */ |
| 62 | return -ENODEV; |
| 63 | result &= mask; |
| 64 | if (result == done) |
| 65 | return 0; |
| 66 | udelay(1); |
| 67 | usec--; |
| 68 | } while (usec > 0); |
| 69 | return -ETIMEDOUT; |
| 70 | } |
| 71 | |
| 72 | /* |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 73 | * Disable interrupts and begin the xHCI halting process. |
| 74 | */ |
| 75 | void xhci_quiesce(struct xhci_hcd *xhci) |
| 76 | { |
| 77 | u32 halted; |
| 78 | u32 cmd; |
| 79 | u32 mask; |
| 80 | |
| 81 | mask = ~(XHCI_IRQS); |
| 82 | halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT; |
| 83 | if (!halted) |
| 84 | mask &= ~CMD_RUN; |
| 85 | |
| 86 | cmd = xhci_readl(xhci, &xhci->op_regs->command); |
| 87 | cmd &= mask; |
| 88 | xhci_writel(xhci, cmd, &xhci->op_regs->command); |
| 89 | } |
| 90 | |
| 91 | /* |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 92 | * Force HC into halt state. |
| 93 | * |
| 94 | * Disable any IRQs and clear the run/stop bit. |
| 95 | * HC will complete any current and actively pipelined transactions, and |
Andiry Xu | bdfca50 | 2011-01-06 15:43:39 +0800 | [diff] [blame] | 96 | * should halt within 16 ms of the run/stop bit being cleared. |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 97 | * Read HC Halted bit in the status register to see when the HC is finished. |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 98 | */ |
| 99 | int xhci_halt(struct xhci_hcd *xhci) |
| 100 | { |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 101 | int ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 102 | xhci_dbg(xhci, "// Halt the HC\n"); |
Sarah Sharp | 4f0f0ba | 2009-10-27 10:56:33 -0700 | [diff] [blame] | 103 | xhci_quiesce(xhci); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 104 | |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 105 | ret = handshake(xhci, &xhci->op_regs->status, |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 106 | STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC); |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 107 | if (!ret) |
| 108 | xhci->xhc_state |= XHCI_STATE_HALTED; |
| 109 | return ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | /* |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 113 | * Set the run bit and wait for the host to be running. |
| 114 | */ |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 115 | static int xhci_start(struct xhci_hcd *xhci) |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 116 | { |
| 117 | u32 temp; |
| 118 | int ret; |
| 119 | |
| 120 | temp = xhci_readl(xhci, &xhci->op_regs->command); |
| 121 | temp |= (CMD_RUN); |
| 122 | xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n", |
| 123 | temp); |
| 124 | xhci_writel(xhci, temp, &xhci->op_regs->command); |
| 125 | |
| 126 | /* |
| 127 | * Wait for the HCHalted Status bit to be 0 to indicate the host is |
| 128 | * running. |
| 129 | */ |
| 130 | ret = handshake(xhci, &xhci->op_regs->status, |
| 131 | STS_HALT, 0, XHCI_MAX_HALT_USEC); |
| 132 | if (ret == -ETIMEDOUT) |
| 133 | xhci_err(xhci, "Host took too long to start, " |
| 134 | "waited %u microseconds.\n", |
| 135 | XHCI_MAX_HALT_USEC); |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 136 | if (!ret) |
| 137 | xhci->xhc_state &= ~XHCI_STATE_HALTED; |
Sarah Sharp | ed07453 | 2010-05-24 13:25:21 -0700 | [diff] [blame] | 138 | return ret; |
| 139 | } |
| 140 | |
| 141 | /* |
Sarah Sharp | ac04e6f | 2011-03-11 08:47:33 -0800 | [diff] [blame] | 142 | * Reset a halted HC. |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 143 | * |
| 144 | * This resets pipelines, timers, counters, state machines, etc. |
| 145 | * Transactions will be terminated immediately, and operational registers |
| 146 | * will be set to their defaults. |
| 147 | */ |
| 148 | int xhci_reset(struct xhci_hcd *xhci) |
| 149 | { |
| 150 | u32 command; |
| 151 | u32 state; |
Sarah Sharp | 2d62f3e | 2010-05-24 13:25:15 -0700 | [diff] [blame] | 152 | int ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 153 | |
| 154 | state = xhci_readl(xhci, &xhci->op_regs->status); |
Sarah Sharp | d3512f6 | 2009-07-27 12:03:50 -0700 | [diff] [blame] | 155 | if ((state & STS_HALT) == 0) { |
| 156 | xhci_warn(xhci, "Host controller not halted, aborting reset.\n"); |
| 157 | return 0; |
| 158 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 159 | |
| 160 | xhci_dbg(xhci, "// Reset the HC\n"); |
| 161 | command = xhci_readl(xhci, &xhci->op_regs->command); |
| 162 | command |= CMD_RESET; |
| 163 | xhci_writel(xhci, command, &xhci->op_regs->command); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 164 | |
Sarah Sharp | 2d62f3e | 2010-05-24 13:25:15 -0700 | [diff] [blame] | 165 | ret = handshake(xhci, &xhci->op_regs->command, |
| 166 | CMD_RESET, 0, 250 * 1000); |
| 167 | if (ret) |
| 168 | return ret; |
| 169 | |
| 170 | xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n"); |
| 171 | /* |
| 172 | * xHCI cannot write to any doorbells or operational registers other |
| 173 | * than status until the "Controller Not Ready" flag is cleared. |
| 174 | */ |
| 175 | return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 176 | } |
| 177 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 178 | #ifdef CONFIG_PCI |
| 179 | static int xhci_free_msi(struct xhci_hcd *xhci) |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 180 | { |
| 181 | int i; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 182 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 183 | if (!xhci->msix_entries) |
| 184 | return -EINVAL; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 185 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 186 | for (i = 0; i < xhci->msix_count; i++) |
| 187 | if (xhci->msix_entries[i].vector) |
| 188 | free_irq(xhci->msix_entries[i].vector, |
| 189 | xhci_to_hcd(xhci)); |
| 190 | return 0; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | /* |
| 194 | * Set up MSI |
| 195 | */ |
| 196 | static int xhci_setup_msi(struct xhci_hcd *xhci) |
| 197 | { |
| 198 | int ret; |
| 199 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 200 | |
| 201 | ret = pci_enable_msi(pdev); |
| 202 | if (ret) { |
Sarah Sharp | 3b9783b | 2011-12-22 15:02:13 -0800 | [diff] [blame] | 203 | xhci_dbg(xhci, "failed to allocate MSI entry\n"); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 204 | return ret; |
| 205 | } |
| 206 | |
| 207 | ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq, |
| 208 | 0, "xhci_hcd", xhci_to_hcd(xhci)); |
| 209 | if (ret) { |
Sarah Sharp | 3b9783b | 2011-12-22 15:02:13 -0800 | [diff] [blame] | 210 | xhci_dbg(xhci, "disable MSI interrupt\n"); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 211 | pci_disable_msi(pdev); |
| 212 | } |
| 213 | |
| 214 | return ret; |
| 215 | } |
| 216 | |
| 217 | /* |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 218 | * Free IRQs |
| 219 | * free all IRQs request |
| 220 | */ |
| 221 | static void xhci_free_irq(struct xhci_hcd *xhci) |
| 222 | { |
| 223 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 224 | int ret; |
| 225 | |
| 226 | /* return if using legacy interrupt */ |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 227 | if (xhci_to_hcd(xhci)->irq > 0) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 228 | return; |
| 229 | |
| 230 | ret = xhci_free_msi(xhci); |
| 231 | if (!ret) |
| 232 | return; |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 233 | if (pdev->irq > 0) |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 234 | free_irq(pdev->irq, xhci_to_hcd(xhci)); |
| 235 | |
| 236 | return; |
| 237 | } |
| 238 | |
| 239 | /* |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 240 | * Set up MSI-X |
| 241 | */ |
| 242 | static int xhci_setup_msix(struct xhci_hcd *xhci) |
| 243 | { |
| 244 | int i, ret = 0; |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 245 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| 246 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 247 | |
| 248 | /* |
| 249 | * calculate number of msi-x vectors supported. |
| 250 | * - HCS_MAX_INTRS: the max number of interrupts the host can handle, |
| 251 | * with max number of interrupters based on the xhci HCSPARAMS1. |
| 252 | * - num_online_cpus: maximum msi-x vectors per CPUs core. |
| 253 | * Add additional 1 vector to ensure always available interrupt. |
| 254 | */ |
| 255 | xhci->msix_count = min(num_online_cpus() + 1, |
| 256 | HCS_MAX_INTRS(xhci->hcs_params1)); |
| 257 | |
| 258 | xhci->msix_entries = |
| 259 | kmalloc((sizeof(struct msix_entry))*xhci->msix_count, |
Greg Kroah-Hartman | 8687197 | 2010-11-11 09:41:02 -0800 | [diff] [blame] | 260 | GFP_KERNEL); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 261 | if (!xhci->msix_entries) { |
| 262 | xhci_err(xhci, "Failed to allocate MSI-X entries\n"); |
| 263 | return -ENOMEM; |
| 264 | } |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 265 | |
| 266 | for (i = 0; i < xhci->msix_count; i++) { |
| 267 | xhci->msix_entries[i].entry = i; |
| 268 | xhci->msix_entries[i].vector = 0; |
| 269 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 270 | |
| 271 | ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count); |
| 272 | if (ret) { |
Sarah Sharp | 3b9783b | 2011-12-22 15:02:13 -0800 | [diff] [blame] | 273 | xhci_dbg(xhci, "Failed to enable MSI-X\n"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 274 | goto free_entries; |
| 275 | } |
| 276 | |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 277 | for (i = 0; i < xhci->msix_count; i++) { |
| 278 | ret = request_irq(xhci->msix_entries[i].vector, |
| 279 | (irq_handler_t)xhci_msi_irq, |
| 280 | 0, "xhci_hcd", xhci_to_hcd(xhci)); |
| 281 | if (ret) |
| 282 | goto disable_msix; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 283 | } |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 284 | |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 285 | hcd->msix_enabled = 1; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 286 | return ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 287 | |
| 288 | disable_msix: |
Sarah Sharp | 3b9783b | 2011-12-22 15:02:13 -0800 | [diff] [blame] | 289 | xhci_dbg(xhci, "disable MSI-X interrupt\n"); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 290 | xhci_free_irq(xhci); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 291 | pci_disable_msix(pdev); |
| 292 | free_entries: |
| 293 | kfree(xhci->msix_entries); |
| 294 | xhci->msix_entries = NULL; |
| 295 | return ret; |
| 296 | } |
| 297 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 298 | /* Free any IRQs and disable MSI-X */ |
| 299 | static void xhci_cleanup_msix(struct xhci_hcd *xhci) |
| 300 | { |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 301 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| 302 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 303 | |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 304 | xhci_free_irq(xhci); |
| 305 | |
| 306 | if (xhci->msix_entries) { |
| 307 | pci_disable_msix(pdev); |
| 308 | kfree(xhci->msix_entries); |
| 309 | xhci->msix_entries = NULL; |
| 310 | } else { |
| 311 | pci_disable_msi(pdev); |
| 312 | } |
| 313 | |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 314 | hcd->msix_enabled = 0; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 315 | return; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 316 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 317 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 318 | static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) |
| 319 | { |
| 320 | int i; |
| 321 | |
| 322 | if (xhci->msix_entries) { |
| 323 | for (i = 0; i < xhci->msix_count; i++) |
| 324 | synchronize_irq(xhci->msix_entries[i].vector); |
| 325 | } |
| 326 | } |
| 327 | |
| 328 | static int xhci_try_enable_msi(struct usb_hcd *hcd) |
| 329 | { |
| 330 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 331 | struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); |
| 332 | int ret; |
| 333 | |
| 334 | /* |
| 335 | * Some Fresco Logic host controllers advertise MSI, but fail to |
| 336 | * generate interrupts. Don't even try to enable MSI. |
| 337 | */ |
| 338 | if (xhci->quirks & XHCI_BROKEN_MSI) |
| 339 | return 0; |
| 340 | |
| 341 | /* unregister the legacy interrupt */ |
| 342 | if (hcd->irq) |
| 343 | free_irq(hcd->irq, hcd); |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 344 | hcd->irq = 0; |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 345 | |
| 346 | ret = xhci_setup_msix(xhci); |
| 347 | if (ret) |
| 348 | /* fall back to msi*/ |
| 349 | ret = xhci_setup_msi(xhci); |
| 350 | |
| 351 | if (!ret) |
Felipe Balbi | cd70469 | 2012-02-29 16:46:23 +0200 | [diff] [blame] | 352 | /* hcd->irq is 0, we have MSI */ |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 353 | return 0; |
| 354 | |
Sarah Sharp | 68d07f6 | 2012-02-13 16:25:57 -0800 | [diff] [blame] | 355 | if (!pdev->irq) { |
| 356 | xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n"); |
| 357 | return -EINVAL; |
| 358 | } |
| 359 | |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 360 | /* fall back to legacy interrupt*/ |
| 361 | ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, |
| 362 | hcd->irq_descr, hcd); |
| 363 | if (ret) { |
| 364 | xhci_err(xhci, "request interrupt %d failed\n", |
| 365 | pdev->irq); |
| 366 | return ret; |
| 367 | } |
| 368 | hcd->irq = pdev->irq; |
| 369 | return 0; |
| 370 | } |
| 371 | |
| 372 | #else |
| 373 | |
| 374 | static int xhci_try_enable_msi(struct usb_hcd *hcd) |
| 375 | { |
| 376 | return 0; |
| 377 | } |
| 378 | |
| 379 | static void xhci_cleanup_msix(struct xhci_hcd *xhci) |
| 380 | { |
| 381 | } |
| 382 | |
| 383 | static void xhci_msix_sync_irqs(struct xhci_hcd *xhci) |
| 384 | { |
| 385 | } |
| 386 | |
| 387 | #endif |
| 388 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 389 | /* |
| 390 | * Initialize memory for HCD and xHC (one-time init). |
| 391 | * |
| 392 | * Program the PAGESIZE register, initialize the device context array, create |
| 393 | * device contexts (?), set up a command ring segment (or two?), create event |
| 394 | * ring (one for now). |
| 395 | */ |
| 396 | int xhci_init(struct usb_hcd *hcd) |
| 397 | { |
| 398 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 399 | int retval = 0; |
| 400 | |
| 401 | xhci_dbg(xhci, "xhci_init\n"); |
| 402 | spin_lock_init(&xhci->lock); |
Sebastian Andrzej Siewior | d782659 | 2011-09-13 16:41:10 -0700 | [diff] [blame] | 403 | if (xhci->hci_version == 0x95 && link_quirk) { |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 404 | xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n"); |
| 405 | xhci->quirks |= XHCI_LINK_TRB_QUIRK; |
| 406 | } else { |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 407 | xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n"); |
Sarah Sharp | b0567b3 | 2009-08-07 14:04:36 -0700 | [diff] [blame] | 408 | } |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 409 | retval = xhci_mem_init(xhci, GFP_KERNEL); |
| 410 | xhci_dbg(xhci, "Finished xhci_init\n"); |
| 411 | |
| 412 | return retval; |
| 413 | } |
| 414 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 415 | /*-------------------------------------------------------------------------*/ |
| 416 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 417 | |
| 418 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 419 | static void xhci_event_ring_work(unsigned long arg) |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 420 | { |
| 421 | unsigned long flags; |
| 422 | int temp; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 423 | u64 temp_64; |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 424 | struct xhci_hcd *xhci = (struct xhci_hcd *) arg; |
| 425 | int i, j; |
| 426 | |
| 427 | xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies); |
| 428 | |
| 429 | spin_lock_irqsave(&xhci->lock, flags); |
| 430 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
| 431 | xhci_dbg(xhci, "op reg status = 0x%x\n", temp); |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 432 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || |
| 433 | (xhci->xhc_state & XHCI_STATE_HALTED)) { |
Sarah Sharp | e4ab05d | 2009-09-16 16:42:30 -0700 | [diff] [blame] | 434 | xhci_dbg(xhci, "HW died, polling stopped.\n"); |
| 435 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 436 | return; |
| 437 | } |
| 438 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 439 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
| 440 | xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp); |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 441 | xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask); |
| 442 | xhci->error_bitmask = 0; |
| 443 | xhci_dbg(xhci, "Event ring:\n"); |
| 444 | xhci_debug_segment(xhci, xhci->event_ring->deq_seg); |
| 445 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 446 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
| 447 | temp_64 &= ~ERST_PTR_MASK; |
| 448 | xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64); |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 449 | xhci_dbg(xhci, "Command ring:\n"); |
| 450 | xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg); |
| 451 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); |
| 452 | xhci_dbg_cmd_ptrs(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 453 | for (i = 0; i < MAX_HC_SLOTS; ++i) { |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 454 | if (!xhci->devs[i]) |
| 455 | continue; |
| 456 | for (j = 0; j < 31; ++j) { |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 457 | xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 458 | } |
| 459 | } |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 460 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 461 | |
| 462 | if (!xhci->zombie) |
| 463 | mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ); |
| 464 | else |
| 465 | xhci_dbg(xhci, "Quit polling the event ring.\n"); |
| 466 | } |
| 467 | #endif |
| 468 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 469 | static int xhci_run_finished(struct xhci_hcd *xhci) |
| 470 | { |
| 471 | if (xhci_start(xhci)) { |
| 472 | xhci_halt(xhci); |
| 473 | return -ENODEV; |
| 474 | } |
| 475 | xhci->shared_hcd->state = HC_STATE_RUNNING; |
| 476 | |
| 477 | if (xhci->quirks & XHCI_NEC_HOST) |
| 478 | xhci_ring_cmd_db(xhci); |
| 479 | |
| 480 | xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n"); |
| 481 | return 0; |
| 482 | } |
| 483 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 484 | /* |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 485 | * Start the HC after it was halted. |
| 486 | * |
| 487 | * This function is called by the USB core when the HC driver is added. |
| 488 | * Its opposite is xhci_stop(). |
| 489 | * |
| 490 | * xhci_init() must be called once before this function can be called. |
| 491 | * Reset the HC, enable device slot contexts, program DCBAAP, and |
| 492 | * set command ring pointer and event ring pointer. |
| 493 | * |
| 494 | * Setup MSI-X vectors and enable interrupts. |
| 495 | */ |
| 496 | int xhci_run(struct usb_hcd *hcd) |
| 497 | { |
| 498 | u32 temp; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 499 | u64 temp_64; |
Sebastian Andrzej Siewior | 3fd1ec5 | 2011-09-23 14:19:57 -0700 | [diff] [blame] | 500 | int ret; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 501 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 502 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 503 | /* Start the xHCI host controller running only after the USB 2.0 roothub |
| 504 | * is setup. |
| 505 | */ |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 506 | |
Sarah Sharp | 0f2a793 | 2009-04-27 19:57:12 -0700 | [diff] [blame] | 507 | hcd->uses_new_polling = 1; |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 508 | if (!usb_hcd_is_primary_hcd(hcd)) |
| 509 | return xhci_run_finished(xhci); |
Sarah Sharp | 0f2a793 | 2009-04-27 19:57:12 -0700 | [diff] [blame] | 510 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 511 | xhci_dbg(xhci, "xhci_run\n"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 512 | |
Sebastian Andrzej Siewior | 3fd1ec5 | 2011-09-23 14:19:57 -0700 | [diff] [blame] | 513 | ret = xhci_try_enable_msi(hcd); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 514 | if (ret) |
Sebastian Andrzej Siewior | 3fd1ec5 | 2011-09-23 14:19:57 -0700 | [diff] [blame] | 515 | return ret; |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 516 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 517 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
| 518 | init_timer(&xhci->event_ring_timer); |
| 519 | xhci->event_ring_timer.data = (unsigned long) xhci; |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 520 | xhci->event_ring_timer.function = xhci_event_ring_work; |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 521 | /* Poll the event ring */ |
| 522 | xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ; |
| 523 | xhci->zombie = 0; |
| 524 | xhci_dbg(xhci, "Setting event ring polling timer\n"); |
| 525 | add_timer(&xhci->event_ring_timer); |
| 526 | #endif |
| 527 | |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 528 | xhci_dbg(xhci, "Command ring memory map follows:\n"); |
| 529 | xhci_debug_ring(xhci, xhci->cmd_ring); |
| 530 | xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); |
| 531 | xhci_dbg_cmd_ptrs(xhci); |
| 532 | |
| 533 | xhci_dbg(xhci, "ERST memory map follows:\n"); |
| 534 | xhci_dbg_erst(xhci, &xhci->erst); |
| 535 | xhci_dbg(xhci, "Event ring:\n"); |
| 536 | xhci_debug_ring(xhci, xhci->event_ring); |
| 537 | xhci_dbg_ring_ptrs(xhci, xhci->event_ring); |
| 538 | temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
| 539 | temp_64 &= ~ERST_PTR_MASK; |
| 540 | xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64); |
| 541 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 542 | xhci_dbg(xhci, "// Set the interrupt modulation register\n"); |
| 543 | temp = xhci_readl(xhci, &xhci->ir_set->irq_control); |
Sarah Sharp | a4d8830 | 2009-05-14 11:44:26 -0700 | [diff] [blame] | 544 | temp &= ~ER_IRQ_INTERVAL_MASK; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 545 | temp |= (u32) 160; |
| 546 | xhci_writel(xhci, temp, &xhci->ir_set->irq_control); |
| 547 | |
| 548 | /* Set the HCD state before we enable the irqs */ |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 549 | temp = xhci_readl(xhci, &xhci->op_regs->command); |
| 550 | temp |= (CMD_EIE); |
| 551 | xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n", |
| 552 | temp); |
| 553 | xhci_writel(xhci, temp, &xhci->op_regs->command); |
| 554 | |
| 555 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 556 | xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n", |
| 557 | xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 558 | xhci_writel(xhci, ER_IRQ_ENABLE(temp), |
| 559 | &xhci->ir_set->irq_pending); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 560 | xhci_print_ir_set(xhci, 0); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 561 | |
Sarah Sharp | 0238634 | 2010-05-24 13:25:28 -0700 | [diff] [blame] | 562 | if (xhci->quirks & XHCI_NEC_HOST) |
| 563 | xhci_queue_vendor_command(xhci, 0, 0, 0, |
| 564 | TRB_TYPE(TRB_NEC_GET_FW)); |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 565 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 566 | xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n"); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 567 | return 0; |
| 568 | } |
| 569 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 570 | static void xhci_only_stop_hcd(struct usb_hcd *hcd) |
| 571 | { |
| 572 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 573 | |
| 574 | spin_lock_irq(&xhci->lock); |
| 575 | xhci_halt(xhci); |
| 576 | |
| 577 | /* The shared_hcd is going to be deallocated shortly (the USB core only |
| 578 | * calls this function when allocation fails in usb_add_hcd(), or |
| 579 | * usb_remove_hcd() is called). So we need to unset xHCI's pointer. |
| 580 | */ |
| 581 | xhci->shared_hcd = NULL; |
| 582 | spin_unlock_irq(&xhci->lock); |
| 583 | } |
| 584 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 585 | /* |
| 586 | * Stop xHCI driver. |
| 587 | * |
| 588 | * This function is called by the USB core when the HC driver is removed. |
| 589 | * Its opposite is xhci_run(). |
| 590 | * |
| 591 | * Disable device contexts, disable IRQs, and quiesce the HC. |
| 592 | * Reset the HC, finish any completed transactions, and cleanup memory. |
| 593 | */ |
| 594 | void xhci_stop(struct usb_hcd *hcd) |
| 595 | { |
| 596 | u32 temp; |
| 597 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 598 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 599 | if (!usb_hcd_is_primary_hcd(hcd)) { |
| 600 | xhci_only_stop_hcd(xhci->shared_hcd); |
| 601 | return; |
| 602 | } |
| 603 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 604 | spin_lock_irq(&xhci->lock); |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 605 | /* Make sure the xHC is halted for a USB3 roothub |
| 606 | * (xhci_stop() could be called as part of failed init). |
| 607 | */ |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 608 | xhci_halt(xhci); |
| 609 | xhci_reset(xhci); |
| 610 | spin_unlock_irq(&xhci->lock); |
| 611 | |
Zhang Rui | 40a9fb1 | 2010-12-17 13:17:04 -0800 | [diff] [blame] | 612 | xhci_cleanup_msix(xhci); |
| 613 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 614 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
| 615 | /* Tell the event ring poll function not to reschedule */ |
| 616 | xhci->zombie = 1; |
| 617 | del_timer_sync(&xhci->event_ring_timer); |
| 618 | #endif |
| 619 | |
Andiry Xu | c41136b | 2011-03-22 17:08:14 +0800 | [diff] [blame] | 620 | if (xhci->quirks & XHCI_AMD_PLL_FIX) |
| 621 | usb_amd_dev_put(); |
| 622 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 623 | xhci_dbg(xhci, "// Disabling event ring interrupts\n"); |
| 624 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
| 625 | xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status); |
| 626 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
| 627 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), |
| 628 | &xhci->ir_set->irq_pending); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 629 | xhci_print_ir_set(xhci, 0); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 630 | |
| 631 | xhci_dbg(xhci, "cleaning up memory\n"); |
| 632 | xhci_mem_cleanup(xhci); |
| 633 | xhci_dbg(xhci, "xhci_stop completed - status = %x\n", |
| 634 | xhci_readl(xhci, &xhci->op_regs->status)); |
| 635 | } |
| 636 | |
| 637 | /* |
| 638 | * Shutdown HC (not bus-specific) |
| 639 | * |
| 640 | * This is called when the machine is rebooting or halting. We assume that the |
| 641 | * machine will be powered off, and the HC's internal state will be reset. |
| 642 | * Don't bother to free memory. |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 643 | * |
| 644 | * This will only ever be called with the main usb_hcd (the USB3 roothub). |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 645 | */ |
| 646 | void xhci_shutdown(struct usb_hcd *hcd) |
| 647 | { |
| 648 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 649 | |
| 650 | spin_lock_irq(&xhci->lock); |
| 651 | xhci_halt(xhci); |
Dong Nguyen | 43b86af | 2010-07-21 16:56:08 -0700 | [diff] [blame] | 652 | spin_unlock_irq(&xhci->lock); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 653 | |
Zhang Rui | 40a9fb1 | 2010-12-17 13:17:04 -0800 | [diff] [blame] | 654 | xhci_cleanup_msix(xhci); |
| 655 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 656 | xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n", |
| 657 | xhci_readl(xhci, &xhci->op_regs->status)); |
| 658 | } |
| 659 | |
Sarah Sharp | b5b5c3a | 2010-10-15 11:24:14 -0700 | [diff] [blame] | 660 | #ifdef CONFIG_PM |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 661 | static void xhci_save_registers(struct xhci_hcd *xhci) |
| 662 | { |
| 663 | xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command); |
| 664 | xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification); |
| 665 | xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
| 666 | xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg); |
| 667 | xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
| 668 | xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control); |
| 669 | xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size); |
| 670 | xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base); |
| 671 | xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); |
| 672 | } |
| 673 | |
| 674 | static void xhci_restore_registers(struct xhci_hcd *xhci) |
| 675 | { |
| 676 | xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command); |
| 677 | xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification); |
| 678 | xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr); |
| 679 | xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg); |
| 680 | xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending); |
| 681 | xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control); |
| 682 | xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size); |
| 683 | xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base); |
| 684 | } |
| 685 | |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 686 | static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci) |
| 687 | { |
| 688 | u64 val_64; |
| 689 | |
| 690 | /* step 2: initialize command ring buffer */ |
| 691 | val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring); |
| 692 | val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) | |
| 693 | (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, |
| 694 | xhci->cmd_ring->dequeue) & |
| 695 | (u64) ~CMD_RING_RSVD_BITS) | |
| 696 | xhci->cmd_ring->cycle_state; |
| 697 | xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n", |
| 698 | (long unsigned long) val_64); |
| 699 | xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring); |
| 700 | } |
| 701 | |
| 702 | /* |
| 703 | * The whole command ring must be cleared to zero when we suspend the host. |
| 704 | * |
| 705 | * The host doesn't save the command ring pointer in the suspend well, so we |
| 706 | * need to re-program it on resume. Unfortunately, the pointer must be 64-byte |
| 707 | * aligned, because of the reserved bits in the command ring dequeue pointer |
| 708 | * register. Therefore, we can't just set the dequeue pointer back in the |
| 709 | * middle of the ring (TRBs are 16-byte aligned). |
| 710 | */ |
| 711 | static void xhci_clear_command_ring(struct xhci_hcd *xhci) |
| 712 | { |
| 713 | struct xhci_ring *ring; |
| 714 | struct xhci_segment *seg; |
| 715 | |
| 716 | ring = xhci->cmd_ring; |
| 717 | seg = ring->deq_seg; |
| 718 | do { |
Andiry Xu | 158886c | 2011-11-30 16:37:41 +0800 | [diff] [blame] | 719 | memset(seg->trbs, 0, |
| 720 | sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); |
| 721 | seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= |
| 722 | cpu_to_le32(~TRB_CYCLE); |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 723 | seg = seg->next; |
| 724 | } while (seg != ring->deq_seg); |
| 725 | |
| 726 | /* Reset the software enqueue and dequeue pointers */ |
| 727 | ring->deq_seg = ring->first_seg; |
| 728 | ring->dequeue = ring->first_seg->trbs; |
| 729 | ring->enq_seg = ring->deq_seg; |
| 730 | ring->enqueue = ring->dequeue; |
| 731 | |
Andiry Xu | b008df6 | 2012-03-05 17:49:34 +0800 | [diff] [blame] | 732 | ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1; |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 733 | /* |
| 734 | * Ring is now zeroed, so the HW should look for change of ownership |
| 735 | * when the cycle bit is set to 1. |
| 736 | */ |
| 737 | ring->cycle_state = 1; |
| 738 | |
| 739 | /* |
| 740 | * Reset the hardware dequeue pointer. |
| 741 | * Yes, this will need to be re-written after resume, but we're paranoid |
| 742 | * and want to make sure the hardware doesn't access bogus memory |
| 743 | * because, say, the BIOS or an SMI started the host without changing |
| 744 | * the command ring pointers. |
| 745 | */ |
| 746 | xhci_set_cmd_ring_deq(xhci); |
| 747 | } |
| 748 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 749 | /* |
| 750 | * Stop HC (not bus-specific) |
| 751 | * |
| 752 | * This is called when the machine transition into S3/S4 mode. |
| 753 | * |
| 754 | */ |
| 755 | int xhci_suspend(struct xhci_hcd *xhci) |
| 756 | { |
| 757 | int rc = 0; |
| 758 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
| 759 | u32 command; |
| 760 | |
| 761 | spin_lock_irq(&xhci->lock); |
| 762 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 763 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 764 | /* step 1: stop endpoint */ |
| 765 | /* skipped assuming that port suspend has done */ |
| 766 | |
| 767 | /* step 2: clear Run/Stop bit */ |
| 768 | command = xhci_readl(xhci, &xhci->op_regs->command); |
| 769 | command &= ~CMD_RUN; |
| 770 | xhci_writel(xhci, command, &xhci->op_regs->command); |
| 771 | if (handshake(xhci, &xhci->op_regs->status, |
| 772 | STS_HALT, STS_HALT, 100*100)) { |
| 773 | xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n"); |
| 774 | spin_unlock_irq(&xhci->lock); |
| 775 | return -ETIMEDOUT; |
| 776 | } |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 777 | xhci_clear_command_ring(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 778 | |
| 779 | /* step 3: save registers */ |
| 780 | xhci_save_registers(xhci); |
| 781 | |
| 782 | /* step 4: set CSS flag */ |
| 783 | command = xhci_readl(xhci, &xhci->op_regs->command); |
| 784 | command |= CMD_CSS; |
| 785 | xhci_writel(xhci, command, &xhci->op_regs->command); |
| 786 | if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) { |
| 787 | xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n"); |
| 788 | spin_unlock_irq(&xhci->lock); |
| 789 | return -ETIMEDOUT; |
| 790 | } |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 791 | spin_unlock_irq(&xhci->lock); |
| 792 | |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 793 | /* step 5: remove core well power */ |
| 794 | /* synchronize irq when using MSI-X */ |
Sebastian Andrzej Siewior | 421aa84 | 2011-09-23 14:19:58 -0700 | [diff] [blame] | 795 | xhci_msix_sync_irqs(xhci); |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 796 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 797 | return rc; |
| 798 | } |
| 799 | |
| 800 | /* |
| 801 | * start xHC (not bus-specific) |
| 802 | * |
| 803 | * This is called when the machine transition from S3/S4 mode. |
| 804 | * |
| 805 | */ |
| 806 | int xhci_resume(struct xhci_hcd *xhci, bool hibernated) |
| 807 | { |
| 808 | u32 command, temp = 0; |
| 809 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
Sarah Sharp | 65b22f9 | 2010-12-17 12:35:05 -0800 | [diff] [blame] | 810 | struct usb_hcd *secondary_hcd; |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 811 | int retval = 0; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 812 | |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 813 | /* Wait a bit if either of the roothubs need to settle from the |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 814 | * transition into bus suspend. |
Sarah Sharp | 20b67cf | 2010-12-15 12:47:14 -0800 | [diff] [blame] | 815 | */ |
Sarah Sharp | f6ff0ac | 2010-12-16 11:21:10 -0800 | [diff] [blame] | 816 | if (time_before(jiffies, xhci->bus_state[0].next_statechange) || |
| 817 | time_before(jiffies, |
| 818 | xhci->bus_state[1].next_statechange)) |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 819 | msleep(100); |
| 820 | |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 821 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); |
| 822 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); |
| 823 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 824 | spin_lock_irq(&xhci->lock); |
Maarten Lankhorst | c877b3b | 2011-06-15 23:47:21 +0200 | [diff] [blame] | 825 | if (xhci->quirks & XHCI_RESET_ON_RESUME) |
| 826 | hibernated = true; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 827 | |
| 828 | if (!hibernated) { |
| 829 | /* step 1: restore register */ |
| 830 | xhci_restore_registers(xhci); |
| 831 | /* step 2: initialize command ring buffer */ |
Sarah Sharp | 8982132 | 2010-11-12 11:59:31 -0800 | [diff] [blame] | 832 | xhci_set_cmd_ring_deq(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 833 | /* step 3: restore state and start state*/ |
| 834 | /* step 3: set CRS flag */ |
| 835 | command = xhci_readl(xhci, &xhci->op_regs->command); |
| 836 | command |= CMD_CRS; |
| 837 | xhci_writel(xhci, command, &xhci->op_regs->command); |
| 838 | if (handshake(xhci, &xhci->op_regs->status, |
| 839 | STS_RESTORE, 0, 10*100)) { |
| 840 | xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n"); |
| 841 | spin_unlock_irq(&xhci->lock); |
| 842 | return -ETIMEDOUT; |
| 843 | } |
| 844 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
| 845 | } |
| 846 | |
| 847 | /* If restore operation fails, re-initialize the HC during resume */ |
| 848 | if ((temp & STS_SRE) || hibernated) { |
Sarah Sharp | fedd383 | 2011-04-12 17:43:19 -0700 | [diff] [blame] | 849 | /* Let the USB core know _both_ roothubs lost power. */ |
| 850 | usb_root_hub_lost_power(xhci->main_hcd->self.root_hub); |
| 851 | usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 852 | |
| 853 | xhci_dbg(xhci, "Stop HCD\n"); |
| 854 | xhci_halt(xhci); |
| 855 | xhci_reset(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 856 | spin_unlock_irq(&xhci->lock); |
Andiry Xu | 0029227 | 2010-12-27 17:39:02 +0800 | [diff] [blame] | 857 | xhci_cleanup_msix(xhci); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 858 | |
| 859 | #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING |
| 860 | /* Tell the event ring poll function not to reschedule */ |
| 861 | xhci->zombie = 1; |
| 862 | del_timer_sync(&xhci->event_ring_timer); |
| 863 | #endif |
| 864 | |
| 865 | xhci_dbg(xhci, "// Disabling event ring interrupts\n"); |
| 866 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
| 867 | xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status); |
| 868 | temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); |
| 869 | xhci_writel(xhci, ER_IRQ_DISABLE(temp), |
| 870 | &xhci->ir_set->irq_pending); |
Dmitry Torokhov | 09ece30 | 2011-02-08 16:29:33 -0800 | [diff] [blame] | 871 | xhci_print_ir_set(xhci, 0); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 872 | |
| 873 | xhci_dbg(xhci, "cleaning up memory\n"); |
| 874 | xhci_mem_cleanup(xhci); |
| 875 | xhci_dbg(xhci, "xhci_stop completed - status = %x\n", |
| 876 | xhci_readl(xhci, &xhci->op_regs->status)); |
| 877 | |
Sarah Sharp | 65b22f9 | 2010-12-17 12:35:05 -0800 | [diff] [blame] | 878 | /* USB core calls the PCI reinit and start functions twice: |
| 879 | * first with the primary HCD, and then with the secondary HCD. |
| 880 | * If we don't do the same, the host will never be started. |
| 881 | */ |
| 882 | if (!usb_hcd_is_primary_hcd(hcd)) |
| 883 | secondary_hcd = hcd; |
| 884 | else |
| 885 | secondary_hcd = xhci->shared_hcd; |
| 886 | |
| 887 | xhci_dbg(xhci, "Initialize the xhci_hcd\n"); |
| 888 | retval = xhci_init(hcd->primary_hcd); |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 889 | if (retval) |
| 890 | return retval; |
Sarah Sharp | 65b22f9 | 2010-12-17 12:35:05 -0800 | [diff] [blame] | 891 | xhci_dbg(xhci, "Start the primary HCD\n"); |
| 892 | retval = xhci_run(hcd->primary_hcd); |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 893 | if (!retval) { |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 894 | xhci_dbg(xhci, "Start the secondary HCD\n"); |
| 895 | retval = xhci_run(secondary_hcd); |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 896 | } |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 897 | hcd->state = HC_STATE_SUSPENDED; |
Sarah Sharp | b320937 | 2011-03-07 11:24:07 -0800 | [diff] [blame] | 898 | xhci->shared_hcd->state = HC_STATE_SUSPENDED; |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 899 | goto done; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 900 | } |
| 901 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 902 | /* step 4: set Run/Stop bit */ |
| 903 | command = xhci_readl(xhci, &xhci->op_regs->command); |
| 904 | command |= CMD_RUN; |
| 905 | xhci_writel(xhci, command, &xhci->op_regs->command); |
| 906 | handshake(xhci, &xhci->op_regs->status, STS_HALT, |
| 907 | 0, 250 * 1000); |
| 908 | |
| 909 | /* step 5: walk topology and initialize portsc, |
| 910 | * portpmsc and portli |
| 911 | */ |
| 912 | /* this is done in bus_resume */ |
| 913 | |
| 914 | /* step 6: restart each of the previously |
| 915 | * Running endpoints by ringing their doorbells |
| 916 | */ |
| 917 | |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 918 | spin_unlock_irq(&xhci->lock); |
Alan Stern | f69e3120 | 2011-11-03 11:37:10 -0400 | [diff] [blame] | 919 | |
| 920 | done: |
| 921 | if (retval == 0) { |
| 922 | usb_hcd_resume_root_hub(hcd); |
| 923 | usb_hcd_resume_root_hub(xhci->shared_hcd); |
| 924 | } |
| 925 | return retval; |
Andiry Xu | 5535b1d | 2010-10-14 07:23:06 -0700 | [diff] [blame] | 926 | } |
Sarah Sharp | b5b5c3a | 2010-10-15 11:24:14 -0700 | [diff] [blame] | 927 | #endif /* CONFIG_PM */ |
| 928 | |
Sarah Sharp | 7f84eef | 2009-04-27 19:53:56 -0700 | [diff] [blame] | 929 | /*-------------------------------------------------------------------------*/ |
| 930 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 931 | /** |
| 932 | * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and |
| 933 | * HCDs. Find the index for an endpoint given its descriptor. Use the return |
| 934 | * value to right shift 1 for the bitmask. |
| 935 | * |
| 936 | * Index = (epnum * 2) + direction - 1, |
| 937 | * where direction = 0 for OUT, 1 for IN. |
| 938 | * For control endpoints, the IN index is used (OUT index is unused), so |
| 939 | * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2) |
| 940 | */ |
| 941 | unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc) |
| 942 | { |
| 943 | unsigned int index; |
| 944 | if (usb_endpoint_xfer_control(desc)) |
| 945 | index = (unsigned int) (usb_endpoint_num(desc)*2); |
| 946 | else |
| 947 | index = (unsigned int) (usb_endpoint_num(desc)*2) + |
| 948 | (usb_endpoint_dir_in(desc) ? 1 : 0) - 1; |
| 949 | return index; |
| 950 | } |
| 951 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 952 | /* Find the flag for this endpoint (for use in the control context). Use the |
| 953 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is |
| 954 | * bit 1, etc. |
| 955 | */ |
| 956 | unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc) |
| 957 | { |
| 958 | return 1 << (xhci_get_endpoint_index(desc) + 1); |
| 959 | } |
| 960 | |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 961 | /* Find the flag for this endpoint (for use in the control context). Use the |
| 962 | * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is |
| 963 | * bit 1, etc. |
| 964 | */ |
| 965 | unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index) |
| 966 | { |
| 967 | return 1 << (ep_index + 1); |
| 968 | } |
| 969 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 970 | /* Compute the last valid endpoint context index. Basically, this is the |
| 971 | * endpoint index plus one. For slot contexts with more than valid endpoint, |
| 972 | * we find the most significant bit set in the added contexts flags. |
| 973 | * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000 |
| 974 | * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one. |
| 975 | */ |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 976 | unsigned int xhci_last_valid_endpoint(u32 added_ctxs) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 977 | { |
| 978 | return fls(added_ctxs) - 1; |
| 979 | } |
| 980 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 981 | /* Returns 1 if the arguments are OK; |
| 982 | * returns 0 this is a root hub; returns -EINVAL for NULL pointers. |
| 983 | */ |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 984 | static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 985 | struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev, |
| 986 | const char *func) { |
| 987 | struct xhci_hcd *xhci; |
| 988 | struct xhci_virt_device *virt_dev; |
| 989 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 990 | if (!hcd || (check_ep && !ep) || !udev) { |
| 991 | printk(KERN_DEBUG "xHCI %s called with invalid args\n", |
| 992 | func); |
| 993 | return -EINVAL; |
| 994 | } |
| 995 | if (!udev->parent) { |
| 996 | printk(KERN_DEBUG "xHCI %s called for root hub\n", |
| 997 | func); |
| 998 | return 0; |
| 999 | } |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1000 | |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 1001 | xhci = hcd_to_xhci(hcd); |
| 1002 | if (xhci->xhc_state & XHCI_STATE_HALTED) |
| 1003 | return -ENODEV; |
| 1004 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1005 | if (check_virt_dev) { |
sifram.rajas@gmail.com | 73ddc24 | 2011-09-02 11:06:00 -0700 | [diff] [blame] | 1006 | if (!udev->slot_id || !xhci->devs[udev->slot_id]) { |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1007 | printk(KERN_DEBUG "xHCI %s called with unaddressed " |
| 1008 | "device\n", func); |
| 1009 | return -EINVAL; |
| 1010 | } |
| 1011 | |
| 1012 | virt_dev = xhci->devs[udev->slot_id]; |
| 1013 | if (virt_dev->udev != udev) { |
| 1014 | printk(KERN_DEBUG "xHCI %s called with udev and " |
| 1015 | "virt_dev does not match\n", func); |
| 1016 | return -EINVAL; |
| 1017 | } |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1018 | } |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1019 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1020 | return 1; |
| 1021 | } |
| 1022 | |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1023 | static int xhci_configure_endpoint(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1024 | struct usb_device *udev, struct xhci_command *command, |
| 1025 | bool ctx_change, bool must_succeed); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1026 | |
| 1027 | /* |
| 1028 | * Full speed devices may have a max packet size greater than 8 bytes, but the |
| 1029 | * USB core doesn't know that until it reads the first 8 bytes of the |
| 1030 | * descriptor. If the usb_device's max packet size changes after that point, |
| 1031 | * we need to issue an evaluate context command and wait on it. |
| 1032 | */ |
| 1033 | static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id, |
| 1034 | unsigned int ep_index, struct urb *urb) |
| 1035 | { |
| 1036 | struct xhci_container_ctx *in_ctx; |
| 1037 | struct xhci_container_ctx *out_ctx; |
| 1038 | struct xhci_input_control_ctx *ctrl_ctx; |
| 1039 | struct xhci_ep_ctx *ep_ctx; |
| 1040 | int max_packet_size; |
| 1041 | int hw_max_packet_size; |
| 1042 | int ret = 0; |
| 1043 | |
| 1044 | out_ctx = xhci->devs[slot_id]->out_ctx; |
| 1045 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1046 | hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2)); |
Kuninori Morimoto | 29cc889 | 2011-08-23 03:12:03 -0700 | [diff] [blame] | 1047 | max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1048 | if (hw_max_packet_size != max_packet_size) { |
| 1049 | xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n"); |
| 1050 | xhci_dbg(xhci, "Max packet size in usb_device = %d\n", |
| 1051 | max_packet_size); |
| 1052 | xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n", |
| 1053 | hw_max_packet_size); |
| 1054 | xhci_dbg(xhci, "Issuing evaluate context command.\n"); |
| 1055 | |
| 1056 | /* Set up the modified control endpoint 0 */ |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1057 | xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, |
| 1058 | xhci->devs[slot_id]->out_ctx, ep_index); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1059 | in_ctx = xhci->devs[slot_id]->in_ctx; |
| 1060 | ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1061 | ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK); |
| 1062 | ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size)); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1063 | |
| 1064 | /* Set up the input context flags for the command */ |
| 1065 | /* FIXME: This won't work if a non-default control endpoint |
| 1066 | * changes max packet sizes. |
| 1067 | */ |
| 1068 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1069 | ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1070 | ctrl_ctx->drop_flags = 0; |
| 1071 | |
| 1072 | xhci_dbg(xhci, "Slot %d input context\n", slot_id); |
| 1073 | xhci_dbg_ctx(xhci, in_ctx, ep_index); |
| 1074 | xhci_dbg(xhci, "Slot %d output context\n", slot_id); |
| 1075 | xhci_dbg_ctx(xhci, out_ctx, ep_index); |
| 1076 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1077 | ret = xhci_configure_endpoint(xhci, urb->dev, NULL, |
| 1078 | true, false); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1079 | |
| 1080 | /* Clean up the input context for later use by bandwidth |
| 1081 | * functions. |
| 1082 | */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1083 | ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1084 | } |
| 1085 | return ret; |
| 1086 | } |
| 1087 | |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1088 | /* |
| 1089 | * non-error returns are a promise to giveback() the urb later |
| 1090 | * we drop ownership so next owner (or urb unlink) can get it |
| 1091 | */ |
| 1092 | int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) |
| 1093 | { |
| 1094 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1095 | struct xhci_td *buffer; |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1096 | unsigned long flags; |
| 1097 | int ret = 0; |
| 1098 | unsigned int slot_id, ep_index; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1099 | struct urb_priv *urb_priv; |
| 1100 | int size, i; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1101 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1102 | if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, |
| 1103 | true, true, __func__) <= 0) |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1104 | return -EINVAL; |
| 1105 | |
| 1106 | slot_id = urb->dev->slot_id; |
| 1107 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1108 | |
Alan Stern | 541c7d4 | 2010-06-22 16:39:10 -0400 | [diff] [blame] | 1109 | if (!HCD_HW_ACCESSIBLE(hcd)) { |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1110 | if (!in_interrupt()) |
| 1111 | xhci_dbg(xhci, "urb submitted during PCI suspend\n"); |
| 1112 | ret = -ESHUTDOWN; |
| 1113 | goto exit; |
| 1114 | } |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1115 | |
| 1116 | if (usb_endpoint_xfer_isoc(&urb->ep->desc)) |
| 1117 | size = urb->number_of_packets; |
| 1118 | else |
| 1119 | size = 1; |
| 1120 | |
| 1121 | urb_priv = kzalloc(sizeof(struct urb_priv) + |
| 1122 | size * sizeof(struct xhci_td *), mem_flags); |
| 1123 | if (!urb_priv) |
| 1124 | return -ENOMEM; |
| 1125 | |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1126 | buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags); |
| 1127 | if (!buffer) { |
| 1128 | kfree(urb_priv); |
| 1129 | return -ENOMEM; |
| 1130 | } |
| 1131 | |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1132 | for (i = 0; i < size; i++) { |
Andiry Xu | 2ffdea2 | 2011-09-02 11:05:57 -0700 | [diff] [blame] | 1133 | urb_priv->td[i] = buffer; |
| 1134 | buffer++; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1135 | } |
| 1136 | |
| 1137 | urb_priv->length = size; |
| 1138 | urb_priv->td_cnt = 0; |
| 1139 | urb->hcpriv = urb_priv; |
| 1140 | |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1141 | if (usb_endpoint_xfer_control(&urb->ep->desc)) { |
| 1142 | /* Check to see if the max packet size for the default control |
| 1143 | * endpoint changed during FS device enumeration |
| 1144 | */ |
| 1145 | if (urb->dev->speed == USB_SPEED_FULL) { |
| 1146 | ret = xhci_check_maxpacket(xhci, slot_id, |
| 1147 | ep_index, urb); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1148 | if (ret < 0) { |
| 1149 | xhci_urb_free_priv(xhci, urb_priv); |
| 1150 | urb->hcpriv = NULL; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1151 | return ret; |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1152 | } |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1153 | } |
| 1154 | |
Sarah Sharp | b11069f | 2009-07-27 12:03:23 -0700 | [diff] [blame] | 1155 | /* We have a spinlock and interrupts disabled, so we must pass |
| 1156 | * atomic context to this function, which may allocate memory. |
| 1157 | */ |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1158 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1159 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1160 | goto dying; |
Sarah Sharp | b11069f | 2009-07-27 12:03:23 -0700 | [diff] [blame] | 1161 | ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 1162 | slot_id, ep_index); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1163 | if (ret) |
| 1164 | goto free_priv; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1165 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 1166 | } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { |
| 1167 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1168 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1169 | goto dying; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 1170 | if (xhci->devs[slot_id]->eps[ep_index].ep_state & |
| 1171 | EP_GETTING_STREAMS) { |
| 1172 | xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep " |
| 1173 | "is transitioning to using streams.\n"); |
| 1174 | ret = -EINVAL; |
| 1175 | } else if (xhci->devs[slot_id]->eps[ep_index].ep_state & |
| 1176 | EP_GETTING_NO_STREAMS) { |
| 1177 | xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep " |
| 1178 | "is transitioning to " |
| 1179 | "not having streams.\n"); |
| 1180 | ret = -EINVAL; |
| 1181 | } else { |
| 1182 | ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, |
| 1183 | slot_id, ep_index); |
| 1184 | } |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1185 | if (ret) |
| 1186 | goto free_priv; |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1187 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 624defa | 2009-09-02 12:14:28 -0700 | [diff] [blame] | 1188 | } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { |
| 1189 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1190 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1191 | goto dying; |
Sarah Sharp | 624defa | 2009-09-02 12:14:28 -0700 | [diff] [blame] | 1192 | ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, |
| 1193 | slot_id, ep_index); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1194 | if (ret) |
| 1195 | goto free_priv; |
Sarah Sharp | 624defa | 2009-09-02 12:14:28 -0700 | [diff] [blame] | 1196 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1197 | } else { |
Andiry Xu | 787f4e5 | 2010-07-22 15:23:52 -0700 | [diff] [blame] | 1198 | spin_lock_irqsave(&xhci->lock, flags); |
| 1199 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1200 | goto dying; |
| 1201 | ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb, |
| 1202 | slot_id, ep_index); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1203 | if (ret) |
| 1204 | goto free_priv; |
Andiry Xu | 787f4e5 | 2010-07-22 15:23:52 -0700 | [diff] [blame] | 1205 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 2d3f1fa | 2009-08-07 14:04:49 -0700 | [diff] [blame] | 1206 | } |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1207 | exit: |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1208 | return ret; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1209 | dying: |
| 1210 | xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for " |
| 1211 | "non-responsive xHCI host.\n", |
| 1212 | urb->ep->desc.bEndpointAddress, urb); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1213 | ret = -ESHUTDOWN; |
| 1214 | free_priv: |
| 1215 | xhci_urb_free_priv(xhci, urb_priv); |
| 1216 | urb->hcpriv = NULL; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1217 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | d13565c | 2011-07-22 14:34:34 -0700 | [diff] [blame] | 1218 | return ret; |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1219 | } |
| 1220 | |
Sarah Sharp | 021bff9 | 2010-07-29 22:12:20 -0700 | [diff] [blame] | 1221 | /* Get the right ring for the given URB. |
| 1222 | * If the endpoint supports streams, boundary check the URB's stream ID. |
| 1223 | * If the endpoint doesn't support streams, return the singular endpoint ring. |
| 1224 | */ |
| 1225 | static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci, |
| 1226 | struct urb *urb) |
| 1227 | { |
| 1228 | unsigned int slot_id; |
| 1229 | unsigned int ep_index; |
| 1230 | unsigned int stream_id; |
| 1231 | struct xhci_virt_ep *ep; |
| 1232 | |
| 1233 | slot_id = urb->dev->slot_id; |
| 1234 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
| 1235 | stream_id = urb->stream_id; |
| 1236 | ep = &xhci->devs[slot_id]->eps[ep_index]; |
| 1237 | /* Common case: no streams */ |
| 1238 | if (!(ep->ep_state & EP_HAS_STREAMS)) |
| 1239 | return ep->ring; |
| 1240 | |
| 1241 | if (stream_id == 0) { |
| 1242 | xhci_warn(xhci, |
| 1243 | "WARN: Slot ID %u, ep index %u has streams, " |
| 1244 | "but URB has no stream ID.\n", |
| 1245 | slot_id, ep_index); |
| 1246 | return NULL; |
| 1247 | } |
| 1248 | |
| 1249 | if (stream_id < ep->stream_info->num_streams) |
| 1250 | return ep->stream_info->stream_rings[stream_id]; |
| 1251 | |
| 1252 | xhci_warn(xhci, |
| 1253 | "WARN: Slot ID %u, ep index %u has " |
| 1254 | "stream IDs 1 to %u allocated, " |
| 1255 | "but stream ID %u is requested.\n", |
| 1256 | slot_id, ep_index, |
| 1257 | ep->stream_info->num_streams - 1, |
| 1258 | stream_id); |
| 1259 | return NULL; |
| 1260 | } |
| 1261 | |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1262 | /* |
| 1263 | * Remove the URB's TD from the endpoint ring. This may cause the HC to stop |
| 1264 | * USB transfers, potentially stopping in the middle of a TRB buffer. The HC |
| 1265 | * should pick up where it left off in the TD, unless a Set Transfer Ring |
| 1266 | * Dequeue Pointer is issued. |
| 1267 | * |
| 1268 | * The TRBs that make up the buffers for the canceled URB will be "removed" from |
| 1269 | * the ring. Since the ring is a contiguous structure, they can't be physically |
| 1270 | * removed. Instead, there are two options: |
| 1271 | * |
| 1272 | * 1) If the HC is in the middle of processing the URB to be canceled, we |
| 1273 | * simply move the ring's dequeue pointer past those TRBs using the Set |
| 1274 | * Transfer Ring Dequeue Pointer command. This will be the common case, |
| 1275 | * when drivers timeout on the last submitted URB and attempt to cancel. |
| 1276 | * |
| 1277 | * 2) If the HC is in the middle of a different TD, we turn the TRBs into a |
| 1278 | * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The |
| 1279 | * HC will need to invalidate the any TRBs it has cached after the stop |
| 1280 | * endpoint command, as noted in the xHCI 0.95 errata. |
| 1281 | * |
| 1282 | * 3) The TD may have completed by the time the Stop Endpoint Command |
| 1283 | * completes, so software needs to handle that case too. |
| 1284 | * |
| 1285 | * This function should protect against the TD enqueueing code ringing the |
| 1286 | * doorbell while this code is waiting for a Stop Endpoint command to complete. |
| 1287 | * It also needs to account for multiple cancellations on happening at the same |
| 1288 | * time for the same endpoint. |
| 1289 | * |
| 1290 | * Note that this function can be called in any context, or so says |
| 1291 | * usb_hcd_unlink_urb() |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1292 | */ |
| 1293 | int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) |
| 1294 | { |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1295 | unsigned long flags; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1296 | int ret, i; |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1297 | u32 temp; |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1298 | struct xhci_hcd *xhci; |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1299 | struct urb_priv *urb_priv; |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1300 | struct xhci_td *td; |
| 1301 | unsigned int ep_index; |
| 1302 | struct xhci_ring *ep_ring; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1303 | struct xhci_virt_ep *ep; |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1304 | |
| 1305 | xhci = hcd_to_xhci(hcd); |
| 1306 | spin_lock_irqsave(&xhci->lock, flags); |
| 1307 | /* Make sure the URB hasn't completed or been unlinked already */ |
| 1308 | ret = usb_hcd_check_unlink_urb(hcd, urb, status); |
| 1309 | if (ret || !urb->hcpriv) |
| 1310 | goto done; |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1311 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
Sarah Sharp | c6cc27c | 2011-03-11 10:20:58 -0800 | [diff] [blame] | 1312 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) { |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1313 | xhci_dbg(xhci, "HW died, freeing TD.\n"); |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1314 | urb_priv = urb->hcpriv; |
Sarah Sharp | 585df1d | 2011-08-02 15:43:40 -0700 | [diff] [blame] | 1315 | for (i = urb_priv->td_cnt; i < urb_priv->length; i++) { |
| 1316 | td = urb_priv->td[i]; |
| 1317 | if (!list_empty(&td->td_list)) |
| 1318 | list_del_init(&td->td_list); |
| 1319 | if (!list_empty(&td->cancelled_td_list)) |
| 1320 | list_del_init(&td->cancelled_td_list); |
| 1321 | } |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1322 | |
| 1323 | usb_hcd_unlink_urb_from_ep(hcd, urb); |
| 1324 | spin_unlock_irqrestore(&xhci->lock, flags); |
Sarah Sharp | 214f76f | 2010-10-26 11:22:02 -0700 | [diff] [blame] | 1325 | usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN); |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1326 | xhci_urb_free_priv(xhci, urb_priv); |
Sarah Sharp | e34b2fb | 2009-09-28 17:21:37 -0700 | [diff] [blame] | 1327 | return ret; |
| 1328 | } |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 1329 | if ((xhci->xhc_state & XHCI_STATE_DYING) || |
| 1330 | (xhci->xhc_state & XHCI_STATE_HALTED)) { |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1331 | xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on " |
| 1332 | "non-responsive xHCI host.\n", |
| 1333 | urb->ep->desc.bEndpointAddress, urb); |
| 1334 | /* Let the stop endpoint command watchdog timer (which set this |
| 1335 | * state) finish cleaning up the endpoint TD lists. We must |
| 1336 | * have caught it in the middle of dropping a lock and giving |
| 1337 | * back an URB. |
| 1338 | */ |
| 1339 | goto done; |
| 1340 | } |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1341 | |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1342 | ep_index = xhci_get_endpoint_index(&urb->ep->desc); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 1343 | ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index]; |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 1344 | ep_ring = xhci_urb_to_transfer_ring(xhci, urb); |
| 1345 | if (!ep_ring) { |
| 1346 | ret = -EINVAL; |
| 1347 | goto done; |
| 1348 | } |
| 1349 | |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1350 | urb_priv = urb->hcpriv; |
Sarah Sharp | 79688ac | 2011-12-19 16:56:04 -0800 | [diff] [blame] | 1351 | i = urb_priv->td_cnt; |
| 1352 | if (i < urb_priv->length) |
| 1353 | xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, " |
| 1354 | "starting at offset 0x%llx\n", |
| 1355 | urb, urb->dev->devpath, |
| 1356 | urb->ep->desc.bEndpointAddress, |
| 1357 | (unsigned long long) xhci_trb_virt_to_dma( |
| 1358 | urb_priv->td[i]->start_seg, |
| 1359 | urb_priv->td[i]->first_trb)); |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1360 | |
Sarah Sharp | 79688ac | 2011-12-19 16:56:04 -0800 | [diff] [blame] | 1361 | for (; i < urb_priv->length; i++) { |
Andiry Xu | 8e51adc | 2010-07-22 15:23:31 -0700 | [diff] [blame] | 1362 | td = urb_priv->td[i]; |
| 1363 | list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list); |
| 1364 | } |
| 1365 | |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1366 | /* Queue a stop endpoint command, but only if this is |
| 1367 | * the first cancellation to be handled. |
| 1368 | */ |
Sarah Sharp | 678539c | 2009-10-27 10:55:52 -0700 | [diff] [blame] | 1369 | if (!(ep->ep_state & EP_HALT_PENDING)) { |
| 1370 | ep->ep_state |= EP_HALT_PENDING; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 1371 | ep->stop_cmds_pending++; |
| 1372 | ep->stop_cmd_timer.expires = jiffies + |
| 1373 | XHCI_STOP_EP_CMD_TIMEOUT * HZ; |
| 1374 | add_timer(&ep->stop_cmd_timer); |
Andiry Xu | be88fe4 | 2010-10-14 07:22:57 -0700 | [diff] [blame] | 1375 | xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0); |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 1376 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | ae63674 | 2009-04-29 19:02:31 -0700 | [diff] [blame] | 1377 | } |
| 1378 | done: |
| 1379 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 1380 | return ret; |
Sarah Sharp | d0e96f5 | 2009-04-27 19:58:01 -0700 | [diff] [blame] | 1381 | } |
| 1382 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1383 | /* Drop an endpoint from a new bandwidth configuration for this device. |
| 1384 | * Only one call to this function is allowed per endpoint before |
| 1385 | * check_bandwidth() or reset_bandwidth() must be called. |
| 1386 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will |
| 1387 | * add the endpoint to the schedule with possibly new parameters denoted by a |
| 1388 | * different endpoint descriptor in usb_host_endpoint. |
| 1389 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is |
| 1390 | * not allowed. |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1391 | * |
| 1392 | * The USB core will not allow URBs to be queued to an endpoint that is being |
| 1393 | * disabled, so there's no need for mutual exclusion to protect |
| 1394 | * the xhci->devs[slot_id] structure. |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1395 | */ |
| 1396 | int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, |
| 1397 | struct usb_host_endpoint *ep) |
| 1398 | { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1399 | struct xhci_hcd *xhci; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1400 | struct xhci_container_ctx *in_ctx, *out_ctx; |
| 1401 | struct xhci_input_control_ctx *ctrl_ctx; |
| 1402 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1403 | unsigned int last_ctx; |
| 1404 | unsigned int ep_index; |
| 1405 | struct xhci_ep_ctx *ep_ctx; |
| 1406 | u32 drop_flag; |
| 1407 | u32 new_add_flags, new_drop_flags, new_slot_info; |
| 1408 | int ret; |
| 1409 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1410 | ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1411 | if (ret <= 0) |
| 1412 | return ret; |
| 1413 | xhci = hcd_to_xhci(hcd); |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 1414 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1415 | return -ENODEV; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1416 | |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 1417 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1418 | drop_flag = xhci_get_endpoint_flag(&ep->desc); |
| 1419 | if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) { |
| 1420 | xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n", |
| 1421 | __func__, drop_flag); |
| 1422 | return 0; |
| 1423 | } |
| 1424 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1425 | in_ctx = xhci->devs[udev->slot_id]->in_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1426 | out_ctx = xhci->devs[udev->slot_id]->out_ctx; |
| 1427 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1428 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1429 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1430 | /* If the HC already knows the endpoint is disabled, |
| 1431 | * or the HCD has noted it is disabled, ignore this request |
| 1432 | */ |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 1433 | if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == |
| 1434 | cpu_to_le32(EP_STATE_DISABLED)) || |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1435 | le32_to_cpu(ctrl_ctx->drop_flags) & |
| 1436 | xhci_get_endpoint_flag(&ep->desc)) { |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1437 | xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", |
| 1438 | __func__, ep); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1439 | return 0; |
| 1440 | } |
| 1441 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1442 | ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag); |
| 1443 | new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1444 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1445 | ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag); |
| 1446 | new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1447 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1448 | last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags)); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1449 | slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1450 | /* Update the last valid endpoint context, if we deleted the last one */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1451 | if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) > |
| 1452 | LAST_CTX(last_ctx)) { |
| 1453 | slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); |
| 1454 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx)); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1455 | } |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1456 | new_slot_info = le32_to_cpu(slot_ctx->dev_info); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1457 | |
| 1458 | xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); |
| 1459 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1460 | xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", |
| 1461 | (unsigned int) ep->desc.bEndpointAddress, |
| 1462 | udev->slot_id, |
| 1463 | (unsigned int) new_drop_flags, |
| 1464 | (unsigned int) new_add_flags, |
| 1465 | (unsigned int) new_slot_info); |
| 1466 | return 0; |
| 1467 | } |
| 1468 | |
| 1469 | /* Add an endpoint to a new possible bandwidth configuration for this device. |
| 1470 | * Only one call to this function is allowed per endpoint before |
| 1471 | * check_bandwidth() or reset_bandwidth() must be called. |
| 1472 | * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will |
| 1473 | * add the endpoint to the schedule with possibly new parameters denoted by a |
| 1474 | * different endpoint descriptor in usb_host_endpoint. |
| 1475 | * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is |
| 1476 | * not allowed. |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1477 | * |
| 1478 | * The USB core will not allow URBs to be queued to an endpoint until the |
| 1479 | * configuration or alt setting is installed in the device, so there's no need |
| 1480 | * for mutual exclusion to protect the xhci->devs[slot_id] structure. |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1481 | */ |
| 1482 | int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, |
| 1483 | struct usb_host_endpoint *ep) |
| 1484 | { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1485 | struct xhci_hcd *xhci; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1486 | struct xhci_container_ctx *in_ctx, *out_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1487 | unsigned int ep_index; |
| 1488 | struct xhci_ep_ctx *ep_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1489 | struct xhci_slot_ctx *slot_ctx; |
| 1490 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1491 | u32 added_ctxs; |
| 1492 | unsigned int last_ctx; |
| 1493 | u32 new_add_flags, new_drop_flags, new_slot_info; |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1494 | struct xhci_virt_device *virt_dev; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1495 | int ret = 0; |
| 1496 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 1497 | ret = xhci_check_args(hcd, udev, ep, 1, true, __func__); |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 1498 | if (ret <= 0) { |
| 1499 | /* So we won't queue a reset ep command for a root hub */ |
| 1500 | ep->hcpriv = NULL; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1501 | return ret; |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 1502 | } |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1503 | xhci = hcd_to_xhci(hcd); |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 1504 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 1505 | return -ENODEV; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1506 | |
| 1507 | added_ctxs = xhci_get_endpoint_flag(&ep->desc); |
| 1508 | last_ctx = xhci_last_valid_endpoint(added_ctxs); |
| 1509 | if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) { |
| 1510 | /* FIXME when we have to issue an evaluate endpoint command to |
| 1511 | * deal with ep0 max packet size changing once we get the |
| 1512 | * descriptors |
| 1513 | */ |
| 1514 | xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n", |
| 1515 | __func__, added_ctxs); |
| 1516 | return 0; |
| 1517 | } |
| 1518 | |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1519 | virt_dev = xhci->devs[udev->slot_id]; |
| 1520 | in_ctx = virt_dev->in_ctx; |
| 1521 | out_ctx = virt_dev->out_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1522 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1523 | ep_index = xhci_get_endpoint_index(&ep->desc); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1524 | ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index); |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1525 | |
| 1526 | /* If this endpoint is already in use, and the upper layers are trying |
| 1527 | * to add it again without dropping it, reject the addition. |
| 1528 | */ |
| 1529 | if (virt_dev->eps[ep_index].ring && |
| 1530 | !(le32_to_cpu(ctrl_ctx->drop_flags) & |
| 1531 | xhci_get_endpoint_flag(&ep->desc))) { |
| 1532 | xhci_warn(xhci, "Trying to add endpoint 0x%x " |
| 1533 | "without dropping it.\n", |
| 1534 | (unsigned int) ep->desc.bEndpointAddress); |
| 1535 | return -EINVAL; |
| 1536 | } |
| 1537 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1538 | /* If the HCD has already noted the endpoint is enabled, |
| 1539 | * ignore this request. |
| 1540 | */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1541 | if (le32_to_cpu(ctrl_ctx->add_flags) & |
| 1542 | xhci_get_endpoint_flag(&ep->desc)) { |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 1543 | xhci_warn(xhci, "xHCI %s called with enabled ep %p\n", |
| 1544 | __func__, ep); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1545 | return 0; |
| 1546 | } |
| 1547 | |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 1548 | /* |
| 1549 | * Configuration and alternate setting changes must be done in |
| 1550 | * process context, not interrupt context (or so documenation |
| 1551 | * for usb_set_interface() and usb_set_configuration() claim). |
| 1552 | */ |
Sarah Sharp | fa75ac3 | 2011-06-05 23:10:04 -0700 | [diff] [blame] | 1553 | if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1554 | dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n", |
| 1555 | __func__, ep->desc.bEndpointAddress); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1556 | return -ENOMEM; |
| 1557 | } |
| 1558 | |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1559 | ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs); |
| 1560 | new_add_flags = le32_to_cpu(ctrl_ctx->add_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1561 | |
| 1562 | /* If xhci_endpoint_disable() was called for this endpoint, but the |
| 1563 | * xHC hasn't been notified yet through the check_bandwidth() call, |
| 1564 | * this re-adds a new state for the endpoint from the new endpoint |
| 1565 | * descriptors. We must drop and re-add this endpoint, so we leave the |
| 1566 | * drop flags alone. |
| 1567 | */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1568 | new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1569 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1570 | slot_ctx = xhci_get_slot_ctx(xhci, in_ctx); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1571 | /* Update the last valid endpoint context, if we just added one past */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1572 | if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) < |
| 1573 | LAST_CTX(last_ctx)) { |
| 1574 | slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); |
| 1575 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx)); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1576 | } |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1577 | new_slot_info = le32_to_cpu(slot_ctx->dev_info); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1578 | |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 1579 | /* Store the usb_device pointer for later use */ |
| 1580 | ep->hcpriv = udev; |
| 1581 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1582 | xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", |
| 1583 | (unsigned int) ep->desc.bEndpointAddress, |
| 1584 | udev->slot_id, |
| 1585 | (unsigned int) new_drop_flags, |
| 1586 | (unsigned int) new_add_flags, |
| 1587 | (unsigned int) new_slot_info); |
| 1588 | return 0; |
| 1589 | } |
| 1590 | |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1591 | static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev) |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1592 | { |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1593 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1594 | struct xhci_ep_ctx *ep_ctx; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1595 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1596 | int i; |
| 1597 | |
| 1598 | /* When a device's add flag and drop flag are zero, any subsequent |
| 1599 | * configure endpoint command will leave that endpoint's state |
| 1600 | * untouched. Make sure we don't leave any old state in the input |
| 1601 | * endpoint contexts. |
| 1602 | */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1603 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); |
| 1604 | ctrl_ctx->drop_flags = 0; |
| 1605 | ctrl_ctx->add_flags = 0; |
| 1606 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1607 | slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1608 | /* Endpoint 0 is always valid */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 1609 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1)); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1610 | for (i = 1; i < 31; ++i) { |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 1611 | ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1612 | ep_ctx->ep_info = 0; |
| 1613 | ep_ctx->ep_info2 = 0; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 1614 | ep_ctx->deq = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 1615 | ep_ctx->tx_info = 0; |
| 1616 | } |
| 1617 | } |
| 1618 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1619 | static int xhci_configure_endpoint_result(struct xhci_hcd *xhci, |
Sarah Sharp | 00161f7 | 2011-04-28 12:23:23 -0700 | [diff] [blame] | 1620 | struct usb_device *udev, u32 *cmd_status) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1621 | { |
| 1622 | int ret; |
| 1623 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1624 | switch (*cmd_status) { |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1625 | case COMP_ENOMEM: |
| 1626 | dev_warn(&udev->dev, "Not enough host controller resources " |
| 1627 | "for new device state.\n"); |
| 1628 | ret = -ENOMEM; |
| 1629 | /* FIXME: can we allocate more resources for the HC? */ |
| 1630 | break; |
| 1631 | case COMP_BW_ERR: |
Hans de Goede | 71d8572 | 2012-01-04 23:29:18 +0100 | [diff] [blame] | 1632 | case COMP_2ND_BW_ERR: |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1633 | dev_warn(&udev->dev, "Not enough bandwidth " |
| 1634 | "for new device state.\n"); |
| 1635 | ret = -ENOSPC; |
| 1636 | /* FIXME: can we go back to the old state? */ |
| 1637 | break; |
| 1638 | case COMP_TRB_ERR: |
| 1639 | /* the HCD set up something wrong */ |
| 1640 | dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, " |
| 1641 | "add flag = 1, " |
| 1642 | "and endpoint is not disabled.\n"); |
| 1643 | ret = -EINVAL; |
| 1644 | break; |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 1645 | case COMP_DEV_ERR: |
| 1646 | dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint " |
| 1647 | "configure command.\n"); |
| 1648 | ret = -ENODEV; |
| 1649 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1650 | case COMP_SUCCESS: |
| 1651 | dev_dbg(&udev->dev, "Successful Endpoint Configure command\n"); |
| 1652 | ret = 0; |
| 1653 | break; |
| 1654 | default: |
| 1655 | xhci_err(xhci, "ERROR: unexpected command completion " |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1656 | "code 0x%x.\n", *cmd_status); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1657 | ret = -EINVAL; |
| 1658 | break; |
| 1659 | } |
| 1660 | return ret; |
| 1661 | } |
| 1662 | |
| 1663 | static int xhci_evaluate_context_result(struct xhci_hcd *xhci, |
Sarah Sharp | 00161f7 | 2011-04-28 12:23:23 -0700 | [diff] [blame] | 1664 | struct usb_device *udev, u32 *cmd_status) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1665 | { |
| 1666 | int ret; |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1667 | struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id]; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1668 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1669 | switch (*cmd_status) { |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1670 | case COMP_EINVAL: |
| 1671 | dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate " |
| 1672 | "context command.\n"); |
| 1673 | ret = -EINVAL; |
| 1674 | break; |
| 1675 | case COMP_EBADSLT: |
| 1676 | dev_warn(&udev->dev, "WARN: slot not enabled for" |
| 1677 | "evaluate context command.\n"); |
| 1678 | case COMP_CTX_STATE: |
| 1679 | dev_warn(&udev->dev, "WARN: invalid context state for " |
| 1680 | "evaluate context command.\n"); |
| 1681 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1); |
| 1682 | ret = -EINVAL; |
| 1683 | break; |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 1684 | case COMP_DEV_ERR: |
| 1685 | dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate " |
| 1686 | "context command.\n"); |
| 1687 | ret = -ENODEV; |
| 1688 | break; |
Alex He | 1bb73a8 | 2011-05-05 18:14:12 +0800 | [diff] [blame] | 1689 | case COMP_MEL_ERR: |
| 1690 | /* Max Exit Latency too large error */ |
| 1691 | dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n"); |
| 1692 | ret = -EINVAL; |
| 1693 | break; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1694 | case COMP_SUCCESS: |
| 1695 | dev_dbg(&udev->dev, "Successful evaluate context command\n"); |
| 1696 | ret = 0; |
| 1697 | break; |
| 1698 | default: |
| 1699 | xhci_err(xhci, "ERROR: unexpected command completion " |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 1700 | "code 0x%x.\n", *cmd_status); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 1701 | ret = -EINVAL; |
| 1702 | break; |
| 1703 | } |
| 1704 | return ret; |
| 1705 | } |
| 1706 | |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 1707 | static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci, |
| 1708 | struct xhci_container_ctx *in_ctx) |
| 1709 | { |
| 1710 | struct xhci_input_control_ctx *ctrl_ctx; |
| 1711 | u32 valid_add_flags; |
| 1712 | u32 valid_drop_flags; |
| 1713 | |
| 1714 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
| 1715 | /* Ignore the slot flag (bit 0), and the default control endpoint flag |
| 1716 | * (bit 1). The default control endpoint is added during the Address |
| 1717 | * Device command and is never removed until the slot is disabled. |
| 1718 | */ |
| 1719 | valid_add_flags = ctrl_ctx->add_flags >> 2; |
| 1720 | valid_drop_flags = ctrl_ctx->drop_flags >> 2; |
| 1721 | |
| 1722 | /* Use hweight32 to count the number of ones in the add flags, or |
| 1723 | * number of endpoints added. Don't count endpoints that are changed |
| 1724 | * (both added and dropped). |
| 1725 | */ |
| 1726 | return hweight32(valid_add_flags) - |
| 1727 | hweight32(valid_add_flags & valid_drop_flags); |
| 1728 | } |
| 1729 | |
| 1730 | static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci, |
| 1731 | struct xhci_container_ctx *in_ctx) |
| 1732 | { |
| 1733 | struct xhci_input_control_ctx *ctrl_ctx; |
| 1734 | u32 valid_add_flags; |
| 1735 | u32 valid_drop_flags; |
| 1736 | |
| 1737 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
| 1738 | valid_add_flags = ctrl_ctx->add_flags >> 2; |
| 1739 | valid_drop_flags = ctrl_ctx->drop_flags >> 2; |
| 1740 | |
| 1741 | return hweight32(valid_drop_flags) - |
| 1742 | hweight32(valid_add_flags & valid_drop_flags); |
| 1743 | } |
| 1744 | |
| 1745 | /* |
| 1746 | * We need to reserve the new number of endpoints before the configure endpoint |
| 1747 | * command completes. We can't subtract the dropped endpoints from the number |
| 1748 | * of active endpoints until the command completes because we can oversubscribe |
| 1749 | * the host in this case: |
| 1750 | * |
| 1751 | * - the first configure endpoint command drops more endpoints than it adds |
| 1752 | * - a second configure endpoint command that adds more endpoints is queued |
| 1753 | * - the first configure endpoint command fails, so the config is unchanged |
| 1754 | * - the second command may succeed, even though there isn't enough resources |
| 1755 | * |
| 1756 | * Must be called with xhci->lock held. |
| 1757 | */ |
| 1758 | static int xhci_reserve_host_resources(struct xhci_hcd *xhci, |
| 1759 | struct xhci_container_ctx *in_ctx) |
| 1760 | { |
| 1761 | u32 added_eps; |
| 1762 | |
| 1763 | added_eps = xhci_count_num_new_endpoints(xhci, in_ctx); |
| 1764 | if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) { |
| 1765 | xhci_dbg(xhci, "Not enough ep ctxs: " |
| 1766 | "%u active, need to add %u, limit is %u.\n", |
| 1767 | xhci->num_active_eps, added_eps, |
| 1768 | xhci->limit_active_eps); |
| 1769 | return -ENOMEM; |
| 1770 | } |
| 1771 | xhci->num_active_eps += added_eps; |
| 1772 | xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps, |
| 1773 | xhci->num_active_eps); |
| 1774 | return 0; |
| 1775 | } |
| 1776 | |
| 1777 | /* |
| 1778 | * The configure endpoint was failed by the xHC for some other reason, so we |
| 1779 | * need to revert the resources that failed configuration would have used. |
| 1780 | * |
| 1781 | * Must be called with xhci->lock held. |
| 1782 | */ |
| 1783 | static void xhci_free_host_resources(struct xhci_hcd *xhci, |
| 1784 | struct xhci_container_ctx *in_ctx) |
| 1785 | { |
| 1786 | u32 num_failed_eps; |
| 1787 | |
| 1788 | num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx); |
| 1789 | xhci->num_active_eps -= num_failed_eps; |
| 1790 | xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n", |
| 1791 | num_failed_eps, |
| 1792 | xhci->num_active_eps); |
| 1793 | } |
| 1794 | |
| 1795 | /* |
| 1796 | * Now that the command has completed, clean up the active endpoint count by |
| 1797 | * subtracting out the endpoints that were dropped (but not changed). |
| 1798 | * |
| 1799 | * Must be called with xhci->lock held. |
| 1800 | */ |
| 1801 | static void xhci_finish_resource_reservation(struct xhci_hcd *xhci, |
| 1802 | struct xhci_container_ctx *in_ctx) |
| 1803 | { |
| 1804 | u32 num_dropped_eps; |
| 1805 | |
| 1806 | num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx); |
| 1807 | xhci->num_active_eps -= num_dropped_eps; |
| 1808 | if (num_dropped_eps) |
| 1809 | xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n", |
| 1810 | num_dropped_eps, |
| 1811 | xhci->num_active_eps); |
| 1812 | } |
| 1813 | |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 1814 | unsigned int xhci_get_block_size(struct usb_device *udev) |
| 1815 | { |
| 1816 | switch (udev->speed) { |
| 1817 | case USB_SPEED_LOW: |
| 1818 | case USB_SPEED_FULL: |
| 1819 | return FS_BLOCK; |
| 1820 | case USB_SPEED_HIGH: |
| 1821 | return HS_BLOCK; |
| 1822 | case USB_SPEED_SUPER: |
| 1823 | return SS_BLOCK; |
| 1824 | case USB_SPEED_UNKNOWN: |
| 1825 | case USB_SPEED_WIRELESS: |
| 1826 | default: |
| 1827 | /* Should never happen */ |
| 1828 | return 1; |
| 1829 | } |
| 1830 | } |
| 1831 | |
| 1832 | unsigned int xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw) |
| 1833 | { |
| 1834 | if (interval_bw->overhead[LS_OVERHEAD_TYPE]) |
| 1835 | return LS_OVERHEAD; |
| 1836 | if (interval_bw->overhead[FS_OVERHEAD_TYPE]) |
| 1837 | return FS_OVERHEAD; |
| 1838 | return HS_OVERHEAD; |
| 1839 | } |
| 1840 | |
| 1841 | /* If we are changing a LS/FS device under a HS hub, |
| 1842 | * make sure (if we are activating a new TT) that the HS bus has enough |
| 1843 | * bandwidth for this new TT. |
| 1844 | */ |
| 1845 | static int xhci_check_tt_bw_table(struct xhci_hcd *xhci, |
| 1846 | struct xhci_virt_device *virt_dev, |
| 1847 | int old_active_eps) |
| 1848 | { |
| 1849 | struct xhci_interval_bw_table *bw_table; |
| 1850 | struct xhci_tt_bw_info *tt_info; |
| 1851 | |
| 1852 | /* Find the bandwidth table for the root port this TT is attached to. */ |
| 1853 | bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table; |
| 1854 | tt_info = virt_dev->tt_info; |
| 1855 | /* If this TT already had active endpoints, the bandwidth for this TT |
| 1856 | * has already been added. Removing all periodic endpoints (and thus |
| 1857 | * making the TT enactive) will only decrease the bandwidth used. |
| 1858 | */ |
| 1859 | if (old_active_eps) |
| 1860 | return 0; |
| 1861 | if (old_active_eps == 0 && tt_info->active_eps != 0) { |
| 1862 | if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT) |
| 1863 | return -ENOMEM; |
| 1864 | return 0; |
| 1865 | } |
| 1866 | /* Not sure why we would have no new active endpoints... |
| 1867 | * |
| 1868 | * Maybe because of an Evaluate Context change for a hub update or a |
| 1869 | * control endpoint 0 max packet size change? |
| 1870 | * FIXME: skip the bandwidth calculation in that case. |
| 1871 | */ |
| 1872 | return 0; |
| 1873 | } |
| 1874 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 1875 | static int xhci_check_ss_bw(struct xhci_hcd *xhci, |
| 1876 | struct xhci_virt_device *virt_dev) |
| 1877 | { |
| 1878 | unsigned int bw_reserved; |
| 1879 | |
| 1880 | bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100); |
| 1881 | if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved)) |
| 1882 | return -ENOMEM; |
| 1883 | |
| 1884 | bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100); |
| 1885 | if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved)) |
| 1886 | return -ENOMEM; |
| 1887 | |
| 1888 | return 0; |
| 1889 | } |
| 1890 | |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 1891 | /* |
| 1892 | * This algorithm is a very conservative estimate of the worst-case scheduling |
| 1893 | * scenario for any one interval. The hardware dynamically schedules the |
| 1894 | * packets, so we can't tell which microframe could be the limiting factor in |
| 1895 | * the bandwidth scheduling. This only takes into account periodic endpoints. |
| 1896 | * |
| 1897 | * Obviously, we can't solve an NP complete problem to find the minimum worst |
| 1898 | * case scenario. Instead, we come up with an estimate that is no less than |
| 1899 | * the worst case bandwidth used for any one microframe, but may be an |
| 1900 | * over-estimate. |
| 1901 | * |
| 1902 | * We walk the requirements for each endpoint by interval, starting with the |
| 1903 | * smallest interval, and place packets in the schedule where there is only one |
| 1904 | * possible way to schedule packets for that interval. In order to simplify |
| 1905 | * this algorithm, we record the largest max packet size for each interval, and |
| 1906 | * assume all packets will be that size. |
| 1907 | * |
| 1908 | * For interval 0, we obviously must schedule all packets for each interval. |
| 1909 | * The bandwidth for interval 0 is just the amount of data to be transmitted |
| 1910 | * (the sum of all max ESIT payload sizes, plus any overhead per packet times |
| 1911 | * the number of packets). |
| 1912 | * |
| 1913 | * For interval 1, we have two possible microframes to schedule those packets |
| 1914 | * in. For this algorithm, if we can schedule the same number of packets for |
| 1915 | * each possible scheduling opportunity (each microframe), we will do so. The |
| 1916 | * remaining number of packets will be saved to be transmitted in the gaps in |
| 1917 | * the next interval's scheduling sequence. |
| 1918 | * |
| 1919 | * As we move those remaining packets to be scheduled with interval 2 packets, |
| 1920 | * we have to double the number of remaining packets to transmit. This is |
| 1921 | * because the intervals are actually powers of 2, and we would be transmitting |
| 1922 | * the previous interval's packets twice in this interval. We also have to be |
| 1923 | * sure that when we look at the largest max packet size for this interval, we |
| 1924 | * also look at the largest max packet size for the remaining packets and take |
| 1925 | * the greater of the two. |
| 1926 | * |
| 1927 | * The algorithm continues to evenly distribute packets in each scheduling |
| 1928 | * opportunity, and push the remaining packets out, until we get to the last |
| 1929 | * interval. Then those packets and their associated overhead are just added |
| 1930 | * to the bandwidth used. |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 1931 | */ |
| 1932 | static int xhci_check_bw_table(struct xhci_hcd *xhci, |
| 1933 | struct xhci_virt_device *virt_dev, |
| 1934 | int old_active_eps) |
| 1935 | { |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 1936 | unsigned int bw_reserved; |
| 1937 | unsigned int max_bandwidth; |
| 1938 | unsigned int bw_used; |
| 1939 | unsigned int block_size; |
| 1940 | struct xhci_interval_bw_table *bw_table; |
| 1941 | unsigned int packet_size = 0; |
| 1942 | unsigned int overhead = 0; |
| 1943 | unsigned int packets_transmitted = 0; |
| 1944 | unsigned int packets_remaining = 0; |
| 1945 | unsigned int i; |
| 1946 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 1947 | if (virt_dev->udev->speed == USB_SPEED_SUPER) |
| 1948 | return xhci_check_ss_bw(xhci, virt_dev); |
| 1949 | |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 1950 | if (virt_dev->udev->speed == USB_SPEED_HIGH) { |
| 1951 | max_bandwidth = HS_BW_LIMIT; |
| 1952 | /* Convert percent of bus BW reserved to blocks reserved */ |
| 1953 | bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100); |
| 1954 | } else { |
| 1955 | max_bandwidth = FS_BW_LIMIT; |
| 1956 | bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100); |
| 1957 | } |
| 1958 | |
| 1959 | bw_table = virt_dev->bw_table; |
| 1960 | /* We need to translate the max packet size and max ESIT payloads into |
| 1961 | * the units the hardware uses. |
| 1962 | */ |
| 1963 | block_size = xhci_get_block_size(virt_dev->udev); |
| 1964 | |
| 1965 | /* If we are manipulating a LS/FS device under a HS hub, double check |
| 1966 | * that the HS bus has enough bandwidth if we are activing a new TT. |
| 1967 | */ |
| 1968 | if (virt_dev->tt_info) { |
| 1969 | xhci_dbg(xhci, "Recalculating BW for rootport %u\n", |
| 1970 | virt_dev->real_port); |
| 1971 | if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) { |
| 1972 | xhci_warn(xhci, "Not enough bandwidth on HS bus for " |
| 1973 | "newly activated TT.\n"); |
| 1974 | return -ENOMEM; |
| 1975 | } |
| 1976 | xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n", |
| 1977 | virt_dev->tt_info->slot_id, |
| 1978 | virt_dev->tt_info->ttport); |
| 1979 | } else { |
| 1980 | xhci_dbg(xhci, "Recalculating BW for rootport %u\n", |
| 1981 | virt_dev->real_port); |
| 1982 | } |
| 1983 | |
| 1984 | /* Add in how much bandwidth will be used for interval zero, or the |
| 1985 | * rounded max ESIT payload + number of packets * largest overhead. |
| 1986 | */ |
| 1987 | bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) + |
| 1988 | bw_table->interval_bw[0].num_packets * |
| 1989 | xhci_get_largest_overhead(&bw_table->interval_bw[0]); |
| 1990 | |
| 1991 | for (i = 1; i < XHCI_MAX_INTERVAL; i++) { |
| 1992 | unsigned int bw_added; |
| 1993 | unsigned int largest_mps; |
| 1994 | unsigned int interval_overhead; |
| 1995 | |
| 1996 | /* |
| 1997 | * How many packets could we transmit in this interval? |
| 1998 | * If packets didn't fit in the previous interval, we will need |
| 1999 | * to transmit that many packets twice within this interval. |
| 2000 | */ |
| 2001 | packets_remaining = 2 * packets_remaining + |
| 2002 | bw_table->interval_bw[i].num_packets; |
| 2003 | |
| 2004 | /* Find the largest max packet size of this or the previous |
| 2005 | * interval. |
| 2006 | */ |
| 2007 | if (list_empty(&bw_table->interval_bw[i].endpoints)) |
| 2008 | largest_mps = 0; |
| 2009 | else { |
| 2010 | struct xhci_virt_ep *virt_ep; |
| 2011 | struct list_head *ep_entry; |
| 2012 | |
| 2013 | ep_entry = bw_table->interval_bw[i].endpoints.next; |
| 2014 | virt_ep = list_entry(ep_entry, |
| 2015 | struct xhci_virt_ep, bw_endpoint_list); |
| 2016 | /* Convert to blocks, rounding up */ |
| 2017 | largest_mps = DIV_ROUND_UP( |
| 2018 | virt_ep->bw_info.max_packet_size, |
| 2019 | block_size); |
| 2020 | } |
| 2021 | if (largest_mps > packet_size) |
| 2022 | packet_size = largest_mps; |
| 2023 | |
| 2024 | /* Use the larger overhead of this or the previous interval. */ |
| 2025 | interval_overhead = xhci_get_largest_overhead( |
| 2026 | &bw_table->interval_bw[i]); |
| 2027 | if (interval_overhead > overhead) |
| 2028 | overhead = interval_overhead; |
| 2029 | |
| 2030 | /* How many packets can we evenly distribute across |
| 2031 | * (1 << (i + 1)) possible scheduling opportunities? |
| 2032 | */ |
| 2033 | packets_transmitted = packets_remaining >> (i + 1); |
| 2034 | |
| 2035 | /* Add in the bandwidth used for those scheduled packets */ |
| 2036 | bw_added = packets_transmitted * (overhead + packet_size); |
| 2037 | |
| 2038 | /* How many packets do we have remaining to transmit? */ |
| 2039 | packets_remaining = packets_remaining % (1 << (i + 1)); |
| 2040 | |
| 2041 | /* What largest max packet size should those packets have? */ |
| 2042 | /* If we've transmitted all packets, don't carry over the |
| 2043 | * largest packet size. |
| 2044 | */ |
| 2045 | if (packets_remaining == 0) { |
| 2046 | packet_size = 0; |
| 2047 | overhead = 0; |
| 2048 | } else if (packets_transmitted > 0) { |
| 2049 | /* Otherwise if we do have remaining packets, and we've |
| 2050 | * scheduled some packets in this interval, take the |
| 2051 | * largest max packet size from endpoints with this |
| 2052 | * interval. |
| 2053 | */ |
| 2054 | packet_size = largest_mps; |
| 2055 | overhead = interval_overhead; |
| 2056 | } |
| 2057 | /* Otherwise carry over packet_size and overhead from the last |
| 2058 | * time we had a remainder. |
| 2059 | */ |
| 2060 | bw_used += bw_added; |
| 2061 | if (bw_used > max_bandwidth) { |
| 2062 | xhci_warn(xhci, "Not enough bandwidth. " |
| 2063 | "Proposed: %u, Max: %u\n", |
| 2064 | bw_used, max_bandwidth); |
| 2065 | return -ENOMEM; |
| 2066 | } |
| 2067 | } |
| 2068 | /* |
| 2069 | * Ok, we know we have some packets left over after even-handedly |
| 2070 | * scheduling interval 15. We don't know which microframes they will |
| 2071 | * fit into, so we over-schedule and say they will be scheduled every |
| 2072 | * microframe. |
| 2073 | */ |
| 2074 | if (packets_remaining > 0) |
| 2075 | bw_used += overhead + packet_size; |
| 2076 | |
| 2077 | if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) { |
| 2078 | unsigned int port_index = virt_dev->real_port - 1; |
| 2079 | |
| 2080 | /* OK, we're manipulating a HS device attached to a |
| 2081 | * root port bandwidth domain. Include the number of active TTs |
| 2082 | * in the bandwidth used. |
| 2083 | */ |
| 2084 | bw_used += TT_HS_OVERHEAD * |
| 2085 | xhci->rh_bw[port_index].num_active_tts; |
| 2086 | } |
| 2087 | |
| 2088 | xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, " |
| 2089 | "Available: %u " "percent\n", |
| 2090 | bw_used, max_bandwidth, bw_reserved, |
| 2091 | (max_bandwidth - bw_used - bw_reserved) * 100 / |
| 2092 | max_bandwidth); |
| 2093 | |
| 2094 | bw_used += bw_reserved; |
| 2095 | if (bw_used > max_bandwidth) { |
| 2096 | xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n", |
| 2097 | bw_used, max_bandwidth); |
| 2098 | return -ENOMEM; |
| 2099 | } |
| 2100 | |
| 2101 | bw_table->bw_used = bw_used; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2102 | return 0; |
| 2103 | } |
| 2104 | |
| 2105 | static bool xhci_is_async_ep(unsigned int ep_type) |
| 2106 | { |
| 2107 | return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP && |
| 2108 | ep_type != ISOC_IN_EP && |
| 2109 | ep_type != INT_IN_EP); |
| 2110 | } |
| 2111 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2112 | static bool xhci_is_sync_in_ep(unsigned int ep_type) |
| 2113 | { |
| 2114 | return (ep_type == ISOC_IN_EP || ep_type != INT_IN_EP); |
| 2115 | } |
| 2116 | |
| 2117 | static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw) |
| 2118 | { |
| 2119 | unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK); |
| 2120 | |
| 2121 | if (ep_bw->ep_interval == 0) |
| 2122 | return SS_OVERHEAD_BURST + |
| 2123 | (ep_bw->mult * ep_bw->num_packets * |
| 2124 | (SS_OVERHEAD + mps)); |
| 2125 | return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets * |
| 2126 | (SS_OVERHEAD + mps + SS_OVERHEAD_BURST), |
| 2127 | 1 << ep_bw->ep_interval); |
| 2128 | |
| 2129 | } |
| 2130 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2131 | void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci, |
| 2132 | struct xhci_bw_info *ep_bw, |
| 2133 | struct xhci_interval_bw_table *bw_table, |
| 2134 | struct usb_device *udev, |
| 2135 | struct xhci_virt_ep *virt_ep, |
| 2136 | struct xhci_tt_bw_info *tt_info) |
| 2137 | { |
| 2138 | struct xhci_interval_bw *interval_bw; |
| 2139 | int normalized_interval; |
| 2140 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2141 | if (xhci_is_async_ep(ep_bw->type)) |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2142 | return; |
| 2143 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2144 | if (udev->speed == USB_SPEED_SUPER) { |
| 2145 | if (xhci_is_sync_in_ep(ep_bw->type)) |
| 2146 | xhci->devs[udev->slot_id]->bw_table->ss_bw_in -= |
| 2147 | xhci_get_ss_bw_consumed(ep_bw); |
| 2148 | else |
| 2149 | xhci->devs[udev->slot_id]->bw_table->ss_bw_out -= |
| 2150 | xhci_get_ss_bw_consumed(ep_bw); |
| 2151 | return; |
| 2152 | } |
| 2153 | |
| 2154 | /* SuperSpeed endpoints never get added to intervals in the table, so |
| 2155 | * this check is only valid for HS/FS/LS devices. |
| 2156 | */ |
| 2157 | if (list_empty(&virt_ep->bw_endpoint_list)) |
| 2158 | return; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2159 | /* For LS/FS devices, we need to translate the interval expressed in |
| 2160 | * microframes to frames. |
| 2161 | */ |
| 2162 | if (udev->speed == USB_SPEED_HIGH) |
| 2163 | normalized_interval = ep_bw->ep_interval; |
| 2164 | else |
| 2165 | normalized_interval = ep_bw->ep_interval - 3; |
| 2166 | |
| 2167 | if (normalized_interval == 0) |
| 2168 | bw_table->interval0_esit_payload -= ep_bw->max_esit_payload; |
| 2169 | interval_bw = &bw_table->interval_bw[normalized_interval]; |
| 2170 | interval_bw->num_packets -= ep_bw->num_packets; |
| 2171 | switch (udev->speed) { |
| 2172 | case USB_SPEED_LOW: |
| 2173 | interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1; |
| 2174 | break; |
| 2175 | case USB_SPEED_FULL: |
| 2176 | interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1; |
| 2177 | break; |
| 2178 | case USB_SPEED_HIGH: |
| 2179 | interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1; |
| 2180 | break; |
| 2181 | case USB_SPEED_SUPER: |
| 2182 | case USB_SPEED_UNKNOWN: |
| 2183 | case USB_SPEED_WIRELESS: |
| 2184 | /* Should never happen because only LS/FS/HS endpoints will get |
| 2185 | * added to the endpoint list. |
| 2186 | */ |
| 2187 | return; |
| 2188 | } |
| 2189 | if (tt_info) |
| 2190 | tt_info->active_eps -= 1; |
| 2191 | list_del_init(&virt_ep->bw_endpoint_list); |
| 2192 | } |
| 2193 | |
| 2194 | static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci, |
| 2195 | struct xhci_bw_info *ep_bw, |
| 2196 | struct xhci_interval_bw_table *bw_table, |
| 2197 | struct usb_device *udev, |
| 2198 | struct xhci_virt_ep *virt_ep, |
| 2199 | struct xhci_tt_bw_info *tt_info) |
| 2200 | { |
| 2201 | struct xhci_interval_bw *interval_bw; |
| 2202 | struct xhci_virt_ep *smaller_ep; |
| 2203 | int normalized_interval; |
| 2204 | |
| 2205 | if (xhci_is_async_ep(ep_bw->type)) |
| 2206 | return; |
| 2207 | |
Sarah Sharp | 2b69899 | 2011-09-13 16:41:13 -0700 | [diff] [blame] | 2208 | if (udev->speed == USB_SPEED_SUPER) { |
| 2209 | if (xhci_is_sync_in_ep(ep_bw->type)) |
| 2210 | xhci->devs[udev->slot_id]->bw_table->ss_bw_in += |
| 2211 | xhci_get_ss_bw_consumed(ep_bw); |
| 2212 | else |
| 2213 | xhci->devs[udev->slot_id]->bw_table->ss_bw_out += |
| 2214 | xhci_get_ss_bw_consumed(ep_bw); |
| 2215 | return; |
| 2216 | } |
| 2217 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2218 | /* For LS/FS devices, we need to translate the interval expressed in |
| 2219 | * microframes to frames. |
| 2220 | */ |
| 2221 | if (udev->speed == USB_SPEED_HIGH) |
| 2222 | normalized_interval = ep_bw->ep_interval; |
| 2223 | else |
| 2224 | normalized_interval = ep_bw->ep_interval - 3; |
| 2225 | |
| 2226 | if (normalized_interval == 0) |
| 2227 | bw_table->interval0_esit_payload += ep_bw->max_esit_payload; |
| 2228 | interval_bw = &bw_table->interval_bw[normalized_interval]; |
| 2229 | interval_bw->num_packets += ep_bw->num_packets; |
| 2230 | switch (udev->speed) { |
| 2231 | case USB_SPEED_LOW: |
| 2232 | interval_bw->overhead[LS_OVERHEAD_TYPE] += 1; |
| 2233 | break; |
| 2234 | case USB_SPEED_FULL: |
| 2235 | interval_bw->overhead[FS_OVERHEAD_TYPE] += 1; |
| 2236 | break; |
| 2237 | case USB_SPEED_HIGH: |
| 2238 | interval_bw->overhead[HS_OVERHEAD_TYPE] += 1; |
| 2239 | break; |
| 2240 | case USB_SPEED_SUPER: |
| 2241 | case USB_SPEED_UNKNOWN: |
| 2242 | case USB_SPEED_WIRELESS: |
| 2243 | /* Should never happen because only LS/FS/HS endpoints will get |
| 2244 | * added to the endpoint list. |
| 2245 | */ |
| 2246 | return; |
| 2247 | } |
| 2248 | |
| 2249 | if (tt_info) |
| 2250 | tt_info->active_eps += 1; |
| 2251 | /* Insert the endpoint into the list, largest max packet size first. */ |
| 2252 | list_for_each_entry(smaller_ep, &interval_bw->endpoints, |
| 2253 | bw_endpoint_list) { |
| 2254 | if (ep_bw->max_packet_size >= |
| 2255 | smaller_ep->bw_info.max_packet_size) { |
| 2256 | /* Add the new ep before the smaller endpoint */ |
| 2257 | list_add_tail(&virt_ep->bw_endpoint_list, |
| 2258 | &smaller_ep->bw_endpoint_list); |
| 2259 | return; |
| 2260 | } |
| 2261 | } |
| 2262 | /* Add the new endpoint at the end of the list. */ |
| 2263 | list_add_tail(&virt_ep->bw_endpoint_list, |
| 2264 | &interval_bw->endpoints); |
| 2265 | } |
| 2266 | |
| 2267 | void xhci_update_tt_active_eps(struct xhci_hcd *xhci, |
| 2268 | struct xhci_virt_device *virt_dev, |
| 2269 | int old_active_eps) |
| 2270 | { |
| 2271 | struct xhci_root_port_bw_info *rh_bw_info; |
| 2272 | if (!virt_dev->tt_info) |
| 2273 | return; |
| 2274 | |
| 2275 | rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1]; |
| 2276 | if (old_active_eps == 0 && |
| 2277 | virt_dev->tt_info->active_eps != 0) { |
| 2278 | rh_bw_info->num_active_tts += 1; |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2279 | rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2280 | } else if (old_active_eps != 0 && |
| 2281 | virt_dev->tt_info->active_eps == 0) { |
| 2282 | rh_bw_info->num_active_tts -= 1; |
Sarah Sharp | c29eea6 | 2011-09-02 11:05:52 -0700 | [diff] [blame] | 2283 | rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2284 | } |
| 2285 | } |
| 2286 | |
| 2287 | static int xhci_reserve_bandwidth(struct xhci_hcd *xhci, |
| 2288 | struct xhci_virt_device *virt_dev, |
| 2289 | struct xhci_container_ctx *in_ctx) |
| 2290 | { |
| 2291 | struct xhci_bw_info ep_bw_info[31]; |
| 2292 | int i; |
| 2293 | struct xhci_input_control_ctx *ctrl_ctx; |
| 2294 | int old_active_eps = 0; |
| 2295 | |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2296 | if (virt_dev->tt_info) |
| 2297 | old_active_eps = virt_dev->tt_info->active_eps; |
| 2298 | |
| 2299 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
| 2300 | |
| 2301 | for (i = 0; i < 31; i++) { |
| 2302 | if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i)) |
| 2303 | continue; |
| 2304 | |
| 2305 | /* Make a copy of the BW info in case we need to revert this */ |
| 2306 | memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info, |
| 2307 | sizeof(ep_bw_info[i])); |
| 2308 | /* Drop the endpoint from the interval table if the endpoint is |
| 2309 | * being dropped or changed. |
| 2310 | */ |
| 2311 | if (EP_IS_DROPPED(ctrl_ctx, i)) |
| 2312 | xhci_drop_ep_from_interval_table(xhci, |
| 2313 | &virt_dev->eps[i].bw_info, |
| 2314 | virt_dev->bw_table, |
| 2315 | virt_dev->udev, |
| 2316 | &virt_dev->eps[i], |
| 2317 | virt_dev->tt_info); |
| 2318 | } |
| 2319 | /* Overwrite the information stored in the endpoints' bw_info */ |
| 2320 | xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev); |
| 2321 | for (i = 0; i < 31; i++) { |
| 2322 | /* Add any changed or added endpoints to the interval table */ |
| 2323 | if (EP_IS_ADDED(ctrl_ctx, i)) |
| 2324 | xhci_add_ep_to_interval_table(xhci, |
| 2325 | &virt_dev->eps[i].bw_info, |
| 2326 | virt_dev->bw_table, |
| 2327 | virt_dev->udev, |
| 2328 | &virt_dev->eps[i], |
| 2329 | virt_dev->tt_info); |
| 2330 | } |
| 2331 | |
| 2332 | if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) { |
| 2333 | /* Ok, this fits in the bandwidth we have. |
| 2334 | * Update the number of active TTs. |
| 2335 | */ |
| 2336 | xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps); |
| 2337 | return 0; |
| 2338 | } |
| 2339 | |
| 2340 | /* We don't have enough bandwidth for this, revert the stored info. */ |
| 2341 | for (i = 0; i < 31; i++) { |
| 2342 | if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i)) |
| 2343 | continue; |
| 2344 | |
| 2345 | /* Drop the new copies of any added or changed endpoints from |
| 2346 | * the interval table. |
| 2347 | */ |
| 2348 | if (EP_IS_ADDED(ctrl_ctx, i)) { |
| 2349 | xhci_drop_ep_from_interval_table(xhci, |
| 2350 | &virt_dev->eps[i].bw_info, |
| 2351 | virt_dev->bw_table, |
| 2352 | virt_dev->udev, |
| 2353 | &virt_dev->eps[i], |
| 2354 | virt_dev->tt_info); |
| 2355 | } |
| 2356 | /* Revert the endpoint back to its old information */ |
| 2357 | memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i], |
| 2358 | sizeof(ep_bw_info[i])); |
| 2359 | /* Add any changed or dropped endpoints back into the table */ |
| 2360 | if (EP_IS_DROPPED(ctrl_ctx, i)) |
| 2361 | xhci_add_ep_to_interval_table(xhci, |
| 2362 | &virt_dev->eps[i].bw_info, |
| 2363 | virt_dev->bw_table, |
| 2364 | virt_dev->udev, |
| 2365 | &virt_dev->eps[i], |
| 2366 | virt_dev->tt_info); |
| 2367 | } |
| 2368 | return -ENOMEM; |
| 2369 | } |
| 2370 | |
| 2371 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2372 | /* Issue a configure endpoint command or evaluate context command |
| 2373 | * and wait for it to finish. |
| 2374 | */ |
| 2375 | static int xhci_configure_endpoint(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2376 | struct usb_device *udev, |
| 2377 | struct xhci_command *command, |
| 2378 | bool ctx_change, bool must_succeed) |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2379 | { |
| 2380 | int ret; |
| 2381 | int timeleft; |
| 2382 | unsigned long flags; |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2383 | struct xhci_container_ctx *in_ctx; |
| 2384 | struct completion *cmd_completion; |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2385 | u32 *cmd_status; |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2386 | struct xhci_virt_device *virt_dev; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2387 | |
| 2388 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2389 | virt_dev = xhci->devs[udev->slot_id]; |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2390 | |
Sarah Sharp | 750645f | 2011-09-02 11:05:43 -0700 | [diff] [blame] | 2391 | if (command) |
| 2392 | in_ctx = command->in_ctx; |
| 2393 | else |
| 2394 | in_ctx = virt_dev->in_ctx; |
| 2395 | |
| 2396 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) && |
| 2397 | xhci_reserve_host_resources(xhci, in_ctx)) { |
| 2398 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2399 | xhci_warn(xhci, "Not enough host resources, " |
| 2400 | "active endpoint contexts = %u\n", |
| 2401 | xhci->num_active_eps); |
| 2402 | return -ENOMEM; |
| 2403 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 2404 | if ((xhci->quirks & XHCI_SW_BW_CHECKING) && |
| 2405 | xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) { |
| 2406 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) |
| 2407 | xhci_free_host_resources(xhci, in_ctx); |
| 2408 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2409 | xhci_warn(xhci, "Not enough bandwidth\n"); |
| 2410 | return -ENOMEM; |
| 2411 | } |
Sarah Sharp | 750645f | 2011-09-02 11:05:43 -0700 | [diff] [blame] | 2412 | |
| 2413 | if (command) { |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2414 | cmd_completion = command->completion; |
| 2415 | cmd_status = &command->status; |
| 2416 | command->command_trb = xhci->cmd_ring->enqueue; |
Paul Zimmerman | 7a3783e | 2010-11-17 16:26:50 -0800 | [diff] [blame] | 2417 | |
| 2418 | /* Enqueue pointer can be left pointing to the link TRB, |
| 2419 | * we must handle that |
| 2420 | */ |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 2421 | if (TRB_TYPE_LINK_LE32(command->command_trb->link.control)) |
Paul Zimmerman | 7a3783e | 2010-11-17 16:26:50 -0800 | [diff] [blame] | 2422 | command->command_trb = |
| 2423 | xhci->cmd_ring->enq_seg->next->trbs; |
| 2424 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2425 | list_add_tail(&command->cmd_list, &virt_dev->cmd_list); |
| 2426 | } else { |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2427 | cmd_completion = &virt_dev->cmd_completion; |
| 2428 | cmd_status = &virt_dev->cmd_status; |
| 2429 | } |
Andiry Xu | 1d68064 | 2010-03-12 17:10:04 +0800 | [diff] [blame] | 2430 | init_completion(cmd_completion); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2431 | |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2432 | if (!ctx_change) |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2433 | ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma, |
| 2434 | udev->slot_id, must_succeed); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2435 | else |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2436 | ret = xhci_queue_evaluate_context(xhci, in_ctx->dma, |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2437 | udev->slot_id); |
| 2438 | if (ret < 0) { |
Sarah Sharp | c01591b | 2009-12-09 15:58:58 -0800 | [diff] [blame] | 2439 | if (command) |
| 2440 | list_del(&command->cmd_list); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2441 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) |
| 2442 | xhci_free_host_resources(xhci, in_ctx); |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2443 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2444 | xhci_dbg(xhci, "FIXME allocate a new ring segment\n"); |
| 2445 | return -ENOMEM; |
| 2446 | } |
| 2447 | xhci_ring_cmd_db(xhci); |
| 2448 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2449 | |
| 2450 | /* Wait for the configure endpoint command to complete */ |
| 2451 | timeleft = wait_for_completion_interruptible_timeout( |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2452 | cmd_completion, |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2453 | USB_CTRL_SET_TIMEOUT); |
| 2454 | if (timeleft <= 0) { |
| 2455 | xhci_warn(xhci, "%s while waiting for %s command\n", |
| 2456 | timeleft == 0 ? "Timeout" : "Signal", |
| 2457 | ctx_change == 0 ? |
| 2458 | "configure endpoint" : |
| 2459 | "evaluate context"); |
| 2460 | /* FIXME cancel the configure endpoint command */ |
| 2461 | return -ETIME; |
| 2462 | } |
| 2463 | |
| 2464 | if (!ctx_change) |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 2465 | ret = xhci_configure_endpoint_result(xhci, udev, cmd_status); |
| 2466 | else |
| 2467 | ret = xhci_evaluate_context_result(xhci, udev, cmd_status); |
| 2468 | |
| 2469 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { |
| 2470 | spin_lock_irqsave(&xhci->lock, flags); |
| 2471 | /* If the command failed, remove the reserved resources. |
| 2472 | * Otherwise, clean up the estimate to include dropped eps. |
| 2473 | */ |
| 2474 | if (ret) |
| 2475 | xhci_free_host_resources(xhci, in_ctx); |
| 2476 | else |
| 2477 | xhci_finish_resource_reservation(xhci, in_ctx); |
| 2478 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2479 | } |
| 2480 | return ret; |
Sarah Sharp | f2217e8 | 2009-08-07 14:04:43 -0700 | [diff] [blame] | 2481 | } |
| 2482 | |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 2483 | /* Called after one or more calls to xhci_add_endpoint() or |
| 2484 | * xhci_drop_endpoint(). If this call fails, the USB core is expected |
| 2485 | * to call xhci_reset_bandwidth(). |
| 2486 | * |
| 2487 | * Since we are in the middle of changing either configuration or |
| 2488 | * installing a new alt setting, the USB core won't allow URBs to be |
| 2489 | * enqueued for any endpoint on the old config or interface. Nothing |
| 2490 | * else should be touching the xhci->devs[slot_id] structure, so we |
| 2491 | * don't need to take the xhci->lock for manipulating that. |
| 2492 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2493 | int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
| 2494 | { |
| 2495 | int i; |
| 2496 | int ret = 0; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2497 | struct xhci_hcd *xhci; |
| 2498 | struct xhci_virt_device *virt_dev; |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2499 | struct xhci_input_control_ctx *ctrl_ctx; |
| 2500 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2501 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 2502 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2503 | if (ret <= 0) |
| 2504 | return ret; |
| 2505 | xhci = hcd_to_xhci(hcd); |
Sarah Sharp | fe6c6c1 | 2011-05-23 16:41:17 -0700 | [diff] [blame] | 2506 | if (xhci->xhc_state & XHCI_STATE_DYING) |
| 2507 | return -ENODEV; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2508 | |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2509 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2510 | virt_dev = xhci->devs[udev->slot_id]; |
| 2511 | |
| 2512 | /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2513 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2514 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
| 2515 | ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); |
| 2516 | ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); |
Sarah Sharp | 2dc3753 | 2011-09-02 11:05:40 -0700 | [diff] [blame] | 2517 | |
| 2518 | /* Don't issue the command if there's no endpoints to update. */ |
| 2519 | if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && |
| 2520 | ctrl_ctx->drop_flags == 0) |
| 2521 | return 0; |
| 2522 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2523 | xhci_dbg(xhci, "New Input Control Context:\n"); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2524 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
| 2525 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2526 | LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info))); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2527 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2528 | ret = xhci_configure_endpoint(xhci, udev, NULL, |
| 2529 | false, false); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2530 | if (ret) { |
| 2531 | /* Callee should call reset_bandwidth() */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2532 | return ret; |
| 2533 | } |
| 2534 | |
| 2535 | xhci_dbg(xhci, "Output context after successful config ep cmd:\n"); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2536 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2537 | LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info))); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2538 | |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2539 | /* Free any rings that were dropped, but not changed. */ |
| 2540 | for (i = 1; i < 31; ++i) { |
Matt Evans | 4819fef | 2011-06-01 13:01:07 +1000 | [diff] [blame] | 2541 | if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && |
| 2542 | !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2543 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
| 2544 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2545 | xhci_zero_in_ctx(xhci, virt_dev); |
Sarah Sharp | 834cb0f | 2011-05-12 18:06:37 -0700 | [diff] [blame] | 2546 | /* |
| 2547 | * Install any rings for completely new endpoints or changed endpoints, |
| 2548 | * and free or cache any old rings from changed endpoints. |
| 2549 | */ |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2550 | for (i = 1; i < 31; ++i) { |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 2551 | if (!virt_dev->eps[i].new_ring) |
| 2552 | continue; |
| 2553 | /* Only cache or free the old ring if it exists. |
| 2554 | * It may not if this is the first add of an endpoint. |
| 2555 | */ |
| 2556 | if (virt_dev->eps[i].ring) { |
Sarah Sharp | 412566b | 2009-12-09 15:59:01 -0800 | [diff] [blame] | 2557 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2558 | } |
Sarah Sharp | 74f9fe2 | 2009-12-03 09:44:29 -0800 | [diff] [blame] | 2559 | virt_dev->eps[i].ring = virt_dev->eps[i].new_ring; |
| 2560 | virt_dev->eps[i].new_ring = NULL; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2561 | } |
| 2562 | |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2563 | return ret; |
| 2564 | } |
| 2565 | |
| 2566 | void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) |
| 2567 | { |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2568 | struct xhci_hcd *xhci; |
| 2569 | struct xhci_virt_device *virt_dev; |
| 2570 | int i, ret; |
| 2571 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 2572 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2573 | if (ret <= 0) |
| 2574 | return; |
| 2575 | xhci = hcd_to_xhci(hcd); |
| 2576 | |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 2577 | xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2578 | virt_dev = xhci->devs[udev->slot_id]; |
| 2579 | /* Free any rings allocated for added endpoints */ |
| 2580 | for (i = 0; i < 31; ++i) { |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2581 | if (virt_dev->eps[i].new_ring) { |
| 2582 | xhci_ring_free(xhci, virt_dev->eps[i].new_ring); |
| 2583 | virt_dev->eps[i].new_ring = NULL; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2584 | } |
| 2585 | } |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 2586 | xhci_zero_in_ctx(xhci, virt_dev); |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 2587 | } |
| 2588 | |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2589 | static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci, |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2590 | struct xhci_container_ctx *in_ctx, |
| 2591 | struct xhci_container_ctx *out_ctx, |
| 2592 | u32 add_flags, u32 drop_flags) |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2593 | { |
| 2594 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2595 | ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2596 | ctrl_ctx->add_flags = cpu_to_le32(add_flags); |
| 2597 | ctrl_ctx->drop_flags = cpu_to_le32(drop_flags); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2598 | xhci_slot_copy(xhci, in_ctx, out_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2599 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2600 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2601 | xhci_dbg(xhci, "Input Context:\n"); |
| 2602 | xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags)); |
Sarah Sharp | 5270b95 | 2009-09-04 10:53:11 -0700 | [diff] [blame] | 2603 | } |
| 2604 | |
Dmitry Torokhov | 8212a49 | 2011-02-08 13:55:59 -0800 | [diff] [blame] | 2605 | static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci, |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2606 | unsigned int slot_id, unsigned int ep_index, |
| 2607 | struct xhci_dequeue_state *deq_state) |
| 2608 | { |
| 2609 | struct xhci_container_ctx *in_ctx; |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2610 | struct xhci_ep_ctx *ep_ctx; |
| 2611 | u32 added_ctxs; |
| 2612 | dma_addr_t addr; |
| 2613 | |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2614 | xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx, |
| 2615 | xhci->devs[slot_id]->out_ctx, ep_index); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2616 | in_ctx = xhci->devs[slot_id]->in_ctx; |
| 2617 | ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index); |
| 2618 | addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg, |
| 2619 | deq_state->new_deq_ptr); |
| 2620 | if (addr == 0) { |
| 2621 | xhci_warn(xhci, "WARN Cannot submit config ep after " |
| 2622 | "reset ep command\n"); |
| 2623 | xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n", |
| 2624 | deq_state->new_deq_seg, |
| 2625 | deq_state->new_deq_ptr); |
| 2626 | return; |
| 2627 | } |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 2628 | ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2629 | |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2630 | added_ctxs = xhci_get_endpoint_flag_from_index(ep_index); |
Sarah Sharp | 913a8a3 | 2009-09-04 10:53:13 -0700 | [diff] [blame] | 2631 | xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx, |
| 2632 | xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2633 | } |
| 2634 | |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2635 | void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2636 | struct usb_device *udev, unsigned int ep_index) |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2637 | { |
| 2638 | struct xhci_dequeue_state deq_state; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2639 | struct xhci_virt_ep *ep; |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2640 | |
| 2641 | xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n"); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2642 | ep = &xhci->devs[udev->slot_id]->eps[ep_index]; |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2643 | /* We need to move the HW's dequeue pointer past this TD, |
| 2644 | * or it will attempt to resend it on the next doorbell ring. |
| 2645 | */ |
| 2646 | xhci_find_new_dequeue_state(xhci, udev->slot_id, |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 2647 | ep_index, ep->stopped_stream, ep->stopped_td, |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2648 | &deq_state); |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2649 | |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2650 | /* HW with the reset endpoint quirk will use the saved dequeue state to |
| 2651 | * issue a configure endpoint command later. |
| 2652 | */ |
| 2653 | if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) { |
| 2654 | xhci_dbg(xhci, "Queueing new dequeue state\n"); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2655 | xhci_queue_new_dequeue_state(xhci, udev->slot_id, |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 2656 | ep_index, ep->stopped_stream, &deq_state); |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2657 | } else { |
| 2658 | /* Better hope no one uses the input context between now and the |
| 2659 | * reset endpoint completion! |
Sarah Sharp | e9df17e | 2010-04-02 15:34:43 -0700 | [diff] [blame] | 2660 | * XXX: No idea how this hardware will react when stream rings |
| 2661 | * are enabled. |
Sarah Sharp | ac9d8fe | 2009-08-07 14:04:55 -0700 | [diff] [blame] | 2662 | */ |
| 2663 | xhci_dbg(xhci, "Setting up input context for " |
| 2664 | "configure endpoint command\n"); |
| 2665 | xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id, |
| 2666 | ep_index, &deq_state); |
| 2667 | } |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2668 | } |
| 2669 | |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 2670 | /* Deal with stalled endpoints. The core should have sent the control message |
| 2671 | * to clear the halt condition. However, we need to make the xHCI hardware |
| 2672 | * reset its sequence number, since a device will expect a sequence number of |
| 2673 | * zero after the halt condition is cleared. |
| 2674 | * Context: in_interrupt |
| 2675 | */ |
| 2676 | void xhci_endpoint_reset(struct usb_hcd *hcd, |
| 2677 | struct usb_host_endpoint *ep) |
| 2678 | { |
| 2679 | struct xhci_hcd *xhci; |
| 2680 | struct usb_device *udev; |
| 2681 | unsigned int ep_index; |
| 2682 | unsigned long flags; |
| 2683 | int ret; |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2684 | struct xhci_virt_ep *virt_ep; |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 2685 | |
| 2686 | xhci = hcd_to_xhci(hcd); |
| 2687 | udev = (struct usb_device *) ep->hcpriv; |
| 2688 | /* Called with a root hub endpoint (or an endpoint that wasn't added |
| 2689 | * with xhci_add_endpoint() |
| 2690 | */ |
| 2691 | if (!ep->hcpriv) |
| 2692 | return; |
| 2693 | ep_index = xhci_get_endpoint_index(&ep->desc); |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2694 | virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index]; |
| 2695 | if (!virt_ep->stopped_td) { |
Sarah Sharp | c92bcfa | 2009-07-27 12:05:21 -0700 | [diff] [blame] | 2696 | xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n", |
| 2697 | ep->desc.bEndpointAddress); |
| 2698 | return; |
| 2699 | } |
Sarah Sharp | 82d1009 | 2009-08-07 14:04:52 -0700 | [diff] [blame] | 2700 | if (usb_endpoint_xfer_control(&ep->desc)) { |
| 2701 | xhci_dbg(xhci, "Control endpoint stall already handled.\n"); |
| 2702 | return; |
| 2703 | } |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 2704 | |
| 2705 | xhci_dbg(xhci, "Queueing reset endpoint command\n"); |
| 2706 | spin_lock_irqsave(&xhci->lock, flags); |
| 2707 | ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index); |
Sarah Sharp | c92bcfa | 2009-07-27 12:05:21 -0700 | [diff] [blame] | 2708 | /* |
| 2709 | * Can't change the ring dequeue pointer until it's transitioned to the |
| 2710 | * stopped state, which is only upon a successful reset endpoint |
| 2711 | * command. Better hope that last command worked! |
| 2712 | */ |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 2713 | if (!ret) { |
Sarah Sharp | 63a0d9a | 2009-09-04 10:53:09 -0700 | [diff] [blame] | 2714 | xhci_cleanup_stalled_ring(xhci, udev, ep_index); |
| 2715 | kfree(virt_ep->stopped_td); |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 2716 | xhci_ring_cmd_db(xhci); |
| 2717 | } |
Sarah Sharp | 1624ae1 | 2010-05-06 13:40:08 -0700 | [diff] [blame] | 2718 | virt_ep->stopped_td = NULL; |
| 2719 | virt_ep->stopped_trb = NULL; |
Sarah Sharp | 5e5cf6f | 2010-05-06 13:40:18 -0700 | [diff] [blame] | 2720 | virt_ep->stopped_stream = 0; |
Sarah Sharp | a1587d9 | 2009-07-27 12:03:15 -0700 | [diff] [blame] | 2721 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2722 | |
| 2723 | if (ret) |
| 2724 | xhci_warn(xhci, "FIXME allocate a new ring segment\n"); |
| 2725 | } |
| 2726 | |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2727 | static int xhci_check_streams_endpoint(struct xhci_hcd *xhci, |
| 2728 | struct usb_device *udev, struct usb_host_endpoint *ep, |
| 2729 | unsigned int slot_id) |
| 2730 | { |
| 2731 | int ret; |
| 2732 | unsigned int ep_index; |
| 2733 | unsigned int ep_state; |
| 2734 | |
| 2735 | if (!ep) |
| 2736 | return -EINVAL; |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 2737 | ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2738 | if (ret <= 0) |
| 2739 | return -EINVAL; |
Alan Stern | 842f169 | 2010-04-30 12:44:46 -0400 | [diff] [blame] | 2740 | if (ep->ss_ep_comp.bmAttributes == 0) { |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2741 | xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion" |
| 2742 | " descriptor for ep 0x%x does not support streams\n", |
| 2743 | ep->desc.bEndpointAddress); |
| 2744 | return -EINVAL; |
| 2745 | } |
| 2746 | |
| 2747 | ep_index = xhci_get_endpoint_index(&ep->desc); |
| 2748 | ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; |
| 2749 | if (ep_state & EP_HAS_STREAMS || |
| 2750 | ep_state & EP_GETTING_STREAMS) { |
| 2751 | xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x " |
| 2752 | "already has streams set up.\n", |
| 2753 | ep->desc.bEndpointAddress); |
| 2754 | xhci_warn(xhci, "Send email to xHCI maintainer and ask for " |
| 2755 | "dynamic stream context array reallocation.\n"); |
| 2756 | return -EINVAL; |
| 2757 | } |
| 2758 | if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) { |
| 2759 | xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk " |
| 2760 | "endpoint 0x%x; URBs are pending.\n", |
| 2761 | ep->desc.bEndpointAddress); |
| 2762 | return -EINVAL; |
| 2763 | } |
| 2764 | return 0; |
| 2765 | } |
| 2766 | |
| 2767 | static void xhci_calculate_streams_entries(struct xhci_hcd *xhci, |
| 2768 | unsigned int *num_streams, unsigned int *num_stream_ctxs) |
| 2769 | { |
| 2770 | unsigned int max_streams; |
| 2771 | |
| 2772 | /* The stream context array size must be a power of two */ |
| 2773 | *num_stream_ctxs = roundup_pow_of_two(*num_streams); |
| 2774 | /* |
| 2775 | * Find out how many primary stream array entries the host controller |
| 2776 | * supports. Later we may use secondary stream arrays (similar to 2nd |
| 2777 | * level page entries), but that's an optional feature for xHCI host |
| 2778 | * controllers. xHCs must support at least 4 stream IDs. |
| 2779 | */ |
| 2780 | max_streams = HCC_MAX_PSA(xhci->hcc_params); |
| 2781 | if (*num_stream_ctxs > max_streams) { |
| 2782 | xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n", |
| 2783 | max_streams); |
| 2784 | *num_stream_ctxs = max_streams; |
| 2785 | *num_streams = max_streams; |
| 2786 | } |
| 2787 | } |
| 2788 | |
| 2789 | /* Returns an error code if one of the endpoint already has streams. |
| 2790 | * This does not change any data structures, it only checks and gathers |
| 2791 | * information. |
| 2792 | */ |
| 2793 | static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci, |
| 2794 | struct usb_device *udev, |
| 2795 | struct usb_host_endpoint **eps, unsigned int num_eps, |
| 2796 | unsigned int *num_streams, u32 *changed_ep_bitmask) |
| 2797 | { |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2798 | unsigned int max_streams; |
| 2799 | unsigned int endpoint_flag; |
| 2800 | int i; |
| 2801 | int ret; |
| 2802 | |
| 2803 | for (i = 0; i < num_eps; i++) { |
| 2804 | ret = xhci_check_streams_endpoint(xhci, udev, |
| 2805 | eps[i], udev->slot_id); |
| 2806 | if (ret < 0) |
| 2807 | return ret; |
| 2808 | |
Felipe Balbi | 18b7ede | 2012-01-02 13:35:41 +0200 | [diff] [blame] | 2809 | max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2810 | if (max_streams < (*num_streams - 1)) { |
| 2811 | xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n", |
| 2812 | eps[i]->desc.bEndpointAddress, |
| 2813 | max_streams); |
| 2814 | *num_streams = max_streams+1; |
| 2815 | } |
| 2816 | |
| 2817 | endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc); |
| 2818 | if (*changed_ep_bitmask & endpoint_flag) |
| 2819 | return -EINVAL; |
| 2820 | *changed_ep_bitmask |= endpoint_flag; |
| 2821 | } |
| 2822 | return 0; |
| 2823 | } |
| 2824 | |
| 2825 | static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci, |
| 2826 | struct usb_device *udev, |
| 2827 | struct usb_host_endpoint **eps, unsigned int num_eps) |
| 2828 | { |
| 2829 | u32 changed_ep_bitmask = 0; |
| 2830 | unsigned int slot_id; |
| 2831 | unsigned int ep_index; |
| 2832 | unsigned int ep_state; |
| 2833 | int i; |
| 2834 | |
| 2835 | slot_id = udev->slot_id; |
| 2836 | if (!xhci->devs[slot_id]) |
| 2837 | return 0; |
| 2838 | |
| 2839 | for (i = 0; i < num_eps; i++) { |
| 2840 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 2841 | ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state; |
| 2842 | /* Are streams already being freed for the endpoint? */ |
| 2843 | if (ep_state & EP_GETTING_NO_STREAMS) { |
| 2844 | xhci_warn(xhci, "WARN Can't disable streams for " |
| 2845 | "endpoint 0x%x\n, " |
| 2846 | "streams are being disabled already.", |
| 2847 | eps[i]->desc.bEndpointAddress); |
| 2848 | return 0; |
| 2849 | } |
| 2850 | /* Are there actually any streams to free? */ |
| 2851 | if (!(ep_state & EP_HAS_STREAMS) && |
| 2852 | !(ep_state & EP_GETTING_STREAMS)) { |
| 2853 | xhci_warn(xhci, "WARN Can't disable streams for " |
| 2854 | "endpoint 0x%x\n, " |
| 2855 | "streams are already disabled!", |
| 2856 | eps[i]->desc.bEndpointAddress); |
| 2857 | xhci_warn(xhci, "WARN xhci_free_streams() called " |
| 2858 | "with non-streams endpoint\n"); |
| 2859 | return 0; |
| 2860 | } |
| 2861 | changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc); |
| 2862 | } |
| 2863 | return changed_ep_bitmask; |
| 2864 | } |
| 2865 | |
| 2866 | /* |
| 2867 | * The USB device drivers use this function (though the HCD interface in USB |
| 2868 | * core) to prepare a set of bulk endpoints to use streams. Streams are used to |
| 2869 | * coordinate mass storage command queueing across multiple endpoints (basically |
| 2870 | * a stream ID == a task ID). |
| 2871 | * |
| 2872 | * Setting up streams involves allocating the same size stream context array |
| 2873 | * for each endpoint and issuing a configure endpoint command for all endpoints. |
| 2874 | * |
| 2875 | * Don't allow the call to succeed if one endpoint only supports one stream |
| 2876 | * (which means it doesn't support streams at all). |
| 2877 | * |
| 2878 | * Drivers may get less stream IDs than they asked for, if the host controller |
| 2879 | * hardware or endpoints claim they can't support the number of requested |
| 2880 | * stream IDs. |
| 2881 | */ |
| 2882 | int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev, |
| 2883 | struct usb_host_endpoint **eps, unsigned int num_eps, |
| 2884 | unsigned int num_streams, gfp_t mem_flags) |
| 2885 | { |
| 2886 | int i, ret; |
| 2887 | struct xhci_hcd *xhci; |
| 2888 | struct xhci_virt_device *vdev; |
| 2889 | struct xhci_command *config_cmd; |
| 2890 | unsigned int ep_index; |
| 2891 | unsigned int num_stream_ctxs; |
| 2892 | unsigned long flags; |
| 2893 | u32 changed_ep_bitmask = 0; |
| 2894 | |
| 2895 | if (!eps) |
| 2896 | return -EINVAL; |
| 2897 | |
| 2898 | /* Add one to the number of streams requested to account for |
| 2899 | * stream 0 that is reserved for xHCI usage. |
| 2900 | */ |
| 2901 | num_streams += 1; |
| 2902 | xhci = hcd_to_xhci(hcd); |
| 2903 | xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n", |
| 2904 | num_streams); |
| 2905 | |
| 2906 | config_cmd = xhci_alloc_command(xhci, true, true, mem_flags); |
| 2907 | if (!config_cmd) { |
| 2908 | xhci_dbg(xhci, "Could not allocate xHCI command structure.\n"); |
| 2909 | return -ENOMEM; |
| 2910 | } |
| 2911 | |
| 2912 | /* Check to make sure all endpoints are not already configured for |
| 2913 | * streams. While we're at it, find the maximum number of streams that |
| 2914 | * all the endpoints will support and check for duplicate endpoints. |
| 2915 | */ |
| 2916 | spin_lock_irqsave(&xhci->lock, flags); |
| 2917 | ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps, |
| 2918 | num_eps, &num_streams, &changed_ep_bitmask); |
| 2919 | if (ret < 0) { |
| 2920 | xhci_free_command(xhci, config_cmd); |
| 2921 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2922 | return ret; |
| 2923 | } |
| 2924 | if (num_streams <= 1) { |
| 2925 | xhci_warn(xhci, "WARN: endpoints can't handle " |
| 2926 | "more than one stream.\n"); |
| 2927 | xhci_free_command(xhci, config_cmd); |
| 2928 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2929 | return -EINVAL; |
| 2930 | } |
| 2931 | vdev = xhci->devs[udev->slot_id]; |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 2932 | /* Mark each endpoint as being in transition, so |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 2933 | * xhci_urb_enqueue() will reject all URBs. |
| 2934 | */ |
| 2935 | for (i = 0; i < num_eps; i++) { |
| 2936 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 2937 | vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS; |
| 2938 | } |
| 2939 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 2940 | |
| 2941 | /* Setup internal data structures and allocate HW data structures for |
| 2942 | * streams (but don't install the HW structures in the input context |
| 2943 | * until we're sure all memory allocation succeeded). |
| 2944 | */ |
| 2945 | xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs); |
| 2946 | xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n", |
| 2947 | num_stream_ctxs, num_streams); |
| 2948 | |
| 2949 | for (i = 0; i < num_eps; i++) { |
| 2950 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 2951 | vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci, |
| 2952 | num_stream_ctxs, |
| 2953 | num_streams, mem_flags); |
| 2954 | if (!vdev->eps[ep_index].stream_info) |
| 2955 | goto cleanup; |
| 2956 | /* Set maxPstreams in endpoint context and update deq ptr to |
| 2957 | * point to stream context array. FIXME |
| 2958 | */ |
| 2959 | } |
| 2960 | |
| 2961 | /* Set up the input context for a configure endpoint command. */ |
| 2962 | for (i = 0; i < num_eps; i++) { |
| 2963 | struct xhci_ep_ctx *ep_ctx; |
| 2964 | |
| 2965 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 2966 | ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index); |
| 2967 | |
| 2968 | xhci_endpoint_copy(xhci, config_cmd->in_ctx, |
| 2969 | vdev->out_ctx, ep_index); |
| 2970 | xhci_setup_streams_ep_input_ctx(xhci, ep_ctx, |
| 2971 | vdev->eps[ep_index].stream_info); |
| 2972 | } |
| 2973 | /* Tell the HW to drop its old copy of the endpoint context info |
| 2974 | * and add the updated copy from the input context. |
| 2975 | */ |
| 2976 | xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx, |
| 2977 | vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask); |
| 2978 | |
| 2979 | /* Issue and wait for the configure endpoint command */ |
| 2980 | ret = xhci_configure_endpoint(xhci, udev, config_cmd, |
| 2981 | false, false); |
| 2982 | |
| 2983 | /* xHC rejected the configure endpoint command for some reason, so we |
| 2984 | * leave the old ring intact and free our internal streams data |
| 2985 | * structure. |
| 2986 | */ |
| 2987 | if (ret < 0) |
| 2988 | goto cleanup; |
| 2989 | |
| 2990 | spin_lock_irqsave(&xhci->lock, flags); |
| 2991 | for (i = 0; i < num_eps; i++) { |
| 2992 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 2993 | vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; |
| 2994 | xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n", |
| 2995 | udev->slot_id, ep_index); |
| 2996 | vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS; |
| 2997 | } |
| 2998 | xhci_free_command(xhci, config_cmd); |
| 2999 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3000 | |
| 3001 | /* Subtract 1 for stream 0, which drivers can't use */ |
| 3002 | return num_streams - 1; |
| 3003 | |
| 3004 | cleanup: |
| 3005 | /* If it didn't work, free the streams! */ |
| 3006 | for (i = 0; i < num_eps; i++) { |
| 3007 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3008 | xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); |
Sarah Sharp | 8a00774 | 2010-04-30 15:37:56 -0700 | [diff] [blame] | 3009 | vdev->eps[ep_index].stream_info = NULL; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3010 | /* FIXME Unset maxPstreams in endpoint context and |
| 3011 | * update deq ptr to point to normal string ring. |
| 3012 | */ |
| 3013 | vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS; |
| 3014 | vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; |
| 3015 | xhci_endpoint_zero(xhci, vdev, eps[i]); |
| 3016 | } |
| 3017 | xhci_free_command(xhci, config_cmd); |
| 3018 | return -ENOMEM; |
| 3019 | } |
| 3020 | |
| 3021 | /* Transition the endpoint from using streams to being a "normal" endpoint |
| 3022 | * without streams. |
| 3023 | * |
| 3024 | * Modify the endpoint context state, submit a configure endpoint command, |
| 3025 | * and free all endpoint rings for streams if that completes successfully. |
| 3026 | */ |
| 3027 | int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev, |
| 3028 | struct usb_host_endpoint **eps, unsigned int num_eps, |
| 3029 | gfp_t mem_flags) |
| 3030 | { |
| 3031 | int i, ret; |
| 3032 | struct xhci_hcd *xhci; |
| 3033 | struct xhci_virt_device *vdev; |
| 3034 | struct xhci_command *command; |
| 3035 | unsigned int ep_index; |
| 3036 | unsigned long flags; |
| 3037 | u32 changed_ep_bitmask; |
| 3038 | |
| 3039 | xhci = hcd_to_xhci(hcd); |
| 3040 | vdev = xhci->devs[udev->slot_id]; |
| 3041 | |
| 3042 | /* Set up a configure endpoint command to remove the streams rings */ |
| 3043 | spin_lock_irqsave(&xhci->lock, flags); |
| 3044 | changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci, |
| 3045 | udev, eps, num_eps); |
| 3046 | if (changed_ep_bitmask == 0) { |
| 3047 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3048 | return -EINVAL; |
| 3049 | } |
| 3050 | |
| 3051 | /* Use the xhci_command structure from the first endpoint. We may have |
| 3052 | * allocated too many, but the driver may call xhci_free_streams() for |
| 3053 | * each endpoint it grouped into one call to xhci_alloc_streams(). |
| 3054 | */ |
| 3055 | ep_index = xhci_get_endpoint_index(&eps[0]->desc); |
| 3056 | command = vdev->eps[ep_index].stream_info->free_streams_command; |
| 3057 | for (i = 0; i < num_eps; i++) { |
| 3058 | struct xhci_ep_ctx *ep_ctx; |
| 3059 | |
| 3060 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3061 | ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index); |
| 3062 | xhci->devs[udev->slot_id]->eps[ep_index].ep_state |= |
| 3063 | EP_GETTING_NO_STREAMS; |
| 3064 | |
| 3065 | xhci_endpoint_copy(xhci, command->in_ctx, |
| 3066 | vdev->out_ctx, ep_index); |
| 3067 | xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx, |
| 3068 | &vdev->eps[ep_index]); |
| 3069 | } |
| 3070 | xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx, |
| 3071 | vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask); |
| 3072 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3073 | |
| 3074 | /* Issue and wait for the configure endpoint command, |
| 3075 | * which must succeed. |
| 3076 | */ |
| 3077 | ret = xhci_configure_endpoint(xhci, udev, command, |
| 3078 | false, true); |
| 3079 | |
| 3080 | /* xHC rejected the configure endpoint command for some reason, so we |
| 3081 | * leave the streams rings intact. |
| 3082 | */ |
| 3083 | if (ret < 0) |
| 3084 | return ret; |
| 3085 | |
| 3086 | spin_lock_irqsave(&xhci->lock, flags); |
| 3087 | for (i = 0; i < num_eps; i++) { |
| 3088 | ep_index = xhci_get_endpoint_index(&eps[i]->desc); |
| 3089 | xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info); |
Sarah Sharp | 8a00774 | 2010-04-30 15:37:56 -0700 | [diff] [blame] | 3090 | vdev->eps[ep_index].stream_info = NULL; |
Sarah Sharp | 8df75f4 | 2010-04-02 15:34:16 -0700 | [diff] [blame] | 3091 | /* FIXME Unset maxPstreams in endpoint context and |
| 3092 | * update deq ptr to point to normal string ring. |
| 3093 | */ |
| 3094 | vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS; |
| 3095 | vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS; |
| 3096 | } |
| 3097 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3098 | |
| 3099 | return 0; |
| 3100 | } |
| 3101 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3102 | /* |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3103 | * Deletes endpoint resources for endpoints that were active before a Reset |
| 3104 | * Device command, or a Disable Slot command. The Reset Device command leaves |
| 3105 | * the control endpoint intact, whereas the Disable Slot command deletes it. |
| 3106 | * |
| 3107 | * Must be called with xhci->lock held. |
| 3108 | */ |
| 3109 | void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci, |
| 3110 | struct xhci_virt_device *virt_dev, bool drop_control_ep) |
| 3111 | { |
| 3112 | int i; |
| 3113 | unsigned int num_dropped_eps = 0; |
| 3114 | unsigned int drop_flags = 0; |
| 3115 | |
| 3116 | for (i = (drop_control_ep ? 0 : 1); i < 31; i++) { |
| 3117 | if (virt_dev->eps[i].ring) { |
| 3118 | drop_flags |= 1 << i; |
| 3119 | num_dropped_eps++; |
| 3120 | } |
| 3121 | } |
| 3122 | xhci->num_active_eps -= num_dropped_eps; |
| 3123 | if (num_dropped_eps) |
| 3124 | xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, " |
| 3125 | "%u now active.\n", |
| 3126 | num_dropped_eps, drop_flags, |
| 3127 | xhci->num_active_eps); |
| 3128 | } |
| 3129 | |
| 3130 | /* |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3131 | * This submits a Reset Device Command, which will set the device state to 0, |
| 3132 | * set the device address to 0, and disable all the endpoints except the default |
| 3133 | * control endpoint. The USB core should come back and call |
| 3134 | * xhci_address_device(), and then re-set up the configuration. If this is |
| 3135 | * called because of a usb_reset_and_verify_device(), then the old alternate |
| 3136 | * settings will be re-installed through the normal bandwidth allocation |
| 3137 | * functions. |
| 3138 | * |
| 3139 | * Wait for the Reset Device command to finish. Remove all structures |
| 3140 | * associated with the endpoints that were disabled. Clear the input device |
| 3141 | * structure? Cache the rings? Reset the control endpoint 0 max packet size? |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3142 | * |
| 3143 | * If the virt_dev to be reset does not exist or does not match the udev, |
| 3144 | * it means the device is lost, possibly due to the xHC restore error and |
| 3145 | * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to |
| 3146 | * re-allocate the device. |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3147 | */ |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3148 | int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev) |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3149 | { |
| 3150 | int ret, i; |
| 3151 | unsigned long flags; |
| 3152 | struct xhci_hcd *xhci; |
| 3153 | unsigned int slot_id; |
| 3154 | struct xhci_virt_device *virt_dev; |
| 3155 | struct xhci_command *reset_device_cmd; |
| 3156 | int timeleft; |
| 3157 | int last_freed_endpoint; |
Maarten Lankhorst | 001fd38 | 2011-06-01 23:27:50 +0200 | [diff] [blame] | 3158 | struct xhci_slot_ctx *slot_ctx; |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 3159 | int old_active_eps = 0; |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3160 | |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3161 | ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3162 | if (ret <= 0) |
| 3163 | return ret; |
| 3164 | xhci = hcd_to_xhci(hcd); |
| 3165 | slot_id = udev->slot_id; |
| 3166 | virt_dev = xhci->devs[slot_id]; |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3167 | if (!virt_dev) { |
| 3168 | xhci_dbg(xhci, "The device to be reset with slot ID %u does " |
| 3169 | "not exist. Re-allocate the device\n", slot_id); |
| 3170 | ret = xhci_alloc_dev(hcd, udev); |
| 3171 | if (ret == 1) |
| 3172 | return 0; |
| 3173 | else |
| 3174 | return -EINVAL; |
| 3175 | } |
| 3176 | |
| 3177 | if (virt_dev->udev != udev) { |
| 3178 | /* If the virt_dev and the udev does not match, this virt_dev |
| 3179 | * may belong to another udev. |
| 3180 | * Re-allocate the device. |
| 3181 | */ |
| 3182 | xhci_dbg(xhci, "The device to be reset with slot ID %u does " |
| 3183 | "not match the udev. Re-allocate the device\n", |
| 3184 | slot_id); |
| 3185 | ret = xhci_alloc_dev(hcd, udev); |
| 3186 | if (ret == 1) |
| 3187 | return 0; |
| 3188 | else |
| 3189 | return -EINVAL; |
| 3190 | } |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3191 | |
Maarten Lankhorst | 001fd38 | 2011-06-01 23:27:50 +0200 | [diff] [blame] | 3192 | /* If device is not setup, there is no point in resetting it */ |
| 3193 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); |
| 3194 | if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == |
| 3195 | SLOT_STATE_DISABLED) |
| 3196 | return 0; |
| 3197 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3198 | xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id); |
| 3199 | /* Allocate the command structure that holds the struct completion. |
| 3200 | * Assume we're in process context, since the normal device reset |
| 3201 | * process has to wait for the device anyway. Storage devices are |
| 3202 | * reset as part of error handling, so use GFP_NOIO instead of |
| 3203 | * GFP_KERNEL. |
| 3204 | */ |
| 3205 | reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO); |
| 3206 | if (!reset_device_cmd) { |
| 3207 | xhci_dbg(xhci, "Couldn't allocate command structure.\n"); |
| 3208 | return -ENOMEM; |
| 3209 | } |
| 3210 | |
| 3211 | /* Attempt to submit the Reset Device command to the command ring */ |
| 3212 | spin_lock_irqsave(&xhci->lock, flags); |
| 3213 | reset_device_cmd->command_trb = xhci->cmd_ring->enqueue; |
Paul Zimmerman | 7a3783e | 2010-11-17 16:26:50 -0800 | [diff] [blame] | 3214 | |
| 3215 | /* Enqueue pointer can be left pointing to the link TRB, |
| 3216 | * we must handle that |
| 3217 | */ |
Matt Evans | f5960b6 | 2011-06-01 10:22:55 +1000 | [diff] [blame] | 3218 | if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control)) |
Paul Zimmerman | 7a3783e | 2010-11-17 16:26:50 -0800 | [diff] [blame] | 3219 | reset_device_cmd->command_trb = |
| 3220 | xhci->cmd_ring->enq_seg->next->trbs; |
| 3221 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3222 | list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list); |
| 3223 | ret = xhci_queue_reset_device(xhci, slot_id); |
| 3224 | if (ret) { |
| 3225 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
| 3226 | list_del(&reset_device_cmd->cmd_list); |
| 3227 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3228 | goto command_cleanup; |
| 3229 | } |
| 3230 | xhci_ring_cmd_db(xhci); |
| 3231 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3232 | |
| 3233 | /* Wait for the Reset Device command to finish */ |
| 3234 | timeleft = wait_for_completion_interruptible_timeout( |
| 3235 | reset_device_cmd->completion, |
| 3236 | USB_CTRL_SET_TIMEOUT); |
| 3237 | if (timeleft <= 0) { |
| 3238 | xhci_warn(xhci, "%s while waiting for reset device command\n", |
| 3239 | timeleft == 0 ? "Timeout" : "Signal"); |
| 3240 | spin_lock_irqsave(&xhci->lock, flags); |
| 3241 | /* The timeout might have raced with the event ring handler, so |
| 3242 | * only delete from the list if the item isn't poisoned. |
| 3243 | */ |
| 3244 | if (reset_device_cmd->cmd_list.next != LIST_POISON1) |
| 3245 | list_del(&reset_device_cmd->cmd_list); |
| 3246 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3247 | ret = -ETIME; |
| 3248 | goto command_cleanup; |
| 3249 | } |
| 3250 | |
| 3251 | /* The Reset Device command can't fail, according to the 0.95/0.96 spec, |
| 3252 | * unless we tried to reset a slot ID that wasn't enabled, |
| 3253 | * or the device wasn't in the addressed or configured state. |
| 3254 | */ |
| 3255 | ret = reset_device_cmd->status; |
| 3256 | switch (ret) { |
| 3257 | case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */ |
| 3258 | case COMP_CTX_STATE: /* 0.96 completion code for same thing */ |
| 3259 | xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n", |
| 3260 | slot_id, |
| 3261 | xhci_get_slot_state(xhci, virt_dev->out_ctx)); |
| 3262 | xhci_info(xhci, "Not freeing device rings.\n"); |
| 3263 | /* Don't treat this as an error. May change my mind later. */ |
| 3264 | ret = 0; |
| 3265 | goto command_cleanup; |
| 3266 | case COMP_SUCCESS: |
| 3267 | xhci_dbg(xhci, "Successful reset device command.\n"); |
| 3268 | break; |
| 3269 | default: |
| 3270 | if (xhci_is_vendor_info_code(xhci, ret)) |
| 3271 | break; |
| 3272 | xhci_warn(xhci, "Unknown completion code %u for " |
| 3273 | "reset device command.\n", ret); |
| 3274 | ret = -EINVAL; |
| 3275 | goto command_cleanup; |
| 3276 | } |
| 3277 | |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3278 | /* Free up host controller endpoint resources */ |
| 3279 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { |
| 3280 | spin_lock_irqsave(&xhci->lock, flags); |
| 3281 | /* Don't delete the default control endpoint resources */ |
| 3282 | xhci_free_device_endpoint_resources(xhci, virt_dev, false); |
| 3283 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3284 | } |
| 3285 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3286 | /* Everything but endpoint 0 is disabled, so free or cache the rings. */ |
| 3287 | last_freed_endpoint = 1; |
| 3288 | for (i = 1; i < 31; ++i) { |
Dmitry Torokhov | 2dea75d | 2011-04-12 23:06:28 -0700 | [diff] [blame] | 3289 | struct xhci_virt_ep *ep = &virt_dev->eps[i]; |
| 3290 | |
| 3291 | if (ep->ep_state & EP_HAS_STREAMS) { |
| 3292 | xhci_free_stream_info(xhci, ep->stream_info); |
| 3293 | ep->stream_info = NULL; |
| 3294 | ep->ep_state &= ~EP_HAS_STREAMS; |
| 3295 | } |
| 3296 | |
| 3297 | if (ep->ring) { |
| 3298 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
| 3299 | last_freed_endpoint = i; |
| 3300 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 3301 | if (!list_empty(&virt_dev->eps[i].bw_endpoint_list)) |
| 3302 | xhci_drop_ep_from_interval_table(xhci, |
| 3303 | &virt_dev->eps[i].bw_info, |
| 3304 | virt_dev->bw_table, |
| 3305 | udev, |
| 3306 | &virt_dev->eps[i], |
| 3307 | virt_dev->tt_info); |
Sarah Sharp | 9af5d71 | 2011-09-02 11:05:48 -0700 | [diff] [blame] | 3308 | xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info); |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3309 | } |
Sarah Sharp | 2e27980 | 2011-09-02 11:05:50 -0700 | [diff] [blame] | 3310 | /* If necessary, update the number of active TTs on this root port */ |
| 3311 | xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps); |
| 3312 | |
Sarah Sharp | 2a8f82c | 2009-12-09 15:59:13 -0800 | [diff] [blame] | 3313 | xhci_dbg(xhci, "Output context after successful reset device cmd:\n"); |
| 3314 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint); |
| 3315 | ret = 0; |
| 3316 | |
| 3317 | command_cleanup: |
| 3318 | xhci_free_command(xhci, reset_device_cmd); |
| 3319 | return ret; |
| 3320 | } |
| 3321 | |
| 3322 | /* |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3323 | * At this point, the struct usb_device is about to go away, the device has |
| 3324 | * disconnected, and all traffic has been stopped and the endpoints have been |
| 3325 | * disabled. Free any HC data structures associated with that device. |
| 3326 | */ |
| 3327 | void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev) |
| 3328 | { |
| 3329 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 3330 | struct xhci_virt_device *virt_dev; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3331 | unsigned long flags; |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3332 | u32 state; |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3333 | int i, ret; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3334 | |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3335 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 3336 | /* If the host is halted due to driver unload, we still need to free the |
| 3337 | * device. |
| 3338 | */ |
| 3339 | if (ret <= 0 && ret != -ENODEV) |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3340 | return; |
Andiry Xu | 6492773 | 2010-10-14 07:22:45 -0700 | [diff] [blame] | 3341 | |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 3342 | virt_dev = xhci->devs[udev->slot_id]; |
Sarah Sharp | 6f5165c | 2009-10-27 10:57:01 -0700 | [diff] [blame] | 3343 | |
| 3344 | /* Stop any wayward timer functions (which may grab the lock) */ |
| 3345 | for (i = 0; i < 31; ++i) { |
| 3346 | virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING; |
| 3347 | del_timer_sync(&virt_dev->eps[i].stop_cmd_timer); |
| 3348 | } |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3349 | |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3350 | if (udev->usb2_hw_lpm_enabled) { |
| 3351 | xhci_set_usb2_hardware_lpm(hcd, udev, 0); |
| 3352 | udev->usb2_hw_lpm_enabled = 0; |
| 3353 | } |
| 3354 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3355 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3356 | /* Don't disable the slot if the host controller is dead. */ |
| 3357 | state = xhci_readl(xhci, &xhci->op_regs->status); |
Sarah Sharp | 7bd89b4 | 2011-07-01 13:35:40 -0700 | [diff] [blame] | 3358 | if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || |
| 3359 | (xhci->xhc_state & XHCI_STATE_HALTED)) { |
Sarah Sharp | c526d0d | 2009-09-16 16:42:39 -0700 | [diff] [blame] | 3360 | xhci_free_virt_device(xhci, udev->slot_id); |
| 3361 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3362 | return; |
| 3363 | } |
| 3364 | |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3365 | if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3366 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3367 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
| 3368 | return; |
| 3369 | } |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3370 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3371 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3372 | /* |
| 3373 | * Event command completion handler will free any data structures |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 3374 | * associated with the slot. XXX Can free sleep? |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3375 | */ |
| 3376 | } |
| 3377 | |
| 3378 | /* |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3379 | * Checks if we have enough host controller resources for the default control |
| 3380 | * endpoint. |
| 3381 | * |
| 3382 | * Must be called with xhci->lock held. |
| 3383 | */ |
| 3384 | static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci) |
| 3385 | { |
| 3386 | if (xhci->num_active_eps + 1 > xhci->limit_active_eps) { |
| 3387 | xhci_dbg(xhci, "Not enough ep ctxs: " |
| 3388 | "%u active, need to add 1, limit is %u.\n", |
| 3389 | xhci->num_active_eps, xhci->limit_active_eps); |
| 3390 | return -ENOMEM; |
| 3391 | } |
| 3392 | xhci->num_active_eps += 1; |
| 3393 | xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n", |
| 3394 | xhci->num_active_eps); |
| 3395 | return 0; |
| 3396 | } |
| 3397 | |
| 3398 | |
| 3399 | /* |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3400 | * Returns 0 if the xHC ran out of device slots, the Enable Slot command |
| 3401 | * timed out, or allocating memory failed. Returns 1 on success. |
| 3402 | */ |
| 3403 | int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev) |
| 3404 | { |
| 3405 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3406 | unsigned long flags; |
| 3407 | int timeleft; |
| 3408 | int ret; |
| 3409 | |
| 3410 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3411 | ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3412 | if (ret) { |
| 3413 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3414 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
| 3415 | return 0; |
| 3416 | } |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3417 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3418 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3419 | |
| 3420 | /* XXX: how much time for xHC slot assignment? */ |
| 3421 | timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev, |
| 3422 | USB_CTRL_SET_TIMEOUT); |
| 3423 | if (timeleft <= 0) { |
| 3424 | xhci_warn(xhci, "%s while waiting for a slot\n", |
| 3425 | timeleft == 0 ? "Timeout" : "Signal"); |
| 3426 | /* FIXME cancel the enable slot request */ |
| 3427 | return 0; |
| 3428 | } |
| 3429 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3430 | if (!xhci->slot_id) { |
| 3431 | xhci_err(xhci, "Error while assigning device slot ID\n"); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3432 | return 0; |
| 3433 | } |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3434 | |
| 3435 | if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) { |
| 3436 | spin_lock_irqsave(&xhci->lock, flags); |
| 3437 | ret = xhci_reserve_host_control_ep_resources(xhci); |
| 3438 | if (ret) { |
| 3439 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3440 | xhci_warn(xhci, "Not enough host resources, " |
| 3441 | "active endpoint contexts = %u\n", |
| 3442 | xhci->num_active_eps); |
| 3443 | goto disable_slot; |
| 3444 | } |
| 3445 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3446 | } |
| 3447 | /* Use GFP_NOIO, since this function can be called from |
Sarah Sharp | a6d940d | 2010-12-28 13:08:42 -0800 | [diff] [blame] | 3448 | * xhci_discover_or_reset_device(), which may be called as part of |
| 3449 | * mass storage driver error handling. |
| 3450 | */ |
| 3451 | if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3452 | xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n"); |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3453 | goto disable_slot; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3454 | } |
| 3455 | udev->slot_id = xhci->slot_id; |
| 3456 | /* Is this a LS or FS device under a HS hub? */ |
| 3457 | /* Hub or peripherial? */ |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3458 | return 1; |
Sarah Sharp | 2cf95c1 | 2011-05-11 16:14:58 -0700 | [diff] [blame] | 3459 | |
| 3460 | disable_slot: |
| 3461 | /* Disable slot, if we can do it without mem alloc */ |
| 3462 | spin_lock_irqsave(&xhci->lock, flags); |
| 3463 | if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) |
| 3464 | xhci_ring_cmd_db(xhci); |
| 3465 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3466 | return 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3467 | } |
| 3468 | |
| 3469 | /* |
| 3470 | * Issue an Address Device command (which will issue a SetAddress request to |
| 3471 | * the device). |
| 3472 | * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so |
| 3473 | * we should only issue and wait on one address command at the same time. |
| 3474 | * |
| 3475 | * We add one to the device address issued by the hardware because the USB core |
| 3476 | * uses address 1 for the root hubs (even though they're not really devices). |
| 3477 | */ |
| 3478 | int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 3479 | { |
| 3480 | unsigned long flags; |
| 3481 | int timeleft; |
| 3482 | struct xhci_virt_device *virt_dev; |
| 3483 | int ret = 0; |
| 3484 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3485 | struct xhci_slot_ctx *slot_ctx; |
| 3486 | struct xhci_input_control_ctx *ctrl_ctx; |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 3487 | u64 temp_64; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3488 | |
| 3489 | if (!udev->slot_id) { |
| 3490 | xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id); |
| 3491 | return -EINVAL; |
| 3492 | } |
| 3493 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3494 | virt_dev = xhci->devs[udev->slot_id]; |
| 3495 | |
Matt Evans | 7ed603e | 2011-03-29 13:40:56 +1100 | [diff] [blame] | 3496 | if (WARN_ON(!virt_dev)) { |
| 3497 | /* |
| 3498 | * In plug/unplug torture test with an NEC controller, |
| 3499 | * a zero-dereference was observed once due to virt_dev = 0. |
| 3500 | * Print useful debug rather than crash if it is observed again! |
| 3501 | */ |
| 3502 | xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n", |
| 3503 | udev->slot_id); |
| 3504 | return -EINVAL; |
| 3505 | } |
| 3506 | |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3507 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
| 3508 | /* |
| 3509 | * If this is the first Set Address since device plug-in or |
| 3510 | * virt_device realloaction after a resume with an xHCI power loss, |
| 3511 | * then set up the slot context. |
| 3512 | */ |
| 3513 | if (!slot_ctx->dev_info) |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3514 | xhci_setup_addressable_virt_dev(xhci, udev); |
Andiry Xu | f0615c4 | 2010-10-14 07:22:48 -0700 | [diff] [blame] | 3515 | /* Otherwise, update the control endpoint ring enqueue pointer. */ |
Sarah Sharp | 2d1ee59 | 2010-07-09 17:08:54 +0200 | [diff] [blame] | 3516 | else |
| 3517 | xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev); |
Sarah Sharp | d31c285 | 2011-11-03 13:06:08 -0700 | [diff] [blame] | 3518 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); |
| 3519 | ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); |
| 3520 | ctrl_ctx->drop_flags = 0; |
| 3521 | |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 3522 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3523 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3524 | |
Sarah Sharp | f88ba78 | 2009-05-14 11:44:22 -0700 | [diff] [blame] | 3525 | spin_lock_irqsave(&xhci->lock, flags); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3526 | ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma, |
| 3527 | udev->slot_id); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3528 | if (ret) { |
| 3529 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3530 | xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); |
| 3531 | return ret; |
| 3532 | } |
Sarah Sharp | 23e3be1 | 2009-04-29 19:05:20 -0700 | [diff] [blame] | 3533 | xhci_ring_cmd_db(xhci); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3534 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3535 | |
| 3536 | /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */ |
| 3537 | timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev, |
| 3538 | USB_CTRL_SET_TIMEOUT); |
| 3539 | /* FIXME: From section 4.3.4: "Software shall be responsible for timing |
| 3540 | * the SetAddress() "recovery interval" required by USB and aborting the |
| 3541 | * command on a timeout. |
| 3542 | */ |
| 3543 | if (timeleft <= 0) { |
Andiry Xu | cd68176 | 2011-09-23 14:19:55 -0700 | [diff] [blame] | 3544 | xhci_warn(xhci, "%s while waiting for address device command\n", |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3545 | timeleft == 0 ? "Timeout" : "Signal"); |
| 3546 | /* FIXME cancel the address device command */ |
| 3547 | return -ETIME; |
| 3548 | } |
| 3549 | |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3550 | switch (virt_dev->cmd_status) { |
| 3551 | case COMP_CTX_STATE: |
| 3552 | case COMP_EBADSLT: |
| 3553 | xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n", |
| 3554 | udev->slot_id); |
| 3555 | ret = -EINVAL; |
| 3556 | break; |
| 3557 | case COMP_TX_ERR: |
| 3558 | dev_warn(&udev->dev, "Device not responding to set address.\n"); |
| 3559 | ret = -EPROTO; |
| 3560 | break; |
Alex He | f6ba6fe | 2011-06-08 18:34:06 +0800 | [diff] [blame] | 3561 | case COMP_DEV_ERR: |
| 3562 | dev_warn(&udev->dev, "ERROR: Incompatible device for address " |
| 3563 | "device command.\n"); |
| 3564 | ret = -ENODEV; |
| 3565 | break; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3566 | case COMP_SUCCESS: |
| 3567 | xhci_dbg(xhci, "Successful Address Device command\n"); |
| 3568 | break; |
| 3569 | default: |
| 3570 | xhci_err(xhci, "ERROR: unexpected command completion " |
| 3571 | "code 0x%x.\n", virt_dev->cmd_status); |
Sarah Sharp | 66e49d8 | 2009-07-27 12:03:46 -0700 | [diff] [blame] | 3572 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3573 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3574 | ret = -EINVAL; |
| 3575 | break; |
| 3576 | } |
| 3577 | if (ret) { |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3578 | return ret; |
| 3579 | } |
Sarah Sharp | 8e595a5 | 2009-07-27 12:03:31 -0700 | [diff] [blame] | 3580 | temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); |
| 3581 | xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64); |
| 3582 | xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n", |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 3583 | udev->slot_id, |
| 3584 | &xhci->dcbaa->dev_context_ptrs[udev->slot_id], |
| 3585 | (unsigned long long) |
| 3586 | le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id])); |
Greg Kroah-Hartman | 700e205 | 2009-04-29 19:14:08 -0700 | [diff] [blame] | 3587 | xhci_dbg(xhci, "Output Context DMA address = %#08llx\n", |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3588 | (unsigned long long)virt_dev->out_ctx->dma); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3589 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3590 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3591 | xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3592 | xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3593 | /* |
| 3594 | * USB core uses address 1 for the roothubs, so we add one to the |
| 3595 | * address given back to us by the HC. |
| 3596 | */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3597 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); |
Andiry Xu | c8d4af8 | 2010-10-14 07:22:51 -0700 | [diff] [blame] | 3598 | /* Use kernel assigned address for devices; store xHC assigned |
| 3599 | * address locally. */ |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 3600 | virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK) |
| 3601 | + 1; |
Sarah Sharp | f94e0186 | 2009-04-27 19:58:38 -0700 | [diff] [blame] | 3602 | /* Zero the input context control for later use */ |
John Youn | d115b04 | 2009-07-27 12:05:15 -0700 | [diff] [blame] | 3603 | ctrl_ctx->add_flags = 0; |
| 3604 | ctrl_ctx->drop_flags = 0; |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3605 | |
Andiry Xu | c8d4af8 | 2010-10-14 07:22:51 -0700 | [diff] [blame] | 3606 | xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address); |
Sarah Sharp | 3ffbba9 | 2009-04-27 19:57:38 -0700 | [diff] [blame] | 3607 | |
| 3608 | return 0; |
| 3609 | } |
| 3610 | |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3611 | #ifdef CONFIG_USB_SUSPEND |
| 3612 | |
| 3613 | /* BESL to HIRD Encoding array for USB2 LPM */ |
| 3614 | static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000, |
| 3615 | 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000}; |
| 3616 | |
| 3617 | /* Calculate HIRD/BESL for USB2 PORTPMSC*/ |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3618 | static int xhci_calculate_hird_besl(struct xhci_hcd *xhci, |
| 3619 | struct usb_device *udev) |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3620 | { |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3621 | int u2del, besl, besl_host; |
| 3622 | int besl_device = 0; |
| 3623 | u32 field; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3624 | |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3625 | u2del = HCS_U2_LATENCY(xhci->hcs_params3); |
| 3626 | field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); |
| 3627 | |
| 3628 | if (field & USB_BESL_SUPPORT) { |
| 3629 | for (besl_host = 0; besl_host < 16; besl_host++) { |
| 3630 | if (xhci_besl_encoding[besl_host] >= u2del) |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3631 | break; |
| 3632 | } |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3633 | /* Use baseline BESL value as default */ |
| 3634 | if (field & USB_BESL_BASELINE_VALID) |
| 3635 | besl_device = USB_GET_BESL_BASELINE(field); |
| 3636 | else if (field & USB_BESL_DEEP_VALID) |
| 3637 | besl_device = USB_GET_BESL_DEEP(field); |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3638 | } else { |
| 3639 | if (u2del <= 50) |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3640 | besl_host = 0; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3641 | else |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3642 | besl_host = (u2del - 51) / 75 + 1; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3643 | } |
| 3644 | |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3645 | besl = besl_host + besl_device; |
| 3646 | if (besl > 15) |
| 3647 | besl = 15; |
| 3648 | |
| 3649 | return besl; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3650 | } |
| 3651 | |
| 3652 | static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd, |
| 3653 | struct usb_device *udev) |
| 3654 | { |
| 3655 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3656 | struct dev_info *dev_info; |
| 3657 | __le32 __iomem **port_array; |
| 3658 | __le32 __iomem *addr, *pm_addr; |
| 3659 | u32 temp, dev_id; |
| 3660 | unsigned int port_num; |
| 3661 | unsigned long flags; |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3662 | int hird; |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3663 | int ret; |
| 3664 | |
| 3665 | if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support || |
| 3666 | !udev->lpm_capable) |
| 3667 | return -EINVAL; |
| 3668 | |
| 3669 | /* we only support lpm for non-hub device connected to root hub yet */ |
| 3670 | if (!udev->parent || udev->parent->parent || |
| 3671 | udev->descriptor.bDeviceClass == USB_CLASS_HUB) |
| 3672 | return -EINVAL; |
| 3673 | |
| 3674 | spin_lock_irqsave(&xhci->lock, flags); |
| 3675 | |
| 3676 | /* Look for devices in lpm_failed_devs list */ |
| 3677 | dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 | |
| 3678 | le16_to_cpu(udev->descriptor.idProduct); |
| 3679 | list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) { |
| 3680 | if (dev_info->dev_id == dev_id) { |
| 3681 | ret = -EINVAL; |
| 3682 | goto finish; |
| 3683 | } |
| 3684 | } |
| 3685 | |
| 3686 | port_array = xhci->usb2_ports; |
| 3687 | port_num = udev->portnum - 1; |
| 3688 | |
| 3689 | if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) { |
| 3690 | xhci_dbg(xhci, "invalid port number %d\n", udev->portnum); |
| 3691 | ret = -EINVAL; |
| 3692 | goto finish; |
| 3693 | } |
| 3694 | |
| 3695 | /* |
| 3696 | * Test USB 2.0 software LPM. |
| 3697 | * FIXME: some xHCI 1.0 hosts may implement a new register to set up |
| 3698 | * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1 |
| 3699 | * in the June 2011 errata release. |
| 3700 | */ |
| 3701 | xhci_dbg(xhci, "test port %d software LPM\n", port_num); |
| 3702 | /* |
| 3703 | * Set L1 Device Slot and HIRD/BESL. |
| 3704 | * Check device's USB 2.0 extension descriptor to determine whether |
| 3705 | * HIRD or BESL shoule be used. See USB2.0 LPM errata. |
| 3706 | */ |
| 3707 | pm_addr = port_array[port_num] + 1; |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3708 | hird = xhci_calculate_hird_besl(xhci, udev); |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3709 | temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird); |
| 3710 | xhci_writel(xhci, temp, pm_addr); |
| 3711 | |
| 3712 | /* Set port link state to U2(L1) */ |
| 3713 | addr = port_array[port_num]; |
| 3714 | xhci_set_link_state(xhci, port_array, port_num, XDEV_U2); |
| 3715 | |
| 3716 | /* wait for ACK */ |
| 3717 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3718 | msleep(10); |
| 3719 | spin_lock_irqsave(&xhci->lock, flags); |
| 3720 | |
| 3721 | /* Check L1 Status */ |
| 3722 | ret = handshake(xhci, pm_addr, PORT_L1S_MASK, PORT_L1S_SUCCESS, 125); |
| 3723 | if (ret != -ETIMEDOUT) { |
| 3724 | /* enter L1 successfully */ |
| 3725 | temp = xhci_readl(xhci, addr); |
| 3726 | xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n", |
| 3727 | port_num, temp); |
| 3728 | ret = 0; |
| 3729 | } else { |
| 3730 | temp = xhci_readl(xhci, pm_addr); |
| 3731 | xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n", |
| 3732 | port_num, temp & PORT_L1S_MASK); |
| 3733 | ret = -EINVAL; |
| 3734 | } |
| 3735 | |
| 3736 | /* Resume the port */ |
| 3737 | xhci_set_link_state(xhci, port_array, port_num, XDEV_U0); |
| 3738 | |
| 3739 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3740 | msleep(10); |
| 3741 | spin_lock_irqsave(&xhci->lock, flags); |
| 3742 | |
| 3743 | /* Clear PLC */ |
| 3744 | xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC); |
| 3745 | |
| 3746 | /* Check PORTSC to make sure the device is in the right state */ |
| 3747 | if (!ret) { |
| 3748 | temp = xhci_readl(xhci, addr); |
| 3749 | xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp); |
| 3750 | if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) || |
| 3751 | (temp & PORT_PLS_MASK) != XDEV_U0) { |
| 3752 | xhci_dbg(xhci, "port L1 resume fail\n"); |
| 3753 | ret = -EINVAL; |
| 3754 | } |
| 3755 | } |
| 3756 | |
| 3757 | if (ret) { |
| 3758 | /* Insert dev to lpm_failed_devs list */ |
| 3759 | xhci_warn(xhci, "device LPM test failed, may disconnect and " |
| 3760 | "re-enumerate\n"); |
| 3761 | dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC); |
| 3762 | if (!dev_info) { |
| 3763 | ret = -ENOMEM; |
| 3764 | goto finish; |
| 3765 | } |
| 3766 | dev_info->dev_id = dev_id; |
| 3767 | INIT_LIST_HEAD(&dev_info->list); |
| 3768 | list_add(&dev_info->list, &xhci->lpm_failed_devs); |
| 3769 | } else { |
| 3770 | xhci_ring_device(xhci, udev->slot_id); |
| 3771 | } |
| 3772 | |
| 3773 | finish: |
| 3774 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3775 | return ret; |
| 3776 | } |
| 3777 | |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3778 | int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd, |
| 3779 | struct usb_device *udev, int enable) |
| 3780 | { |
| 3781 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3782 | __le32 __iomem **port_array; |
| 3783 | __le32 __iomem *pm_addr; |
| 3784 | u32 temp; |
| 3785 | unsigned int port_num; |
| 3786 | unsigned long flags; |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3787 | int hird; |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3788 | |
| 3789 | if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support || |
| 3790 | !udev->lpm_capable) |
| 3791 | return -EPERM; |
| 3792 | |
| 3793 | if (!udev->parent || udev->parent->parent || |
| 3794 | udev->descriptor.bDeviceClass == USB_CLASS_HUB) |
| 3795 | return -EPERM; |
| 3796 | |
| 3797 | if (udev->usb2_hw_lpm_capable != 1) |
| 3798 | return -EPERM; |
| 3799 | |
| 3800 | spin_lock_irqsave(&xhci->lock, flags); |
| 3801 | |
| 3802 | port_array = xhci->usb2_ports; |
| 3803 | port_num = udev->portnum - 1; |
| 3804 | pm_addr = port_array[port_num] + 1; |
| 3805 | temp = xhci_readl(xhci, pm_addr); |
| 3806 | |
| 3807 | xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n", |
| 3808 | enable ? "enable" : "disable", port_num); |
| 3809 | |
Andiry Xu | f99298b | 2011-12-12 16:45:28 +0800 | [diff] [blame] | 3810 | hird = xhci_calculate_hird_besl(xhci, udev); |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3811 | |
| 3812 | if (enable) { |
| 3813 | temp &= ~PORT_HIRD_MASK; |
| 3814 | temp |= PORT_HIRD(hird) | PORT_RWE; |
| 3815 | xhci_writel(xhci, temp, pm_addr); |
| 3816 | temp = xhci_readl(xhci, pm_addr); |
| 3817 | temp |= PORT_HLE; |
| 3818 | xhci_writel(xhci, temp, pm_addr); |
| 3819 | } else { |
| 3820 | temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK); |
| 3821 | xhci_writel(xhci, temp, pm_addr); |
| 3822 | } |
| 3823 | |
| 3824 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3825 | return 0; |
| 3826 | } |
| 3827 | |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3828 | int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 3829 | { |
| 3830 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3831 | int ret; |
| 3832 | |
| 3833 | ret = xhci_usb2_software_lpm_test(hcd, udev); |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3834 | if (!ret) { |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3835 | xhci_dbg(xhci, "software LPM test succeed\n"); |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3836 | if (xhci->hw_lpm_support == 1) { |
| 3837 | udev->usb2_hw_lpm_capable = 1; |
| 3838 | ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1); |
| 3839 | if (!ret) |
| 3840 | udev->usb2_hw_lpm_enabled = 1; |
| 3841 | } |
| 3842 | } |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3843 | |
| 3844 | return 0; |
| 3845 | } |
| 3846 | |
| 3847 | #else |
| 3848 | |
Andiry Xu | 65580b43 | 2011-09-23 14:19:52 -0700 | [diff] [blame] | 3849 | int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd, |
| 3850 | struct usb_device *udev, int enable) |
| 3851 | { |
| 3852 | return 0; |
| 3853 | } |
| 3854 | |
Andiry Xu | 9574323 | 2011-09-23 14:19:51 -0700 | [diff] [blame] | 3855 | int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev) |
| 3856 | { |
| 3857 | return 0; |
| 3858 | } |
| 3859 | |
| 3860 | #endif /* CONFIG_USB_SUSPEND */ |
| 3861 | |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3862 | /* Once a hub descriptor is fetched for a device, we need to update the xHC's |
| 3863 | * internal data structures for the device. |
| 3864 | */ |
| 3865 | int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev, |
| 3866 | struct usb_tt *tt, gfp_t mem_flags) |
| 3867 | { |
| 3868 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3869 | struct xhci_virt_device *vdev; |
| 3870 | struct xhci_command *config_cmd; |
| 3871 | struct xhci_input_control_ctx *ctrl_ctx; |
| 3872 | struct xhci_slot_ctx *slot_ctx; |
| 3873 | unsigned long flags; |
| 3874 | unsigned think_time; |
| 3875 | int ret; |
| 3876 | |
| 3877 | /* Ignore root hubs */ |
| 3878 | if (!hdev->parent) |
| 3879 | return 0; |
| 3880 | |
| 3881 | vdev = xhci->devs[hdev->slot_id]; |
| 3882 | if (!vdev) { |
| 3883 | xhci_warn(xhci, "Cannot update hub desc for unknown device.\n"); |
| 3884 | return -EINVAL; |
| 3885 | } |
Sarah Sharp | a1d78c1 | 2009-12-09 15:59:03 -0800 | [diff] [blame] | 3886 | config_cmd = xhci_alloc_command(xhci, true, true, mem_flags); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3887 | if (!config_cmd) { |
| 3888 | xhci_dbg(xhci, "Could not allocate xHCI command structure.\n"); |
| 3889 | return -ENOMEM; |
| 3890 | } |
| 3891 | |
| 3892 | spin_lock_irqsave(&xhci->lock, flags); |
Sarah Sharp | 839c817 | 2011-09-02 11:05:47 -0700 | [diff] [blame] | 3893 | if (hdev->speed == USB_SPEED_HIGH && |
| 3894 | xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) { |
| 3895 | xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n"); |
| 3896 | xhci_free_command(xhci, config_cmd); |
| 3897 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3898 | return -ENOMEM; |
| 3899 | } |
| 3900 | |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3901 | xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx); |
| 3902 | ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 3903 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3904 | slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 3905 | slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3906 | if (tt->multi) |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 3907 | slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3908 | if (xhci->hci_version > 0x95) { |
| 3909 | xhci_dbg(xhci, "xHCI version %x needs hub " |
| 3910 | "TT think time and number of ports\n", |
| 3911 | (unsigned int) xhci->hci_version); |
Matt Evans | 28ccd29 | 2011-03-29 13:40:46 +1100 | [diff] [blame] | 3912 | slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild)); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3913 | /* Set TT think time - convert from ns to FS bit times. |
| 3914 | * 0 = 8 FS bit times, 1 = 16 FS bit times, |
| 3915 | * 2 = 24 FS bit times, 3 = 32 FS bit times. |
Andiry Xu | 700b417 | 2011-05-05 18:14:05 +0800 | [diff] [blame] | 3916 | * |
| 3917 | * xHCI 1.0: this field shall be 0 if the device is not a |
| 3918 | * High-spped hub. |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3919 | */ |
| 3920 | think_time = tt->think_time; |
| 3921 | if (think_time != 0) |
| 3922 | think_time = (think_time / 666) - 1; |
Andiry Xu | 700b417 | 2011-05-05 18:14:05 +0800 | [diff] [blame] | 3923 | if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH) |
| 3924 | slot_ctx->tt_info |= |
| 3925 | cpu_to_le32(TT_THINK_TIME(think_time)); |
Sarah Sharp | ac1c1b7 | 2009-09-04 10:53:20 -0700 | [diff] [blame] | 3926 | } else { |
| 3927 | xhci_dbg(xhci, "xHCI version %x doesn't need hub " |
| 3928 | "TT think time or number of ports\n", |
| 3929 | (unsigned int) xhci->hci_version); |
| 3930 | } |
| 3931 | slot_ctx->dev_state = 0; |
| 3932 | spin_unlock_irqrestore(&xhci->lock, flags); |
| 3933 | |
| 3934 | xhci_dbg(xhci, "Set up %s for hub device.\n", |
| 3935 | (xhci->hci_version > 0x95) ? |
| 3936 | "configure endpoint" : "evaluate context"); |
| 3937 | xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id); |
| 3938 | xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0); |
| 3939 | |
| 3940 | /* Issue and wait for the configure endpoint or |
| 3941 | * evaluate context command. |
| 3942 | */ |
| 3943 | if (xhci->hci_version > 0x95) |
| 3944 | ret = xhci_configure_endpoint(xhci, hdev, config_cmd, |
| 3945 | false, false); |
| 3946 | else |
| 3947 | ret = xhci_configure_endpoint(xhci, hdev, config_cmd, |
| 3948 | true, false); |
| 3949 | |
| 3950 | xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id); |
| 3951 | xhci_dbg_ctx(xhci, vdev->out_ctx, 0); |
| 3952 | |
| 3953 | xhci_free_command(xhci, config_cmd); |
| 3954 | return ret; |
| 3955 | } |
| 3956 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 3957 | int xhci_get_frame(struct usb_hcd *hcd) |
| 3958 | { |
| 3959 | struct xhci_hcd *xhci = hcd_to_xhci(hcd); |
| 3960 | /* EHCI mods by the periodic size. Why? */ |
| 3961 | return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3; |
| 3962 | } |
| 3963 | |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 3964 | int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) |
| 3965 | { |
| 3966 | struct xhci_hcd *xhci; |
| 3967 | struct device *dev = hcd->self.controller; |
| 3968 | int retval; |
| 3969 | u32 temp; |
| 3970 | |
Andiry Xu | fdaf8b3 | 2012-03-05 17:49:38 +0800 | [diff] [blame] | 3971 | /* Accept arbitrarily long scatter-gather lists */ |
| 3972 | hcd->self.sg_tablesize = ~0; |
Sebastian Andrzej Siewior | 552e0c4 | 2011-09-23 14:20:01 -0700 | [diff] [blame] | 3973 | |
| 3974 | if (usb_hcd_is_primary_hcd(hcd)) { |
| 3975 | xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL); |
| 3976 | if (!xhci) |
| 3977 | return -ENOMEM; |
| 3978 | *((struct xhci_hcd **) hcd->hcd_priv) = xhci; |
| 3979 | xhci->main_hcd = hcd; |
| 3980 | /* Mark the first roothub as being USB 2.0. |
| 3981 | * The xHCI driver will register the USB 3.0 roothub. |
| 3982 | */ |
| 3983 | hcd->speed = HCD_USB2; |
| 3984 | hcd->self.root_hub->speed = USB_SPEED_HIGH; |
| 3985 | /* |
| 3986 | * USB 2.0 roothub under xHCI has an integrated TT, |
| 3987 | * (rate matching hub) as opposed to having an OHCI/UHCI |
| 3988 | * companion controller. |
| 3989 | */ |
| 3990 | hcd->has_tt = 1; |
| 3991 | } else { |
| 3992 | /* xHCI private pointer was set in xhci_pci_probe for the second |
| 3993 | * registered roothub. |
| 3994 | */ |
| 3995 | xhci = hcd_to_xhci(hcd); |
| 3996 | temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params); |
| 3997 | if (HCC_64BIT_ADDR(temp)) { |
| 3998 | xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); |
| 3999 | dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)); |
| 4000 | } else { |
| 4001 | dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32)); |
| 4002 | } |
| 4003 | return 0; |
| 4004 | } |
| 4005 | |
| 4006 | xhci->cap_regs = hcd->regs; |
| 4007 | xhci->op_regs = hcd->regs + |
| 4008 | HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase)); |
| 4009 | xhci->run_regs = hcd->regs + |
| 4010 | (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK); |
| 4011 | /* Cache read-only capability registers */ |
| 4012 | xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1); |
| 4013 | xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2); |
| 4014 | xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3); |
| 4015 | xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); |
| 4016 | xhci->hci_version = HC_VERSION(xhci->hcc_params); |
| 4017 | xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params); |
| 4018 | xhci_print_registers(xhci); |
| 4019 | |
| 4020 | get_quirks(dev, xhci); |
| 4021 | |
| 4022 | /* Make sure the HC is halted. */ |
| 4023 | retval = xhci_halt(xhci); |
| 4024 | if (retval) |
| 4025 | goto error; |
| 4026 | |
| 4027 | xhci_dbg(xhci, "Resetting HCD\n"); |
| 4028 | /* Reset the internal HC memory state and registers. */ |
| 4029 | retval = xhci_reset(xhci); |
| 4030 | if (retval) |
| 4031 | goto error; |
| 4032 | xhci_dbg(xhci, "Reset complete\n"); |
| 4033 | |
| 4034 | temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params); |
| 4035 | if (HCC_64BIT_ADDR(temp)) { |
| 4036 | xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n"); |
| 4037 | dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)); |
| 4038 | } else { |
| 4039 | dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32)); |
| 4040 | } |
| 4041 | |
| 4042 | xhci_dbg(xhci, "Calling HCD init\n"); |
| 4043 | /* Initialize HCD and host controller data structures. */ |
| 4044 | retval = xhci_init(hcd); |
| 4045 | if (retval) |
| 4046 | goto error; |
| 4047 | xhci_dbg(xhci, "Called HCD init\n"); |
| 4048 | return 0; |
| 4049 | error: |
| 4050 | kfree(xhci); |
| 4051 | return retval; |
| 4052 | } |
| 4053 | |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4054 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 4055 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 4056 | MODULE_LICENSE("GPL"); |
| 4057 | |
| 4058 | static int __init xhci_hcd_init(void) |
| 4059 | { |
Sebastian Andrzej Siewior | 0cc47d5 | 2011-09-23 14:20:02 -0700 | [diff] [blame] | 4060 | int retval; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4061 | |
| 4062 | retval = xhci_register_pci(); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4063 | if (retval < 0) { |
| 4064 | printk(KERN_DEBUG "Problem registering PCI driver."); |
| 4065 | return retval; |
| 4066 | } |
Sebastian Andrzej Siewior | 3429e91 | 2012-03-13 16:57:41 +0200 | [diff] [blame] | 4067 | retval = xhci_register_plat(); |
| 4068 | if (retval < 0) { |
| 4069 | printk(KERN_DEBUG "Problem registering platform driver."); |
| 4070 | goto unreg_pci; |
| 4071 | } |
Sarah Sharp | 9844197 | 2009-05-14 11:44:18 -0700 | [diff] [blame] | 4072 | /* |
| 4073 | * Check the compiler generated sizes of structures that must be laid |
| 4074 | * out in specific ways for hardware access. |
| 4075 | */ |
| 4076 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); |
| 4077 | BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8); |
| 4078 | BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8); |
| 4079 | /* xhci_device_control has eight fields, and also |
| 4080 | * embeds one xhci_slot_ctx and 31 xhci_ep_ctx |
| 4081 | */ |
Sarah Sharp | 9844197 | 2009-05-14 11:44:18 -0700 | [diff] [blame] | 4082 | BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8); |
| 4083 | BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8); |
| 4084 | BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8); |
| 4085 | BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8); |
| 4086 | BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8); |
| 4087 | /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */ |
| 4088 | BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8); |
| 4089 | BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4090 | return 0; |
Sebastian Andrzej Siewior | 3429e91 | 2012-03-13 16:57:41 +0200 | [diff] [blame] | 4091 | unreg_pci: |
| 4092 | xhci_unregister_pci(); |
| 4093 | return retval; |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4094 | } |
| 4095 | module_init(xhci_hcd_init); |
| 4096 | |
| 4097 | static void __exit xhci_hcd_cleanup(void) |
| 4098 | { |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4099 | xhci_unregister_pci(); |
Sebastian Andrzej Siewior | 3429e91 | 2012-03-13 16:57:41 +0200 | [diff] [blame] | 4100 | xhci_unregister_plat(); |
Sarah Sharp | 66d4ead | 2009-04-27 19:52:28 -0700 | [diff] [blame] | 4101 | } |
| 4102 | module_exit(xhci_hcd_cleanup); |